- 07 Sep, 2020 40 commits
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Wolfram Sang authored
Tuning procedure switches to lower frequencies but that will turn the SCC off and accessing its register then will hang. So, check when we are tuning and keep the current setup of the external clock if we are doing so. Note that we still switch to the lower frequency because of the internal divider. We just make sure to not modify the external clock. This patch depends on a MMC core patch calling the downgrade function earlier. Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Wolfram Sang authored
Our driver needs to know when tuning is in progress. 'doing_retune' only covers re-tuning, not the initial tuning. Add another flag to detect the initial tuning state and add a helper which tells us if any kind of tuning is going on. Only implemented for MMC currently because that's where we need it. SD can be added later if it becomes necessary. Signed-off-by:
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Wolfram Sang authored
The driver specific downgrade function makes more sense if we run it before we set the timing to something lower, not after. Otherwise some non-HS400 communication has already happened. No need to convert users. There is only one currently which needs this change in a following patch. Signed-off-by:
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Douglas Anderson authored
Turning on initcall debug on one system showed this: initcall sdhci_msm_driver_init+0x0/0x28 returned 0 after 34782 usecs The lion's share of this time (~33 ms) was in mmc_power_up(). This shouldn't be terribly surprising since there are a few calls to delay based on "power_delay_ms" and the default delay there is 10 ms. Because we haven't specified that we'd prefer asynchronous probe for this driver then we'll wait for this driver to finish before we start probes for more drivers. While 33 ms doesn't sound like tons, every little bit counts. There should be little problem with turning on asynchronous probe for this driver. It's already possible that previous drivers may have turned on asynchronous probe so we might already have other things (that probed before us) probing at the same time we are anyway. This driver isn't really providing resources (clocks, regulators, etc) that other drivers need to probe and even if it was they should be handling -EPROBE_DEFER. Let's turn this on and get a bit of boot speed back. Signed-off-by:
Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20200902164303.1.I5e598a25222b4534c0083b61dbfa4e0e76f66171@changeidSigned-off-by:
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Krzysztof Kozlowski authored
The 'imask' and 'bsize' are not used in dbg_dumpregs: drivers/mmc/host/s3cmci.c:149:36: warning: variable 'imask' set but not used [-Wunused-but-set-variable] drivers/mmc/host/s3cmci.c:148:63: warning: variable 'bsize' set but not used [-Wunused-but-set-variable] Reported-by:
kernel test robot <lkp@intel.com> Signed-off-by:
Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200903054333.18331-1-krzk@kernel.orgSigned-off-by:
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Krzysztof Kozlowski authored
Since driver data is a pointer, direct casting to integer causes warning when compile testing for 64-bit architecture: drivers/mmc/host/s3cmci.c:1495:17: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] The actual driver data can be only 0 or 1, so cast it via long and do not care about any loss of value. Signed-off-by:
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Krzysztof Kozlowski authored
iomem pointers should be printed with pointer format to hide the actual value and fix warnings when compile testing for 64-bit architecture: drivers/mmc/host/s3cmci.c:1355:46: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] Signed-off-by: -
Krzysztof Kozlowski authored
Store in interrupt service routine always '1' in end_command, not the value of host->cmd to fix compile test warnings on RISC-V: drivers/mmc/host/davinci_mmc.c:999:17: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] Signed-off-by: -
Krzysztof Kozlowski authored
Only -ENOENT from devm_clk_get() means that clock is not present in device tree. Other errors have their own meaning and should not be ignored. Simplify getting the clock which is in fact optional and also use dev_err_probe() for handling deferred. Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20200902193658.20539-7-krzk@kernel.orgSigned-off-by:
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Krzysztof Kozlowski authored
dma_addr_t size varies between architectures so use dedicated printk format to fix compile testing warning (e.g. on 32-bit MIPS): drivers/mmc/host/sdhci-of-sparx5.c:63:11: warning: format ‘%llx’ expects argument of type ‘long long unsigned int’, but argument 5 has type ‘dma_addr_t {aka unsigned int}’ [-Wformat=] Signed-off-by:Lars Povlsen <larc.povlsen@microchip.com> Signed-off-by:
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Krzysztof Kozlowski authored
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code, the error value gets printed and real error from dw_mci_parse_dt() is passed further instead of fixed -EINVAL. Signed-off-by:
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Krzysztof Kozlowski authored
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by:
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Krzysztof Kozlowski authored
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by:
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Krzysztof Kozlowski authored
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by:
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Krzysztof Kozlowski authored
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by:
Paul Cercueil <paul@crapouillou.net> Signed-off-by:
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Krzysztof Kozlowski authored
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by:
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Krzysztof Kozlowski authored
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by:
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Krzysztof Kozlowski authored
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by:
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Matthias Schiffer authored
As with GPIO, UART and others, allow specifying the device index via the aliases node in the device tree. On embedded devices, there is often a combination of removable (e.g. SD card) and non-removable MMC devices (e.g. eMMC). Therefore the index might change depending on * host of removable device * removable card present or not This makes it difficult to hardcode the root device, if it is on the non-removable device. E.g. if SD card is present eMMC will be mmcblk1, if SD card is not present at boot, eMMC will be mmcblk0. Alternative solutions like PARTUUIDs do not cover the case where multiple mmcblk devices contain the same image. This is a common issue on devices that can boot both from eMMC (for regular boot) and SD cards (as a temporary boot medium for development). When a firmware image is installed to eMMC after a test boot via SD card, there will be no reliable way to refer to a specific device using (PART)UUIDs oder LABELs. The demand for this feature has led to multiple attempts to implement it, dating back at least to 2012 (see https://www.spinics.net/lists/linux-mmc/msg26586.html for a previous discussion from 2014). All indices defined in the aliases node will be reserved for use by the respective MMC device, moving the indices of devices that don't have an alias up into the non-reserved range. If the aliases node is not found, the driver will act as before. This is a rebased and cleaned up version of https://www.spinics.net/lists/linux-mmc/msg26588.html . Based-on-patch-by:
Sascha Hauer <s.hauer@pengutronix.de> Link: https://lkml.org/lkml/2020/8/5/194Signed-off-by:
Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/20200901085004.2512-2-matthias.schiffer@ew.tq-group.comSigned-off-by:
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Matthias Schiffer authored
As for I2C and SPI, it now is possible to reserve a fixed index for mmc/mmcblk devices. Signed-off-by:
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Wolfram Sang authored
Signed-off-by:
Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200831102324.12566-1-wsa+renesas@sang-engineering.comSigned-off-by:
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Krzysztof Kozlowski authored
There might be multiple reset GPIOs but dtschema has trouble parsing it if there are no maxItems: arch/arm/boot/dts/exynos5250-snow.dt.yaml: mmc3_pwrseq: reset-gpios: [[20, 2, 1], [20, 1, 1]] is too long From schema: Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.yaml Signed-off-by: -
Krzysztof Kozlowski authored
The i.MX 8 DTSes use two compatibles so update the binding to fix dtbs_check warnings like: arch/arm64/boot/dts/freescale/imx8mn-evk.dt.yaml: mmc@30b40000: compatible: ['fsl,imx8mn-usdhc', 'fsl,imx7d-usdhc'] is too long From schema: Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml arch/arm64/boot/dts/freescale/imx8mn-evk.dt.yaml: mmc@30b40000: compatible: Additional items are not allowed ('fsl,imx7d-usdhc' was unexpected) arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dt.yaml: mmc@30b40000: compatible: ['fsl,imx8mn-usdhc', 'fsl,imx7d-usdhc'] is too long Signed-off-by: -
Stefan Wahren authored
The emmc2 interface on the bcm2711 supports DDR modes for eMMC devices running at 3.3V. This allows to run eMMC module with 3.3V signaling voltage at DDR52 mode on the Raspberry Pi 4 using a SD adapter: clock: 52000000 Hz actual clock: 50000000 Hz vdd: 21 (3.3 ~ 3.4 V) bus mode: 2 (push-pull) chip select: 0 (don't care) power mode: 2 (on) bus width: 2 (4 bits) timing spec: 8 (mmc DDR52) signal voltage: 0 (3.30 V) driver type: 0 (driver type B) Link: https://github.com/raspberrypi/linux/issues/3802Signed-off-by:
Stefan Wahren <stefan.wahren@i2se.com> Link: https://lore.kernel.org/r/1598651234-29826-1-git-send-email-stefan.wahren@i2se.comSigned-off-by:
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Chun-Hung Wu authored
CQHCI_ENABLE bit in CQHCI_CFG should be disabled after msdc_cqe_disable(), and should be enabled before msdc_ceq_enable() for MTK platform. Add hook functions for cqhci_host_ops->pre_enable() and cqhci_host_ops->post_disable(). Signed-off-by:
Chun-Hung Wu <chun-hung.wu@mediatek.com> Acked-by:
Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/1598520783-25250-3-git-send-email-chun-hung.wu@mediatek.comSigned-off-by:
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Chun-Hung Wu authored
Add pre_enable() and post_disable() for cqhci_host_ops. Add hook functions before cqhci enable and after cqhci disable for platforms need them. Signed-off-by:
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Veerabhadrarao Badiganti authored
On sc7180 target, issues are observed with HS400 mode due to a hardware limitation. If sdcc clock is dynamically gated and ungated, the very next command is failing with command CRC/timeout errors. To mitigate this issue, DLL phase has to be restored whenever sdcc clock is gated dynamically. The restore_dll_config ensures this. Enabling this flag with this change. And simply re-using the sdm845 target configuration for this flag. Signed-off-by:
Veerabhadrarao Badiganti <vbadigan@codeaurora.org> Reviewed-by:
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Wolfram Sang authored
After all the previous refactorization, we can now populate mmc_ops directly and don't need a layer inbetween. The NULL-pointer check and the error printout are already done by the MMC core. Signed-off-by:
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Wolfram Sang authored
SDHI needs to reset the SCC only, not the whole IP core. So, if tuning fails, don't handle specifics in the generic TMIO core, but in the specific drivers. For SDHI, we need to move around the reset routine a bit. It is not modified. Signed-off-by:
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Wolfram Sang authored
Some TMIO variants need specific actions in their reset routine, but they are all based on a generic reset routine. So, the optional 'reset' callback will now only take care of the additional stuff and we will have a generic function around it. Less code, easier to maintain, and much more readable. Code in tmio_mmc.c is untested but in my TC6387XB datasheet the SDIO part is reset independently from the SD part, too. Signed-off-by:
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Wolfram Sang authored
After Yamada-san's refactorization introducing 'tmio_mmc_host_alloc', we can populate mmc_ops directly and don't need a layer inbetween. Signed-off-by:
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Wolfram Sang authored
This reverts commit a87852c6. It did fix the issue, but was building on top of already wrong assumptions. The driver missed that 'hw_reset' was only for resetting remote HW (card) and not for the IP core. Since we fixed that in a previous patch, we can now remove this patch to make it clear that 'reset' is for resetting the IP core only. Also, cancelling DMA will only be called when actually needed again. It will also allow for further cleanups and better readability. Note that in addition to the revert, the call in 'tmio_mmc_execute_tuning' will be converted, too, to maintain the current behaviour. Signed-off-by:
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Wolfram Sang authored
This driver got the usage of 'hw_reset' wrong and missed that it is used to reset the remote HW (card) only, not the local one (controller). Move everything to the proper 'reset' callback. Also, add the generic reset code from TMIO, so we will ensure the same behaviour (it will get refactored away in a later patch). This also means we need to drop MMC_CAP_HW_RESET because this is currently not supported by our hardware. Signed-off-by:
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Faiz Abbas authored
There is a one time delay because of a card detect debounce timer in the controller IP. This timer runs as soon as power is applied to the module regardless of whether a card is present or not and any writes to SDHCI_POWER_ON will return 0 before it expires. This timeout has been measured to be about 1 second in am654x and j721e. Write-and-read-back in a loop on SDHCI_POWER_ON for a maximum of 1.5 seconds to make sure that the controller actually powers on. Signed-off-by:
Faiz Abbas <faiz_abbas@ti.com> Link: https://lore.kernel.org/r/20200825170015.32285-1-faiz_abbas@ti.comSigned-off-by:
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Alex Dewar authored
There seems to be no particular reason to only test for ARM, so allow for build-testing on other platforms to increase coverage. Build-tested on x86 with allyesconfig. Signed-off-by:
Alex Dewar <alex.dewar90@gmail.com> Link: https://lore.kernel.org/r/20200824171854.406157-1-alex.dewar90@gmail.comSigned-off-by:
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Haibo Chen authored
Value assigned to a variable(err) is never used, so remove it. Signed-off-by:
Haibo Chen <haibo.chen@nxp.com> Acked-by:
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Tian Tao authored
Use kobj_to_dev() instead of container_of() Signed-off-by:
Tian Tao <tiantao6@hisilicon.com> Link: https://lore.kernel.org/r/1598230956-58523-1-git-send-email-tiantao6@hisilicon.comSigned-off-by:
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Lars Povlsen authored
This adds the eMMC driver for the Sparx5 SoC. It is based upon the designware IP, but requires some extra initialization and quirks. Signed-off-by:
Lars Povlsen <lars.povlsen@microchip.com> Acked-by:
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Lars Povlsen authored
The Sparx5 SDHCI controller is based on the Designware controller IP. Signed-off-by:
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Madhuparna Bhowmik authored
via_save_pcictrlreg() should be called with host->lock held as it writes to pm_pcictrl_reg, otherwise there can be a race condition between via_sd_suspend() and via_sdc_card_detect(). The same pattern is used in the function via_reset_pcictrl() as well, where via_save_pcictrlreg() is called with host->lock held. Found by Linux Driver Verification project (linuxtesting.org). Signed-off-by:
Madhuparna Bhowmik <madhuparnabhowmik10@gmail.com> Link: https://lore.kernel.org/r/20200822061528.7035-1-madhuparnabhowmik10@gmail.comSigned-off-by:
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