- 10 Mar, 2022 8 commits
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Vasily Gorbik authored
With z10 as minimum supported machine generation the store-clock-fast facility (25) is always present and checked in als code. Drop alternatives and always use stckf. Acked-by:
Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by:
Heiko Carstens <hca@linux.ibm.com> Signed-off-by:
Vasily Gorbik <gor@linux.ibm.com>
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Vasily Gorbik authored
Assembler generated expoline thunks were in a form __s390_indirect_jump_rXuse_rX when exrl instruction has not been available. Now with z10 as minimum supported machine generation there is no need for 2 register thunks, always generate __s390_indirect_jump_rX versions. Acked-by:
Sumanth Korikkar <sumanthk@linux.ibm.com> Acked-by:
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Vasily Gorbik authored
Machine generations up to z9 (released in May 2006) have been officially out of service for several years now (z9 end of service - January 31, 2019). No distributions build kernels supporting those old machine generations anymore, except Debian, which seems to pick the oldest supported generation. The team supporting Debian on s390 has been notified about the change. Raising minimum supported machine generation to z10 helps to reduce maintenance cost and effectively remove code, which is not getting enough testing coverage due to lack of older hardware and distributions support. Besides that this unblocks some optimization opportunities and allows to use wider instruction set in asm files for future features implementation. Due to this change spectre mitigation and usercopy implementations could be drastically simplified and many newer instructions could be converted from ".insn" encoding to instruction names. Acked-by:
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Janis Schoetterl-Glausch authored
Add copy_from/to_user_key functions, which perform storage key checking. These functions can be used by KVM for emulating instructions that need to be key checked. These functions differ from their non _key counterparts in include/linux/uaccess.h only in the additional key argument and must be kept in sync with those. Since the existing uaccess implementation on s390 makes use of move instructions that support having an additional access key supplied, we can implement raw_copy_from/to_user_key by enhancing the existing implementation. Signed-off-by:
Janis Schoetterl-Glausch <scgl@linux.ibm.com> Acked-by:
Christian Borntraeger <borntraeger@linux.ibm.com> Acked-by:
Janosch Frank <frankja@linux.ibm.com> Link: https://lore.kernel.org/r/20220211182215.2730017-2-scgl@linux.ibm.comSigned-off-by:
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Vasily Gorbik authored
Kernel has full control over how extern thunks generated by arch/s390/lib/expoline.S look like. Align them to 16 bytes like other symbols. Also set proper symbols size which is important for tooling. Acked-by:
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Vasily Gorbik authored
Currently with -mindirect-branch=thunk and -mfunction-return=thunk compiler options expoline thunks are put into individual COMDAT group sections. s390 is the only architecture which has group sections and it has implications for kpatch and objtool tools support. Using -mindirect-branch=thunk-extern and -mfunction-return=thunk-extern is an alternative, which comes with a need to generate all required expoline thunks manually. Unfortunately modules area is too far away from the kernel image, and expolines from the kernel image cannon be used. But since all new distributions (except Debian) build kernels for machine generations newer than z10, where "exrl" instruction is available, that leaves only 16 expolines thunks possible. Provide an option to build the kernel with -mindirect-branch=thunk-extern and -mfunction-return=thunk-extern for z10 or newer. This also requires to postlink expoline thunks into all modules explicitly. Currently modules already contain most expolines anyhow. Unfortunately -mindirect-branch=thunk-extern and -mfunction-return=thunk-extern options support is broken in gcc <= 11.2. Additional compile test is required to verify proper gcc support. Acked-by:
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Vasily Gorbik authored
Currently assembler generated expoline thunks are always in a form __s390_indirect_jump_rXuse_rX even when exrl instruction is available and no additional register is utilized. Generate __s390_indirect_jump_rX versions using a single register if the kernel is built for z10 or newer machine, which have exrl instruction available. Thunks generated are identical to the ones generated by the compiler. This helps to reduce the number of thunks for newer machines generations. Acked-by:
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Niklas Schnelle authored
Commit c1e18c17 ("s390/pci: add zpci_set_irq()/zpci_clear_irq()") made zpci_set_irq()/zpci_clear_irq() non-static in preparation for using them in zpci_hot_reset_device(). The version of zpci_hot_reset_device() that was finally merged however exploits the fact that IRQs and DMA is implicitly disabled by clp_disable_fh() so the call to zpci_clear_irq() was never added. There are no other calls outside pci_irq.c so lets make both functions static. Signed-off-by:
Niklas Schnelle <schnelle@linux.ibm.com> Signed-off-by:
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- 07 Mar, 2022 24 commits
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Vasily Gorbik authored
This reverts commit 6deaa3bb ("s390: extend expoline to BC instructions"). Expolines to BC instructions were added to be utilized by commit de5cb6eb ("s390: use expoline thunks in the BPF JIT"). But corresponding code has been removed by commit e1cf4bef ("bpf, s390x: remove ld_abs/ld_ind"). And compiler does not generate such expolines as well. Compared to regular expolines, expolines to BC instructions contain displacement and all possible variations cannot be generated in advance, making kpatch support more complicated. So, remove those to avoid future usages. Acked-by:
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Heiko Carstens authored
Change struct ext_code to contain a union which allows to simply assign the int_code instead of using a cast. In order to keep the patch small the anonymous union is embedded within the existing struct instead of changing the struct ext_code to a union. Signed-off-by:
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Heiko Carstens authored
Add a proper union in lowcore to reflect architecture and get rid of a "magic" cast in order to read the full per code. Signed-off-by:
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Heiko Carstens authored
Add a proper union in lowcore to reflect architecture and get rid of a "magic" cast in order to read the full program interruption code. Signed-off-by:
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Heiko Carstens authored
Signed-off-by:
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Heiko Carstens authored
Signed-off-by:
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Vasily Gorbik authored
Fix the following build warning with W=1 arch/s390/lib/test_unwind.c:172:21: warning: variable 'fops' set but not used [-Wunused-but-set-variable] struct ftrace_ops *fops; Reported-by:kernel test robot <lkp@intel.com> Signed-off-by:
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Heiko Carstens authored
The only user is gone. Remove the section. Reviewed-by:
Alexander Gordeev <agordeev@linux.ibm.com> Signed-off-by:
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Heiko Carstens authored
Instead of decoding the instruction that faulted to get the register which needs to be zeroed, simply encode its number into the extable entries during code generation. This allows to get rid of a bit of code, and is also what other architectures are doing. Acked-by:
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Heiko Carstens authored
This is more or less a combination of commit 2e77a62c ("arm64: extable: add a dedicated uaccess handler") and commit 4b5305de ("x86/extable: Extend extable functionality"). To describe the problem that needs to solved let's cite the full arm64 commit message: ------ For inline assembly, we place exception fixups out-of-line in the `.fixup` section such that these are out of the way of the fast path. This has a few drawbacks: * Since the fixup code is anonymous, backtraces will symbolize fixups as offsets from the nearest prior symbol, currently `__entry_tramp_text_end`. This is confusing, and painful to debug without access to the relevant vmlinux. * Since the exception handler adjusts the PC to execute the fixup, and the fixup uses a direct branch back into the function it fixes, backtraces of fixups miss the original function. This is confusing, and violates requirements for RELIABLE_STACKTRACE (and therefore LIVEPATCH). * Inline assembly and associated fixups are generated from templates, and we have many copies of logically identical fixups which only differ in which specific registers are written to and which address is branched to at the end of the fixup. This is potentially wasteful of I-cache resources, and makes it hard to add additional logic to fixups without significant bloat. This patch address all three concerns for inline uaccess fixups by adding a dedicated exception handler which updates registers in exception context and subsequent returns back into the function which faulted, removing the need for fixups specialized to each faulting instruction. Other than backtracing, there should be no functional change as a result of this patch. ------ Acked-by:
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Heiko Carstens authored
Follow arm64, riscv, and x86 and change extable layout to common "relative table with data". This allows to get rid of s390 specific code in sorttable.c. The main difference to before is that extable entries do not contain a relative function pointer anymore. Instead data and type fields are added. The type field is used to indicate which exception handler needs to be called, while the data field is currently unused. Acked-by:
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Heiko Carstens authored
Add and use fixup_exception helper function in order to remove the duplicated exception handler fixup code at several places. Reviewed-by:
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Heiko Carstens authored
Pass pt_regs to early program check handler like it is done for every other interrupt and exception handler. Also the passed pt_regs can be changed by the called function and the changes register contents and psw contents will be taken into account when returning. In addition the return psw will not be copied to the program check old psw in lowcore, but to the usual return psw location, like it is also done by the regular program check handler. This allows also to get rid of the code that disabled lowcore protection when changing the return address. Reviewed-by:
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Heiko Carstens authored
Just like arm64, riscv, and x86 move extable related functions to mm/extable.c. This is currently only one function, but this will change with subsequent changes. Reviewed-by:
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Heiko Carstens authored
Follow arm64 and riscv and move the EX_TABLE define to asm-extable.h which is a lot less generic than the current linkage.h. Also make sure that all files which contain EX_TABLE usages actually include the new header file. This should make sure that the files always compile and there won't be any random compile breakage due to other header file dependencies. Reviewed-by:
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Heiko Carstens authored
It is very unlikely that an exception happens within the amode31 text section, therefore safe a couple of cycles for the common case, and search the amode31 extable last. Reviewed-by:
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Heiko Carstens authored
The early program check handler is active before the amode31 extable is sorted. Therefore in case a program check happens early within the amode31 code the extable entry might not be found. Fix this by sorting the amode31 extable early. Signed-off-by:
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Halil Pasic authored
Protected virtualization guests have to use shared pages for airq notifier bit vectors and summary bytes or bits, thus these need to be allocated as DMA coherent memory. Commit b50623e5 ("s390/airq: use DMA memory for adapter interrupts") took care of the notifier bit vectors, but omitted to take care of the summary bytes/bits. In practice this omission is not a big deal, because the summary ain't necessarily allocated here, but can be supplied by the driver. Currently all the I/O we have for SE guests is virtio-ccw, and virtio-ccw uses a self-allocated array of summary indicators. Let us cover all our bases nevertheless! Signed-off-by:
Halil Pasic <pasic@linux.ibm.com> Reviewed-by:
Harald Freudenberger <freude@linux.ibm.com> Signed-off-by:
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Jürgen Christ authored
The scheduling function will get an extension which will process the target_id value from an EP11 cprb. This patch extracts the value during preparation of the ap message. Signed-off-by:
Jürgen Christ <jchrist@linux.ibm.com> Signed-off-by:
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Harald Freudenberger authored
Instead of offering the user space given receive buffer size to the crypto card firmware as limit for the reply message offer the internal per queue reply buffer size. As the queue's reply buffer is always adjusted to the max message size possible for this card this may offer more buffer space. However, now it is important to check the user space reply buffer on pushing back the reply. If the reply does not fit into the user space provided buffer the ioctl will fail with errno EMSGSIZE. Signed-off-by:
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Harald Freudenberger authored
There is a new CPRB minor version T7 to be supported with this patch. Together with this the functions which extract the CPRB data from userspace and prepare the AP message do now check the CPRB minor version and provide some info in the flag field of the ap message struct for further processing. The 3 functions doing this job have been renamed to prep_cca_ap_msg, prep_ep11_ap_msg and prep_rng_ap_msg to reflect their job better (old was get..fc). This patch also introduces two new flags to be used internal with the flag field of the struct ap_message: AP_MSG_FLAG_USAGE is set when prep_cca_ap_msg or prep_ep11_ap_msg come to the conclusion that this is a ordinary crypto load CPRB (which means T2 for CCA CPRBs and no admin bit for EP11 CPRBs). AP_MSG_FLAG_ADMIN is set when prep_cca_ap_msg or prep_ep11_ap_msg think, this is an administrative (control) crypto load CPRB (which means T3, T5, T6 or T7 for CCA CPRBs and admin bit set for EP11 CPRBs). Signed-off-by:
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Harald Freudenberger authored
A crypto card may be in checkstopped state. With this patch this is handled as a new state in the ap card and ap queue structs. There is also a new card sysfs attribute /sys/devices/ap/cardxx/chkstop and a new queue sysfs attribute /sys/devices/ap/cardxx/xx.yyyy/chkstop displaying the checkstop state of the card or queue. Please note that the queue's checkstop state is only a copy of the card's checkstop state but makes maintenance much easier. The checkstop state expressed here is the result of an RC 0x04 (CHECKSTOP) during an AP command, mostly the PQAP(TAPQ) command which is 'testing' the queue. Signed-off-by:
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Harald Freudenberger authored
This patch adds CEX8 exploitation support for the AP bus code, the zcrypt device driver zoo and the vfio device driver. Signed-off-by:
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Harald Freudenberger authored
This patch adds some debug feature improvements related to some failures happened in the past. With CEX8 the max request and response sizes have been extended but the user space applications did not rework their code and thus ran into receive buffer issues. This ffdc patch here helps with additional checks and debug feature messages in debugging and pointing to the root cause of some failures related to wrong buffer sizes. Signed-off-by:
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- 01 Mar, 2022 8 commits
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Heiko Carstens authored
Disallow constructs like this: pte_val(*pte) = __pa(addr) | prot; which would directly write into a page table. Users are supposed to use the set_pte()/set_pXd() primitives, which guarantee block concurrent (aka atomic) writes. Reviewed-by:Claudio Imbrenda <imbrenda@linux.ibm.com> Reviewed-by:
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Heiko Carstens authored
Convert pgtable code so pte_val()/pXd_val() aren't used as lvalue anymore. This allows in later step to convert pte_val()/pXd_val() to functions, which in turn makes it impossible to use these macros to modify page table entries like they have been used before. Therefore a construct like this: pte_val(*pte) = __pa(addr) | prot; which would directly write into a page table, isn't possible anymore with the last step of this series. Reviewed-by: -
Heiko Carstens authored
Convert pgtable code so pte_val()/pXd_val() aren't used as lvalue anymore. This allows in later step to convert pte_val()/pXd_val() to functions, which in turn makes it impossible to use these macros to modify page table entries like they have been used before. Therefore a construct like this: pte_val(*pte) = __pa(addr) | prot; which would directly write into a page table, isn't possible anymore with the last step of this series. Reviewed-by: -
Heiko Carstens authored
Convert pgtable code so pte_val()/pXd_val() aren't used as lvalue anymore. This allows in later step to convert pte_val()/pXd_val() to functions, which in turn makes it impossible to use these macros to modify page table entries like they have been used before. Therefore a construct like this: pte_val(*pte) = __pa(addr) | prot; which would directly write into a page table, isn't possible anymore with the last step of this series. Reviewed-by: -
Heiko Carstens authored
Convert pgtable code so pte_val()/pXd_val() aren't used as lvalue anymore. This allows in later step to convert pte_val()/pXd_val() to functions, which in turn makes it impossible to use these macros to modify page table entries like they have been used before. Therefore a construct like this: pte_val(*pte) = __pa(addr) | prot; which would directly write into a page table, isn't possible anymore with the last step of this series. Reviewed-by: -
Heiko Carstens authored
Use the new set_pXd()/set_pte() helper functions at all places where page table entries are modified. Reviewed-by:
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Heiko Carstens authored
Add set_pte_bit()/clear_pte_bit() and set_pXd_bit()/clear_pXd_bit helper functions which are supposed to be used if bits within ptes/pXds are set/cleared. The only point of these helper functions is to get more readable code. This is quite similar to what arm64 has. Reviewed-by:
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Heiko Carstens authored
Add set_pXd()/set_pte() helper functions which must be used to update page table entries. The new helpers use WRITE_ONCE() to make sure that a page table entry is written to only once. Without this the compiler could otherwise generate code which writes several times to a page table entry when updating its contents from invalid to valid, which could lead to surprising results especially for multithreaded processes... Reviewed-by:
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