1. 14 Oct, 2003 1 commit
    • Tony Luck's avatar
      [PATCH] ia64: Another MCA fix · 10c59cf0
      Tony Luck authored
      The definition of the pal_process_state_info_s structure
      misses out some useful pieces (e.g. the "mi" bit which indicates
      whether we should call PAL_MC_ERROR_INFO to get more details).
      
      Worse yet, some of the bits are in the wrong places (cc/tc/bc).
      
      See Volume 2 of "Intel Itanium Architecture Software Developer's
      Manual".  (In the Rev 2.1 October 2002 edition, p. 2:268 and 2:276).
      10c59cf0
  2. 13 Oct, 2003 2 commits
    • Tony Luck's avatar
      [PATCH] ia64: cannot convert region 5 address to physical by clearing bits 63:61 · d9f2ec86
      Tony Luck authored
      Another no-brainer bug fix snipped out of the quagmire of
      the MCA/TLB patch.  This one is for 2.6 only, we must use
      the new LOAD_PHYSICAL() macro to get the physical address of
      the code label that we want to jump to, the INST_VA_TO_PA()
      macro just clears the region bits, which only works for region
      7 addresses.
      d9f2ec86
    • Tony Luck's avatar
      [PATCH] ia64: infinite loop in ia64_mca_wakeup_ipi_wait · bcf50865
      Tony Luck authored
      This bugfix has been hiding inside the MCA TLB patches.
      
      There is an infinite loop in ia64_mca_wakeup_ipi_wait() because
      the compiler optimizes away the test at the bottom of the while
      loop.  It does this because IA64_MCA_WAKEUP_VECTOR is 0xf0, so
      irr_bit is known to be the constant 0x30, a.k.a. 48 in decimal.
      So when the compiler looks at the expression:
      
      
      It observes that 1' as unsigned
      long.
      bcf50865
  3. 10 Oct, 2003 8 commits
  4. 09 Oct, 2003 9 commits
  5. 08 Oct, 2003 20 commits