- 31 Jan, 2018 10 commits
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Bjorn Helgaas authored
* pci/msi: PCI: Disable MSI for HiSilicon Hip06/Hip07 only in Root Port mode
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Bjorn Helgaas authored
* pci/misc: PCI: Add dummy pci_irqd_intx_xlate() for CONFIG_PCI=n build PCI: Add wrappers for dev_printk() PCI: Remove unnecessary messages for memory allocation failures PCI: Add #defines for Completion Timeout Disable feature hinic: Replace PCI pool old API net: e100: Replace PCI pool old API block: DAC960: Replace PCI pool old API MAINTAINERS: Include more PCI files PCI: Remove unneeded kallsyms include powerpc/pci: Unroll two pass loop when scanning bridges powerpc/pci: Use for_each_pci_bridge() helper
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Bjorn Helgaas authored
* pci/hotplug: PCI: pciehp: Assume NoCompl+ for Thunderbolt ports PCI: hotplug: Drop checking of PCI_BRIDGE_CONTROL in *_unconfigure_device()
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Bjorn Helgaas authored
* pci/enumeration: RDMA/qedr: Use pci_enable_atomic_ops_to_root() PCI: Add pci_enable_atomic_ops_to_root() PCI: Make PCI_SCAN_ALL_PCIE_DEVS work for Root as well as Downstream Ports
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Bjorn Helgaas authored
* pci/dt-resources: PCI: Make of_irq_parse_pci() static powerpc/pci: Use of_irq_parse_and_map_pci() helper PCI: Move OF-related PCI functions into PCI core
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Bjorn Helgaas authored
* pci/dpc: PCI/DPC: Reformat DPC register definitions PCI/DPC: Add and use DPC Status register field definitions PCI/DPC: Squash dpc_rp_pio_get_info() into dpc_process_rp_pio_error() PCI/DPC: Remove unnecessary RP PIO register structs PCI/DPC: Push dpc->rp_pio_status assignment into dpc_rp_pio_get_info() PCI/DPC: Squash dpc_rp_pio_print_error() into dpc_rp_pio_get_info() PCI/DPC: Make RP PIO log size check more generic PCI/DPC: Rename local "status" to "dpc_status" PCI/DPC: Squash dpc_rp_pio_print_tlp_header() into dpc_rp_pio_print_error() PCI/DPC: Process RP PIO details only if RP PIO extensions supported PCI/DPC: Read RP PIO Log Size once at probe PCI/DPC: Rename struct dpc_dev.rp to rp_extensions PCI/DPC: Add local variable for DPC capability offset PCI/DPC: Rename interrupt_event_handler() to dpc_work() PCI/DPC: Fix interrupt message number print PCI/DPC: Enable DPC only if AER is available PCI/DPC: Fix shared interrupt handling
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Bjorn Helgaas authored
* pci/dma: PCI: Remove NULL device handling from PCI DMA API net: tsi108: Use DMA API properly media: ttusb-dec: Remove pci_zalloc_coherent() abuse media: ttusb-budget: Remove pci_zalloc_coherent() abuse
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Bjorn Helgaas authored
* pci/deprecate-get-bus-and-slot: video: fbdev: riva: deprecate pci_get_bus_and_slot() video: fbdev: nvidia: deprecate pci_get_bus_and_slot() video: fbdev: intelfb: deprecate pci_get_bus_and_slot() openprom: Deprecate pci_get_bus_and_slot() xen/pcifront: Deprecate pci_get_bus_and_slot() PCI: Deprecate pci_get_bus_and_slot() PCI: ibmphp: Deprecate pci_get_bus_and_slot() PCI: cpqhp: Deprecate pci_get_bus_and_slot() pch_gbe: Deprecate pci_get_bus_and_slot() bnx2x: Deprecate pci_get_bus_and_slot() powerpc/via-pmu: Deprecate pci_get_bus_and_slot() iommu/amd: Deprecate pci_get_bus_and_slot() sl82c105: deprecate pci_get_bus_and_slot() drm/nouveau: deprecate pci_get_bus_and_slot() drm/gma500: Deprecate pci_get_bus_and_slot() ibft: Deprecate pci_get_bus_and_slot() edd: Deprecate pci_get_bus_and_slot() agp: sworks: Deprecate pci_get_bus_and_slot() agp: nvidia: Deprecate pci_get_bus_and_slot() ata: Deprecate pci_get_bus_and_slot() x86/PCI: Deprecate pci_get_bus_and_slot() powerpc/PCI: Deprecate pci_get_bus_and_slot() alpha/PCI: Deprecate pci_get_bus_and_slot()
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Bjorn Helgaas authored
* pci/aspm: PCI/ASPM: Unexport internal ASPM interfaces PCI/ASPM: Enable Latency Tolerance Reporting when supported PCI/ASPM: Calculate LTR_L1.2_THRESHOLD from device characteristics
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Bjorn Helgaas authored
* pci/aer: PCI/AER: Return error if AER is not supported PCI/AER: Skip recovery callbacks for correctable errors from ACPI APEI
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- 30 Jan, 2018 13 commits
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Bjorn Helgaas authored
Reformat DPC register definitions to follow the convention that register field masks indicate the register width, e.g., a field of a 16-bit register uses a mask of 4 hex digits, with leading zeros included as needed. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Keith Busch <keith.busch@intel.com> Reviewed-by: Sinan Kaya <okaya@codeaurora.org>
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Bjorn Helgaas authored
Add definitions for DPC Status register fields and use them in the code. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Keith Busch <keith.busch@intel.com> Reviewed-by: Sinan Kaya <okaya@codeaurora.org>
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Bjorn Helgaas authored
dpc_process_rp_pio_error() only calls dpc_rp_pio_get_info(), so squash them together. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Keith Busch <keith.busch@intel.com> Reviewed-by: Sinan Kaya <okaya@codeaurora.org>
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Bjorn Helgaas authored
We read and immediately print the RP PIO log registers. We don't save them, so there's no need to define structs for them. Remove the structs and read the registers into local variables instead. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Keith Busch <keith.busch@intel.com> Reviewed-by: Sinan Kaya <okaya@codeaurora.org>
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Bjorn Helgaas authored
Move the dpc->rp_pio_status assignment into dpc_rp_pio_get_info() since that's where we read rp_pio->status anway. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Keith Busch <keith.busch@intel.com> Reviewed-by: Sinan Kaya <okaya@codeaurora.org>
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Bjorn Helgaas authored
Separating dpc_rp_pio_print_error() doesn't really provide any useful abstraction, so squash it into its caller, dpc_rp_pio_get_info(). No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Keith Busch <keith.busch@intel.com> Reviewed-by: Sinan Kaya <okaya@codeaurora.org>
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Bjorn Helgaas authored
In dpc_probe(), we set dpc->rp_log_size to zero if we think the hardware reports an invalid size. In this case, we could have dpc->rp_extensions set but dpc->rp_log_size == 0, and we should print the basic RP PIO registers but not the variable-size portion. We already checked for dpc->rp_log_size < 4 above, so this patch is just for consistency of style. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Keith Busch <keith.busch@intel.com> Reviewed-by: Sinan Kaya <okaya@codeaurora.org>
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Bjorn Helgaas authored
In dpc_rp_pio_get_info() rename the local "status" variable to "dpc_status". This is to make room for another variable named "status" in a subsequent patch. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Keith Busch <keith.busch@intel.com> Reviewed-by: Sinan Kaya <okaya@codeaurora.org>
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Bjorn Helgaas authored
Separating dpc_rp_pio_print_tlp_header() doesn't really provide any useful abstraction, so squash it into its caller, dpc_rp_pio_print_error(). No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Keith Busch <keith.busch@intel.com> Reviewed-by: Sinan Kaya <okaya@codeaurora.org>
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Bjorn Helgaas authored
The RP PIO registers (status, mask, severity, etc) are only implemented if the "RP Extensions for DPC" bit is set in the DPC Capabilities register. Previously we called dpc_process_rp_pio_error(), which reads and decodes those RP PIO registers, whenever the DPC Status register indicated an "RP PIO error" (Trigger Reason == 3 and Trigger Reason Extension == 0). It does seem reasonable to assume that DPC Status would only indicate an RP PIO error if the RP extensions are supported, but PCIe r4.0, sec 7.9.15.4, is actually not explicit about that: it does not say "Trigger Reason Extension == 0 is valid only for Root Ports that support RP Extensions for DPC." Check whether the RP Extensions for DPC are supported before trying to read the RP PIO registers. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Keith Busch <keith.busch@intel.com> Reviewed-by: Sinan Kaya <okaya@codeaurora.org>
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Bjorn Helgaas authored
The RP PIO Log Size is a read-only field in the DPC Capability, so it is constant and known at probe-time, but previously we read it every time we processed an RP PIO error. Read it once in dpc_probe() (if the RP Extensions for DPC are supported) and remember the size in struct dpc_dev. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Keith Busch <keith.busch@intel.com> Reviewed-by: Sinan Kaya <okaya@codeaurora.org>
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Bjorn Helgaas authored
"rp" is ambiguous: it might mean "this DPC device is a Root Port." But in fact, it means "this DPC device is a Root Port *and* it supports a set of DPC Extensions." Rename "rp" to "rp_extensions" to make this more clear. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Keith Busch <keith.busch@intel.com> Reviewed-by: Sinan Kaya <okaya@codeaurora.org>
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Bjorn Helgaas authored
Add a local variable for DPC capability offset and replace repeated use of "dpc->cap_pos" with simply "cap". No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Keith Busch <keith.busch@intel.com> Reviewed-by: Sinan Kaya <okaya@codeaurora.org>
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- 26 Jan, 2018 3 commits
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Bjorn Helgaas authored
Rename interrupt_event_handler() to dpc_work() so there's more useful information in stack traces and similar situations. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Keith Busch <keith.busch@intel.com> Reviewed-by: Sinan Kaya <okaya@codeaurora.org>
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Keith Busch authored
The interrupt message number is the first 5 bits, but the driver was masking only the first 4 bits. Fix that by using the existing define. Signed-off-by: Keith Busch <keith.busch@intel.com> [bhelgaas: remove reformatting (done by another patch)] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Keith Busch authored
The "Determination of DPC Control" implementation note in PCIe r4.0, sec 6.1.10, recommends the operating system always link DPC control to the control of AER, as the two functionalities are strongly connected. To avoid conflicts over whether platform firmware or the OS controls DPC, enable DPC only if AER is enabled in the OS, and the device's error handling does not have firmware-first AER handling. Signed-off-by: Keith Busch <keith.busch@intel.com> Signed-off-by: Bjorn Helgaas <helgaas@kernel.org>
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- 25 Jan, 2018 1 commit
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Rob Herring authored
Now that the DT PCI code is merged into drivers/pci, of_irq_parse_pci() can be static. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Frank Rowand <frowand.list@gmail.com>
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- 24 Jan, 2018 1 commit
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Felix Kuehling authored
Use PCI core interface pci_enable_atomic_ops_to_root() to enable atomic capability. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Michal Kalderon <michal.kalderon@cavium.com> CC: Ram Amrani <Ram.Amrani@cavium.com> CC: Doug Ledford <dledford@redhat.com>
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- 23 Jan, 2018 2 commits
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Jay Cornwall authored
The Atomic Operations feature (PCIe r4.0, sec 6.15) allows atomic transctions to be requested by, routed through and completed by PCIe components. Routing and completion do not require software support. Component support for each is detectable via the DEVCAP2 register. A Requester may use AtomicOps only if its PCI_EXP_DEVCTL2_ATOMIC_REQ is set. This should be set only if the Completer and all intermediate routing elements support AtomicOps. A concrete example is the AMD Fiji-class GPU (which is capable of making AtomicOp requests), below a PLX 8747 switch (advertising AtomicOp routing) with a Haswell host bridge (advertising AtomicOp completion support). Add pci_enable_atomic_ops_to_root() for per-device control over AtomicOp requests. This checks to be sure the Root Port supports completion of the desired AtomicOp sizes and the path to the Root Port supports routing the AtomicOps. Signed-off-by: Jay Cornwall <Jay.Cornwall@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> [bhelgaas: changelog, comments, whitespace] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Lukas Wunner authored
Certain Thunderbolt 1 controllers claim to support Command Completed events (value of 0b in the No Command Completed Support field of the Slot Capabilities register) but in reality they neither set the Command Completed bit in the Slot Status register nor signal a Command Completed interrupt: 8086:1513 CV82524 [Light Ridge 4C 2010] 8086:151a DSL2310 [Eagle Ridge 2C 2011] 8086:151b CVL2510 [Light Peak 2C 2010] 8086:1547 DSL3510 [Cactus Ridge 4C 2012] 8086:1548 DSL3310 [Cactus Ridge 2C 2012] 8086:1549 DSL2210 [Port Ridge 1C 2011] All known newer chips (Redwood Ridge and onwards) set No Command Completed Support, indicating that they do not support Command Completed events. The user-visible impact is that after unplugging such a device, 2 seconds elapse until pciehp is unbound. That's because on ->remove, pcie_write_cmd() is called via pcie_disable_notification() and every call to pcie_write_cmd() takes 2 seconds (1 second for each invocation of pcie_wait_cmd()): [ 337.942727] pciehp 0000:0a:00.0:pcie204: Timeout on hotplug command 0x1038 (issued 21176 msec ago) [ 340.014735] pciehp 0000:0a:00.0:pcie204: Timeout on hotplug command 0x0000 (issued 2072 msec ago) That by itself has always been unpleasant, but the situation has become worse with commit cc27b735 ("PCI/portdrv: Turn off PCIe services during shutdown"): Now pciehp is unbound on ->shutdown. Because Thunderbolt controllers typically have 4 hotplug ports, every reboot and shutdown is now delayed by 8 seconds, plus another 2 seconds for every attached Thunderbolt 1 device. Thunderbolt hotplug slots are not physical slots that one inserts cards into, but rather logical hotplug slots implemented in silicon. Devices appear beyond those logical slots once a PCI tunnel is established on top of the Thunderbolt Converged I/O switch. One would expect commands written to the Slot Control register to be executed immediately by the silicon, so for simplicity we always assume NoCompl+ for Thunderbolt ports. Fixes: cc27b735 ("PCI/portdrv: Turn off PCIe services during shutdown") Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: stable@vger.kernel.org # v4.12+ Cc: Sinan Kaya <okaya@codeaurora.org> Cc: Yehezkel Bernat <yehezkel.bernat@intel.com> Cc: Michael Jamet <michael.jamet@intel.com> Cc: Andreas Noever <andreas.noever@gmail.com>
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- 19 Jan, 2018 1 commit
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Niklas Cassel authored
Some hardware can operate in either "host" or "endpoint" mode, which means there can be both a host bridge driver and an endpoint driver for the same device. Those drivers share a lot of code, so sometimes they live in the same source file. The host bridge driver requires CONFIG_PCI=y because it enumerates PCI devices below the bridge using the PCI core. The endpoint driver does not require CONFIG_PCI=y because it runs in an embedded kernel on the other side of the device, e.g., on an adapter card. pci-dra7xx.c contains both host and endpoint drivers. If we select only the endpoint driver (CONFIG_PCI=n and CONFIG_PCI_DRA7XX_EP=y), the unneeded host driver is still compiled. It references pci_irqd_intx_xlate(), which is not present when CONFIG_PCI=n, which causes this error: drivers/pci/dwc/pci-dra7xx.c:229:11: error: 'pci_irqd_intx_xlate' undeclared here (not in a function) Add a dummy pci_irqd_intx_xlate() for the CONFIG_PCI=n case. [bhelgaas: changelog] Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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- 18 Jan, 2018 5 commits
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Frederick Lawler authored
Add PCI-specific dev_printk() wrappers and use them to simplify the code slightly. No functional change intended. Signed-off-by: Frederick Lawler <fred@fredlawl.com> [bhelgaas: squash into one patch] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Christoph Hellwig authored
Historically some ISA drivers used the old PCI DMA API with a NULL pdev argument, but these days this isn't used and not too useful due to the per-device DMA ops, so remove it. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Christoph Hellwig authored
We need to pass a struct device to the DMA API, even if some architectures still support that for legacy reasons, and should not mix it with the old PCI DMA API. Note that the driver also seems to never actually unmap its DMA mappings, but to fix that we'll need someone more familar with the driver. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Christoph Hellwig authored
Switch to a plain kzalloc() instead of pci_zalloc_coherent() to allocate memory for the USB DMA. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Christoph Hellwig authored
Switch to a plain kzalloc() instead of pci_zalloc_coherent() to allocate memory for the USB DMA. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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- 17 Jan, 2018 4 commits
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Rob Herring authored
Instead of calling both of_irq_parse_pci() and irq_create_of_mapping(), call of_irq_parse_and_map_pci(), which does the same thing. This will allow making of_irq_parse_pci() a private, static function. This changes the logic slightly in that the fallback path will also be taken if irq_create_of_mapping() fails internally. Signed-off-by: Rob Herring <robh@kernel.org> [bhelgaas: fold in virq init from Stephen Rothwell <sfr@canb.auug.org.au>] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Michael Ellerman <mpe@ellerman.id.au>
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Rob Herring authored
Following what has been done for other subsystems, move the remaining PCI related code out of drivers/of/ and into drivers/pci/of.c With this, we can kill a few kconfig symbols. Signed-off-by: Rob Herring <robh@kernel.org> [bhelgaas: minor whitespace, comment cleanups] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Frank Rowand <frowand.list@gmail.com>
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Markus Elfring authored
Per ebfdc409 ("checkpatch: attempt to find unnecessary 'out of memory' messages"), when a memory allocation fails, the memory subsystem emits generic "out of memory" messages (see slab_out_of_memory() for some of this logging). Therefore, additional error messages in the caller don't add much value. Remove messages that merely report "out of memory". This preserves some messages that report additional information, e.g., allocation failures that mean we drop hotplug events. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> [bhelgaas: changelog, squash patches, make similar changes to acpiphp, cpqphp, ibmphp, keep warning when dropping hotplug event] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Sinan Kaya authored
pci_get_bus_and_slot() is restrictive such that it assumes domain=0 as where a PCI device is present. This restricts the device drivers to be reused for other domain numbers. Getting ready to remove pci_get_bus_and_slot() function in favor of pci_get_domain_bus_and_slot(). struct riva_par has a pointer to struct pci_dev. Use the pci_dev member to extract the domain information. Change the function signature for CalcStateExt and RivaGetConfig to pass in struct pci_dev in addition to RIVA_HW_INST so that code inside the riva_hw.c can also calculate domain number and pass it to pci_get_domain_bus_and_slot(). Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Bjorn Helgaas <helgaas@kernel.org> Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
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