- 29 Oct, 2013 40 commits
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Ralf Baechle authored
It was ugly. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Markos Chandras authored
Checking for n<0 && n>9 makes no sense because it can never be true. Moreover, we can have up to 64 vectored interrupts so BUG_ON(n>9) was wrong anyway. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Acked-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5909/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Nobody seems to care about this platform anymore and my attempts to find somebody willing to provide some tlc for PowerTV have failed so far. So let's nuke the bloody thing. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/5910/
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Set ret just so __must_check is satisfied but don't use the variable for anything yet. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
This enables /proc/<pid>/syscall and the ptrace PTRACE_GETREGSET and PTRACE_SETREGSET operations. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
There are no users yet of task_user_regset_view. yet; users will be implemented rsp activated in subsequent commits. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
This gets us rid of the hard to maintain table of the number of syscall arguments and paves the way for further restructuring of the syscall code. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
The generic version is wrong for MIPS. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
These are a leftover of the IRIX compat code which was removed in 2957c9e6 (kernel.org) rsp. b934da913f236bca00c41d9e386e980586000461 (lmo) [[MIPS] IRIX: Goodbye and thanks for all the fish]. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
This is necessary because MIPS doesn't use HAVE_ARCH_SIGINFO_T for historical reasons. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Jayachandran C authored
Allow usage of scratch register for current pgd even when MIPS_PGD_C0_CONTEXT is not configured. MIPS_PGD_C0_CONTEXT is set for 64r2 platforms to indicate availability of Xcontext for saving cpuid, thus freeing Context to be used for saving PGD. This option was also tied to using a scratch register for storing PGD. This commit will allow usage of scratch register to store the current pgd if one can be allocated for the platform, even when MIPS_PGD_C0_CONTEXT is not set. The cpuid will be kept in the CP0 Context register in this case. The code to store the current pgd for the TLB miss handler is now generated in all cases. When scratch register is available, the PGD is also stored in the scratch register. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Patchwork: https://patchwork.linux-mips.org/patch/5906/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Maciej W. Rozycki authored
There is no reliable way to tell R4000/R4400 SC and MC variations apart, however simple heuristic should give good results. Only the MC version supports coherent caching so we can rely on such a mode having been set for KSEG0 by the power-on firmware to reliably indicate an MC processor. SC processors reportedly hang on coherent cached memory accesses and Linux is linked to a cached load address so the firmware has to use the correct caching mode to download the kernel image in a cached mode successfully. OTOH if the firmware chooses to use either the non-coherent cached or the uncached mode for KSEG0 on an MC processor, then the SC variant will be reported, just as we currently do, so no regression here. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: Jonas Gorski <jogo@openwrt.org> Cc: MIPS Mailing List <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/5882/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Maciej W. Rozycki authored
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5877/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Maciej W. Rozycki authored
Commit 70342287 [MIPS: Whitespace cleanup.] did a lot of good and a little damage. Revert the damage. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5875/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Maciej W. Rozycki authored
This change complements commits d0da7c002f7b2a93582187a9e3f73891a01d8ee4 [MIPS: DEC: Convert to new irq_chip functions] and 5359b938 [MIPS: DECstation I/O ASIC DMA interrupt handling fix] and implements automatic handling of the two classes of DMA interrupts the I/O ASIC implements, informational and errors. Informational DMA interrupts do not stop the transfer and use the `handle_edge_irq' handler that clears the request right away so that another request may be recorded while the previous is being handled. DMA error interrupts stop the transfer and require a corrective action before DMA can be reenabled. Therefore they use the `handle_fasteoi_irq' handler that only clears the request on the way out. Because MIPS processor interrupt inputs, one of which the I/O ASIC's interrupt controller is cascaded to, are level-triggered it is recommended that error DMA interrupt action handlers are registered with the IRQF_ONESHOT flag set so that they are run with the interrupt line masked. This change removes the export of clear_ioasic_dma_irq that now does not have to be called by device drivers to clear interrupts explicitly anymore. Originally these interrupts were cleared in the .end handler of the `irq_chip' structure, before it was removed. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5874/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Felix Fietkau authored
The semantics stay the same - on Cavium Octeon the functions were dead code (it overrides the MIPS DMA ops) - on other platforms they contained no code at all. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5720/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Yoichi Yuasa authored
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/948/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Yoichi Yuasa authored
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/947/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Florian Fainelli authored
Add support for the LZ4 compression scheme in the ZBOOT decompression stub, in order to support it we need to: - select the "lz4" compression tool to compress the vmlinux.bin payload - memcpy() is also required for decompress_unlz4.c so we share the implementation between GZIP, XZ and now LZ4 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org Cc: blogic@openwrt.org Cc: james.hogan@imgtec.com Patchwork: https://patchwork.linux-mips.org/patch/5829/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Florian Fainelli authored
There is currently no corresponding ELF program header for the "text" loadable segment which is confusing for some bootloader out there such as CFE because it expects to find a program header matching the segment it is trying to load. The Linux kernel ELF binary "vmlinux" has a similar program header for the text segment so we just mimic this here too. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org Cc: blogic@openwrt.org Cc: james.hogan@imgtec.com Patchwork: https://patchwork.linux-mips.org/patch/5827/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Florian Fainelli authored
Add support for the XZ compression scheme in the ZBOOT decompression stub, in order to support it we need to: - select the "xzkern" compression tool to compress the vmlinux.bin payload - link with ashldi3.o for xz_dec_run() to work - memcpy() is also required for decompress_unxz.c so we share the implementation between GZIP and XZ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org Cc: blogic@openwrt.org Cc: james.hogan@imgtec.com Patchwork: https://patchwork.linux-mips.org/patch/5818/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Florian Fainelli authored
When CONFIG_SYS_SUPPORTS_ZBOOT is not enabled, we will still try to build the decompressor code in arch/mips/boot/compressed as a dependency for producing the vmlinuz target and this will result in the following build failure: OBJCOPY arch/mips/boot/compressed/vmlinux.bin arch/mips/boot/compressed/decompress.c: In function 'decompress_kernel': arch/mips/boot/compressed/decompress.c:105:2: error: implicit declaration of function 'decompress' make[1]: *** [arch/mips/boot/compressed/decompress.o] Error 1 make[1]: *** Waiting for unfinished jobs.... make: *** [vmlinuz] Error 2 This is a genuine build failure because we have no implementation for the decompress() function body since no kernel compression method defined in CONFIG_KERNEL_(GZIP,BZIP2...) has been enabled. arch/mips/Makefile already guards the install target for the "vmlinuz" binary with a proper ifdef CONFIG_SYS_SUPPORTS_ZBOOT, we now also do the same if we attempt to do a "make vmlinuz" and show that CONFIG_SYS_SUPPORTS_ZBOOT is not enabled. [ralf@linux-mips.org: Cleanup the makefile rule as suggested by James Hogan.] Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Cc: blogic@openwrt.org Cc: richard@nod.at Patchwork: https://patchwork.linux-mips.org/patch/5817/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Greg Ungerer authored
Currently when using an initrd on a MIPS system the start of the bootmem region of memory is set to the larger of the end of the kernel bss region (_end) or the end of the initrd. In a typical memory layout where the initrd is at some address above the kernel image this means that the start of the bootmem region will be the end of the initrd. But when we are done processing/loading the initrd we have no way to reclaim the memory region it occupied, and we lose a large chunk of now otherwise empty RAM from our final running system. The bootmem code is designed to allow this initrd to be reserved (and the code in finalize_initrd() currently does this). When the initrd is finally processed/loaded its reserved memory is freed. Fix the setting of the start of the bootmem map to be the end of the kernel. [ralf@linux-mips.org: fold in the fix of Ashok Kumar <ashoks@broadcom.com>.] Signed-off-by: Greg Ungerer <gerg@uclinux.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1574/ Cc: Ashok Kumar <ashoks@broadcom.com> Patchwork: https://patchwork.linux-mips.org/patch/5883/ Patchwork: https://patchwork.linux-mips.org/patch/6028/ Patchwork: https://patchwork.linux-mips.org/patch/6064/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Wu Zhangjin authored
Based on quiet_cmd_X and cmd_X, this patch quiets the building output of vmlinux.32 and vmlinux.64. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: Sam Ravnborg <sam@ravnborg.org> Patchwork: https://patchwork.linux-mips.org/patch/1766/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Panic() is going to add a \n itself and it's annoying if a panic message rolls of the screen on a device with no scrollback. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Original patch by Jianguo Wu <wujianguo@huawei.com>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Andrew Murray authored
This patch converts the pci_load_of_ranges function to use the new common of_pci_range_parser. Signed-off-by: Andrew Murray <amurray@embedded-bits.co.uk> Signed-off-by: Andrew Murray <Andrew.Murray@arm.com> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-mips@linux-mips.org Cc: jason@lakedaemon.net Patchwork: https://patchwork.linux-mips.org/patch/5625/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Hauke Mehrtens authored
The Asus WL520GC and WL520GU are based on the BCM5354 and clocked at 200MHz, but they do not have a clkfreq nvram variable set to the correct value. This adds a workaround for these devices. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5843/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Hauke Mehrtens authored
Some BCM5354 SoCs are running at 200MHz, but it is not possible to read the clock from a register like it is done on some other SoC in ssb and bcma. These devices should have a clkfreq nvram configuration value set to 200, read it and set the clock to the correct value. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5842/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Hauke Mehrtens authored
The nvram contains some gpio configuration for boards. It is stored in a gpio<number>=name format e.g. gpio8=wps_button gpio4=robo_reset This patches adds a function to parse these entries, so other driver can use it. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5841/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Hauke Mehrtens authored
Do not print the constant system type "Broadcom BCM47XX" but print the name of the actual SoC in use and the detected board. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5839/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Hauke Mehrtens authored
Detect on which board this code is running based on some nvram settings. This is needed to start board specific workarounds and configure the leds and buttons which are on different gpios on every board. This patches add some boards we have seen, but there are many more. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5840 Patchwork: https://patchwork.linux-mips.org/patch/5855/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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