- 27 Jul, 2023 2 commits
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Chaitanya Kumar Borah authored
For MTL and beyond, convert back the 24 bit lut values read from HW to 16 bit values to maintain parity with userspace values. This way we avoid pipe config mismatch for pre-csc lut values. v2: Add helper function to downscale values (Jani) Signed-off-by:
Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Reviewed-by:
Uma Shankar <uma.shankar@intel.com> Signed-off-by:
Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230725083002.3779717-3-chaitanya.kumar.borah@intel.com
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Chaitanya Kumar Borah authored
MTL onwards Degamma LUT/PRE-CSC LUT precision has been increased from 16 bits to 24 bits. Currently, drm framework only supports LUTs up to 16 bit precision. Until a new uapi comes along to support higher bitdepth, upscale the values sent from userland to 24 bit before writing into the HW to continue supporting degamma on MTL. Add helper function to upscale or downscale lut values. Parameters 'to' and 'from' needs to be less than 32. This should be sufficient as currently there are no lut values exceeding 32 bit. v2: (Jani) - Reuse glk_load_degamma_lut() - Create a helper function for upscaling values v3: Fix multi line comment style (Uma) v4: Remove extra line(Ankit) Signed-off-by:
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- 26 Jul, 2023 1 commit
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Suraj Kandpal authored
On TGP, the RTC (always running) was reduced from 3MHz to 32KHz. As a result of this change, when HPD active going low pulse or HPD IRQ is presented and the refclk (19.2MHz) is not toggling already toggling, there is a 60 to 90us synchronization delay which effectively reduces the duration of the IRQ pulse to less than the programmed 500us filter value and the hot plug interrupt is NOT registered. Solution was to Reduce SHPD_FILTER to 250us for ADL and above. This solution was derived when the below patch was floated. [1]https://patchwork.freedesktop.org/patch/532187 and after some internal discussion Ville's suggestion made sense. Bspec: 68970 Cc: Uma Shankar <uma.shankar@intel.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Suggested-by:
Ville Syrjala <ville.syrjala@linux.intel.com> Signed-off-by:
Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by:
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- 25 Jul, 2023 1 commit
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Uwe Kleine-König authored
to_i915 is defined as container_of(dev, struct drm_i915_private, drm); So for a struct drm_device *dev, to_i915(dev)->drm is just dev. Simplify accordingly. Signed-off-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by:
Andi Shyti <andi.shyti@linux.intel.com> Signed-off-by:
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- 21 Jul, 2023 1 commit
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Radhakrishna Sripada authored
Dpt objects that are created from internal get evicted when there is memory pressure and do not get restored when pinned during scanout. The pinned page table entries look corrupted and programming the display engine with the incorrect pte's result in DE throwing pipe faults. Create DPT objects from shmem and mark the object as dirty when pinning so that the object is restored when shrinker evicts an unpinned buffer object. v2: Unconditionally mark the dpt objects dirty during pinning(Chris). Fixes: 0dc987b6 ("drm/i915/display: Add smem fallback allocation for dpt") Cc: <stable@vger.kernel.org> # v6.0+ Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Suggested-by:
Chris Wilson <chris.p.wilson@intel.com> Signed-off-by:
Fei Yang <fei.yang@intel.com> Signed-off-by:
Radhakrishna Sripada <radhakrishna.sripada@intel.com> Reviewed-by:
Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230718225118.2562132-1-radhakrishna.sripada@intel.com
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- 20 Jul, 2023 1 commit
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Stanislav Lisovskiy authored
BSpec clearly instructs us to use plane scale factor when calculating relative data rate to be used when allocating DDB blocks for each plane. For some reason we use scale factor for data_rate calculation, which is used for BW calculations, however we are not using it for DDB calculations. So lets fix it as described in BSpec 68907. Signed-off-by:
Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Reviewed-by:
Garg, Nemesa <nemesa.garg@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230719104833.25366-1-stanislav.lisovskiy@intel.com
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- 17 Jul, 2023 1 commit
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Nirmoy Das authored
Use smem on MTL due to a HW bug in MTL that prevents reading from stolen memory using LMEM BAR. v2 and v3: improve stolen skip detection(Andrzej) Cc: Oak Zeng <oak.zeng@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Andi Shyti <andi.shyti@linux.intel.com> Cc: Andrzej Hajda <andrzej.hajda@intel.com> Signed-off-by:
Nirmoy Das <nirmoy.das@intel.com> Reviewed-by:
Oak Zeng <oak.zeng@intel.com> Reviewed-by:
Andrzej Hajda <andrzej.hajda@intel.com> Reviewed-by:
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- 13 Jul, 2023 1 commit
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Jani Nikula authored
This reverts commit 88e96644. __diag_ignore_all() only works for GCC 8 or later. -Woverride-init (from -Wextra, enabled in i915 Makefile) combined with CONFIG_WERROR=y or W=e breaks the build for older GCC. With i386_defconfig and x86_64_defconfig enabling CONFIG_WERROR=y by default, we really need to roll back the change. An alternative would be to disable -Woverride-init in the Makefile for GCC <8, but the revert seems like the safest bet now. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8768Reported-by:
John Garry <john.g.garry@oracle.com> References: https://lore.kernel.org/r/ad2601c0-84bb-c574-3702-a83ff8faf98c@oracle.com References: https://lore.kernel.org/r/87wmzezns4.fsf@intel.com Fixes: 88e96644 ("drm/i915: use localized __diag_ignore_all() instead of per file") Cc: Gustavo Sousa <gustavo.sousa@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Signed-off-by:
Jani Nikula <jani.nikula@intel.com> Reviewed-by:
Gustavo Sousa <gustavo.sousa@intel.com> Tested-by:
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- 12 Jul, 2023 4 commits
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Suraj Kandpal authored
Remove the FIXME and the code related to it as after verification it does seem the previous values were typos and no hardware spec mentions using these particular rc_params. Signed-off-by:
Luca Coelho <luciano.coelho@intel.com> Signed-off-by:
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Suraj Kandpal authored
Some rc_range_parameter calculations were missed for YCbCr420, add them to calculate_rc_param() --v2 -take into account the new formula to get bpp_i --v4 -Fix range_bpg_offset formula for YCbCr420 bpp <= 16 [Ankit] --v5 -Fix comment and mention use of DSC C Model [Ankit] Cc: Vandita Kulkarni <vandita.kulkarni@intel.com> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Cc: Uma Shankar <uma.shankar@intel.com> Signed-off-by:
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Suraj Kandpal authored
Fix comment for YCbCr420 qp table declaration of max value where the min value is 4 and the max value is 12/15/18 depending on bpc. Signed-off-by:
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Suraj Kandpal authored
Move rc_param calculation for native_420 into calculate_rc_parameter. second_line_bpg_offset and second_line_offset_adj are both rc params and it would be better to have these calculated where all the other rc parameters are calculated. --v2 -Add the reason for commit in commit message [Jani] --v3 -Move nsl_second_line_bpg_offset with the other 420 calculation in calculate_rc_param [Ankit] --v4 -Fix comment alignment [Ankit] Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by:
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- 11 Jul, 2023 1 commit
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Simon Ser authored
This adds more information to the hotplug uevent and lets user-space know that it's about a particular connector only. v2: don't rely on the changed HPD pin bitmask to count changed connectors (Jani) Signed-off-by:Simon Ser <contact@emersion.fr> Cc: Jani Nikula <jani.nikula@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Gustavo Sousa <gustavo.sousa@intel.com> Cc: Imre Deak <imre.deak@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by:
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- 10 Jul, 2023 2 commits
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Stanislav Lisovskiy authored
We are currently having FIFO underruns happening for kms_dsc test case, problem is that, we check if curreny cdclk is >= pixel rate only if there is a single VDSC engine enabled(i.e dsc_split=false) however if we happen to have 2 VDSC engines enabled, we just kinda rely that this would be automatically enough. However pixel rate can be even >= than VDSC clock(cdclk) * 2, so in that case even with 2 VDSC engines enabled, we still need to tweak it up. So lets compare pixel rate with cdclk * VDSC engine count and check if it still requires bumping up. Previously we had to bump up CDCLK many times for similar reasons. v2: - Use new intel_dsc_get_num_vdsc_instances to determine number of VDSC engines, instead of slice count(Ankit Nautiyal) v3: - s/u8/int/ (Jani Nikula) v4: - Remove slice count mentions(Ankit Nautiyal) - Use DIV_ROUND_UP in order to make sure that resulting CDCLK would be always >= than required, after division(Ankit Nautiyal) Signed-off-by: -
Stanislav Lisovskiy authored
Currently we are using dsc_split and bigjoiner variables for determining amount of VDSC instances, however that might change in future, if we happen to have more of those. So lets pack all that logic into single function for convenience, so that at least this isn't hardcoded throughout the whole VDSC code. v2: - s/u8/int/ (Jani Nikula) Signed-off-by:
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- 05 Jul, 2023 7 commits
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Ville Syrjälä authored
Try to deal with duplicate child devices for the same DDI port by attempting to initialize them in VBT defined order The first on to succeed for a specific DDI port will be the one we use. We'll also get rid of i915->display.vbt.ports[] here as any conflicts will now be handled at encoder registration time rather than during VBT parsing. Note that intel_bios_encoder_data_lookup() still remaims for pre-DDI DP/HDMI ports as those don't (at least yet) use VBT driven initialization. TODO: DSI dual link handling is sketchy at best v2: Leave intel_bios_encoder_port() to the encoder callback (Jani) Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by:
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Ville Syrjälä authored
We'll have a few places where we need to do the full (incl. ICL+ DSI) DVO port->port conversion, so extract the code for that into a helper. Suggested-by:
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Ville Syrjälä authored
Stop with the VBT AUX CH sanitation, and instead just check that the appropriate AUX CH is still available when initializing a DP/TC port. The reason being that we want to start initializing ports in VBT order to deal with VBTs that declare child devices with seemingly conflicting ports. As the encoder initialization can fail for other reasons (at least for eDP+AUX) we can't know upfront which way the conflicts should be resolved. Note that the old way of sanitizing gave priority to the last port declared in the VBT, but now we sort of do the opposite by favoring the first encoder to successfully initialize. The reason for the old "last port wins" preference was eg. Asrock B250M-HDV where port A (eDP) and port E (DP->VGA) have an AUX CH conflict and we need to prefer port E. However with the new way port A (eDP) will be probed first, but will fail to probe due to HPD and thus port E will still win in the end. v2: Pimp the commit message (Jani) Reviewed-by:
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Ville Syrjälä authored
Stop with the VBT DDC pin sanitation, and instead just check that the appropriate DDC pin is still available when initializing a HDMI connector. The reason being that we want to start initializing ports in VBT order to deal with VBTs that declare child devices with seemingly conflicting ports. As the encoder initialization can fail for other reasons (at least for eDP+AUX) we can't know upfront which way the conflicts should be resolved. Note that the old way of sanitizing gave priority to the last port declared in the VBT, but now we sort of do the opposite by favoring the first encoder to successfully initialize. So far we're not aware of HDMI/DDC use cases where this would matter but for AUX CH (will be subject to a similar change) there are known cases where it matters. Also note that the old code fell back to the platform default DDC pin if the VBT pin was populated but invalid. That doesn't seem like such a great idea because the VBT might have later declared another port using that platform default pin, and so we might just be creating more DDC pin conflicts here. So lets not second guess the VBT and simply reject the entire HDMI encoder if the VBT DDC pin is invalid. v2: Pimp the commit message (Jani) Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by:
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Ville Syrjälä authored
Mixing VBT based AUX CH with platform defaults seems like a recipe for conflicts. Let's only populate AUX CH if we absolutely need it, that is only if we are dealing with a DP output or a TC port (which need it due to some power well shenanigans). TODO: double check that real VBTs do in fact populate the AUX CH for HDMI TC legacy ports... Reviewed-by: -
Ville Syrjälä authored
Make sure dig_port->aux_ch is trustworthy by initializing it to NONE (-1) at the start. The encoder init will later fill in the actual value, if appropriate. Reviewed-by:
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Stanislav Lisovskiy authored
Currently we just clamp that value to the highest supported one, however that means, we are not able to fit this into our available bandwidth range, so we might see glitches or FIFO underruns. While choosing less compressed bpp than min bpp required to handle the mode is harmless and might even save some bandwidth, choosing higher compressed bpp than min bpp required to handle the required mode config, can cause issues. So in that case lets just conclude that even with DSC, we are not able to comply with bandwidth requirements and fail. v2: - s/clamp_t/min_t/ (Luca Coelho) Signed-off-by:
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- 04 Jul, 2023 3 commits
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Jani Nikula authored
The __raw_uncore_* interface is supposed to be intel_uncore.[ch] internal only. Replace the remaining outside user with intel_uncore_read_fw(), which is essentially the same thing. Signed-off-by:
Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230627105849.274263-1-jani.nikula@intel.com
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Jani Nikula authored
Add a helper for accessing uncore->regs instead of doing it directly. This will help display code reuse with the xe driver. Cc: Andi Shyti <andi.shyti@linux.intel.com> Signed-off-by:
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Stanislav Lisovskiy authored
If we are using Bigjoiner dpll_hw_state is supposed to be exactly same as for master crtc, so no need to save it's state for slave crtc. Signed-off-by:
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- 29 Jun, 2023 7 commits
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Jani Nikula authored
Finally we can get rid of the pseudo-const write-once device info, and convert it into a const pointer to device info in rodata. Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by:
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Jani Nikula authored
Continue moving all things display further into display files and structures. v2: Sort includes (Matt) Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by:
Matt Roper <matthew.d.roper@intel.com> Signed-off-by:
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Jani Nikula authored
Prefer DISPLAY_INFO() over INTEL_INFO()->display. Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by:
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Jani Nikula authored
Add new function intel_display_device_info_print() and print the display device info there instead of intel_device_info_print(). This also fixes the display runtime info printing to use the actual runtime info instead of the static defaults. Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by:
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Jani Nikula authored
The mock device creation was the only place that needed to modify platform_engine_mask and memory_regions runtime. With mock_info in place for mock devices, we can move them to device info. Signed-off-by:
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Jani Nikula authored
Instead of modifying the device info on the fly, use static const mock device info. It's not okay to modify device info at runtime; we've added separate runtime info for info that needs to be modified at runtime. We've added safeguards to device info to prevent it from being modified, but commit 5e352e32 ("drm/i915: preparation for using PAT index") just cast the const away and modified it anyway. This prevents device info from being moved to rodata. Fixes: 5e352e32 ("drm/i915: preparation for using PAT index") Suggested-by:
Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Cc: Fei Yang <fei.yang@intel.com> Cc: Andi Shyti <andi.shyti@linux.intel.com> Cc: Andrzej Hajda <andrzej.hajda@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by:
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Gustavo Sousa authored
That function is not defined anywhere. Signed-off-by:
Ravi Kumar Vodapalli <ravi.kumar.vodapalli@intel.com> Signed-off-by:
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- 26 Jun, 2023 8 commits
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Jani Nikula authored
Fix Sphinx warning about unexpected indent. Signed-off-by:
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Jani Nikula authored
We have duplicate kernel-doc directives for the same struct, leading to: /home/jani/src/linux/Documentation/gpu/driver-uapi.rst:2279: WARNING: Duplicate C declaration, also defined at rfc/i915_scheduler:3. Declaration is '.. c:struct:: i915_context_engines_parallel_submit'. Use the Sphinx C domain namespace for the rfc document to fix this. Signed-off-by:
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Imre Deak authored
DC states are disabled / re-enabled around each modeset, which may lead to a needless off->on->off toggling of the DC_off power well. This has some overhead as toggling DC states involves running a DMC firmware handler and also running a periodic firmware handler while DC states are enabled. The limit of when DC states have a benefit is at 30 FPS (using DC3co) and below 30 FPS (using DC5/6), where the firmware can actually disable clocks / power off power wells. Accordingly delay powering off the DC_off powerwell (which re-enables DC states) by 17 ms at the end of a modeset to avoid the above overhead at or above 60 FPS. Reviewed-by:
Jouni Högander <jouni.hogander@intel.com> Signed-off-by:
Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230616185104.2502003-4-imre.deak@intel.com
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Imre Deak authored
Add support for specifying a delay different than the current 100 ms default for powering off a display power domain. This is needed by the next patch which delays re-enabling DC states during modesets to avoid the off->on->off toggling overhead of the DC_off power well, but does this using a < 100 ms delay for a better utilization of DC power saving states. Reviewed-by:
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Imre Deak authored
Remove the forward declarations for enums and structs from display power header files that aren't used in prototypes. Reviewed-by:
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Imre Deak authored
Add the seq_file struct forward declaration to intel_display_power.h fixing the build error below. While at it add the rest of missing forward declarations/includes to the display power header files. In file included from <command-line>: ./../drivers/gpu/drm/i915/display/intel_display_power.h:255:70: error: 'struct seq_file' declared inside parameter list will not be visible outside of this definition or declaration [-Werror] 255 | void intel_display_power_debug(struct drm_i915_private *i915, struct seq_file *m); | ^~~~~~~~ Closes: https://lore.kernel.org/intel-gfx/89adc1ac-25a0-6eb6-4cc9-ab6cc8d49730@infradead.org/Reported-by:Randy Dunlap <rdunlap@infradead.org> Acked-by:
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Suraj Kandpal authored
Add a debug statement at hdcp2 capability check which indicates if GSC CS is causing hdcp2 incapability --v2 -correcttypo in commit header --v3 -correct the other typo in commit header [Jani] Signed-off-by:
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Suraj Kandpal authored
Currently hdcp->content_type is being assigned the content_type field in drm_connector_state which is wrong and instead it needs to be assigned hdcp_content_type field from drm_connector_state Fixes: 4c4279a8 ("drm/i915/hdcp: add intel_atomic_state argument to hdcp_enable function") Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Cc: Animesh Manna <animesh.manna@intel.com> Signed-off-by:
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