- 20 Dec, 2010 15 commits
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Marek Vasut authored
The new FPGA firmware in Balloon3 uses different methods to control it's bus control lines. In the new version, there are separate registers to set/clear bus control lines. This patch updates affected places. Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Signed-off-by:
Eric Miao <eric.y.miao@gmail.com>
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Marek Vasut authored
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Bjorn Forsman authored
Tested on a Colibri Evaluation Board Rev.2.1 with a Colibri PXA310 module. Signed-off-by:
Bjorn Forsman <bjorn.forsman@gmail.com> Signed-off-by:
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Mark F. Brown authored
Signed-off-by:
Mark F. Brown <mark.brown314@gmail.com> Reviewed-by:
Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by:
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Eric Miao authored
Signed-off-by: -
Marek Vasut authored
Signed-off-by:
Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by:
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Marek Vasut authored
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Marek Vasut authored
Signed-off-by:
Daniel Mack <daniel@caiaq.de> Signed-off-by:
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Eric Miao authored
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Marek Vasut authored
Rename colibri-pxa270-evalboard to colibri-evalboard as this board is used with all Colibri modules. Signed-off-by:
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Marek Vasut authored
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Marek Vasut authored
This change -- pushing the MFP configuration back into Module files -- is necessary because some evalboards can be used with multiple modules, where MFP differs from module to module. Therefore MFP isn't board-specific, but module-specific and the module should preconfigure itself for the board. (And there is also the C preprocesor limitation and conflicting #define-s) Signed-off-by:
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Marek Vasut authored
This driver also contains structures to eventually support PXA320. This is planned to be added in a later patch. Signed-off-by:
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Marek Vasut authored
On PXA320, there's only one PCMCIA slot available. Check for cases where the user would want to register multiple. Also, rework failpath. Signed-off-by:
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Haojian Zhuang authored
iwmmxt is used in XScale, XScale3, Mohawk and PJ4 core. But the instructions of accessing CP0 and CP1 is changed in PJ4. Append more files to support iwmmxt in PJ4 core. Signed-off-by:
Zhou Zhu <zzhu3@marvell.com> Signed-off-by:
Haojian Zhuang <haojian.zhuang@marvell.com> Acked-by:
Nicolas Pitre <nico@fluxnic.net> Signed-off-by:
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- 18 Dec, 2010 5 commits
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Haojian Zhuang authored
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Haojian Zhuang authored
Since CPU_PJ4 is shared between PXA95x and MMP2, select CPU_PJ4 in MMP2 configuration. Signed-off-by:
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Haojian Zhuang authored
Saarb platform is a handheld platform that supports Marvell PXA955 silicon. Signed-off-by:
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Haojian Zhuang authored
The core of PXA955 is PJ4. Add new PJ4 support. And add new macro CONFIG_PXA95x. Signed-off-by:
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Eric Miao authored
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- 16 Dec, 2010 19 commits
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Eric Miao authored
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Eric Miao authored
Introduce 'struct clk' for memory and remove get_memclk_frequency_10khz(). Signed-off-by: -
Eric Miao authored
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Eric Miao authored
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Haojian Zhuang authored
Define all IRQs in irqs.h. If some IRQs are sharing one IRQ number, define them together. If some IRQs are sharing same name with different IRQ number, define different IRQ. Signed-off-by:
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Haojian Zhuang authored
After introducing pxa930/pxa935 and new silicons, original cpuid rules of XScale generation 3 can't fit new silicons. Now redefine the rule of PXA3xx. Only PXA300/PXA310/PXA320/PXA930/PXA935 are family members of PXA3xx. PXA930/PXA935 are family members of PXA93x. PXA93x can be considered as PXA3xx + CP. Signed-off-by:
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Haojian Zhuang authored
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Haojian Zhuang authored
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cxie4 authored
Signed-off-by:
Chao Xie <chao.xie@marvell.com> Signed-off-by:
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Daniel Mack authored
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Daniel Mack authored
This adds a driver for the the 2D graphics accelerator found on PXA3xx processors. Only resource mapping, interrupt handling and a simple ioctl handler is done by the kernel part, the rest of the logic is implemented in DirectFB userspace. Graphic applications greatly benefit for line drawing, blend, and rectangle and triangle filling operations. Benchmarks done on a PXA303 using the df_dok benchmarking tool follow, where the value in square brackets show the CPU usage during that test. Without accelerator (benchmarking 256x252 on 480x262 RGB16 (16bit)): Anti-aliased Text 3.016 secs ( 65.649 KChars/sec) [ 99.6%] Fill Rectangle 3.021 secs ( 175.107 MPixel/sec) [ 98.0%] Fill Rectangle (blend) 3.582 secs ( 3.602 MPixel/sec) [ 99.7%] Fill Rectangles [10] 3.177 secs ( 182.753 MPixel/sec) [ 98.1%] Fill Rectangles [10] (blend) 18.020 secs ( 3.580 MPixel/sec) [ 98.7%] Fill Spans 3.019 secs ( 145.306 MPixel/sec) [ 98.0%] Fill Spans (blend) 3.616 secs ( 3.568 MPixel/sec) [ 99.4%] Blit 3.074 secs ( 39.874 MPixel/sec) [ 98.0%] Blit 180 3.020 secs ( 32.042 MPixel/sec) [ 98.0%] Blit with format conversion 3.005 secs ( 19.321 MPixel/sec) [ 99.6%] Blit from 32bit (blend) 4.792 secs ( 2.692 MPixel/sec) [ 98.7%] With accelerator: Anti-aliased Text 3.056 secs (* 36.518 KChars/sec) [ 21.3%] Fill Rectangle 3.015 secs (* 115.543 MPixel/sec) [ 8.9%] Fill Rectangle (blend) 3.180 secs (* 20.286 MPixel/sec) [ 1.8%] Fill Rectangles [10] 3.251 secs (* 119.062 MPixel/sec) [ 1.2%] Fill Rectangles [10] (blend) 6.293 secs (* 20.502 MPixel/sec) [ 0.3%] Fill Spans 3.051 secs (* 97.264 MPixel/sec) [ 35.7%] Fill Spans (blend) 3.377 secs (* 15.282 MPixel/sec) [ 17.8%] Blit 3.046 secs (* 27.533 MPixel/sec) [ 2.6%] Blit 180 3.098 secs (* 27.070 MPixel/sec) [ 2.2%] Blit with format conversion 3.131 secs (* 39.148 MPixel/sec) [ 2.8%] Blit from 32bit (blend) 3.346 secs (* 11.568 MPixel/sec) [ 0.8%] Signed-off-by:
Sven Neumann <s.neumann@raumfeld.com> Cc: Eric Miao <eric.y.miao@gmail.com> Cc: Denis Oliver Kropp <dok@directfb.org> Cc: Sven Neumann <s.neumann@raumfeld.com> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by:
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Zhangfei Gao authored
Signed-off-by:
Zhangfei Gao <zhangfei.gao@marvell.com> Acked-by:
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Zhangfei Gao authored
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Marek Vasut authored
This is important because on PXA3xx, the physical mapping of SMEMC registers differs from the one on PXA2xx. In order to get PCMCIA working on both PXA2xx and PXA320, the PCMCIA driver was adjusted accordingly as well. Also, various places in the kernel had to be patched to use __raw_read/__raw_write. Signed-off-by:
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Marek Vasut authored
This patch introduces pxa2xx_map_io() and pxa3xx_map_io() to distinguish between PXA25x/PXA27x and PXA3xx memory mapping. Also, fixup for platforms broken after introducing pxa{25x,27x}_map_io() and pxa3xx_map_io() is included. Signed-off-by: -
Eric Miao authored
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Eric Miao authored
The camera registers start and range are encoded into the platform device, and are actually handled by ioremap()'ed, thus the mapping in pxa_map_io() is not necessary. Signed-off-by: -
Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6Linus Torvalds authored
* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: crypto: ghash-intel - ghash-clmulni-intel_glue needs err.h
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- 15 Dec, 2010 1 commit
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git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4Linus Torvalds authored
* 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4: ext4: fix typo which broke '..' detection in ext4_find_entry() ext4: Turn off multiple page-io submission by default
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