- 12 Mar, 2024 27 commits
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Johannes Stezenbach authored
For the Bay Trail or Cherry Trail SoC to enter the S0i3 power-level at s2idle suspend requires most of the hw-blocks / devices in the SoC to be in D3 when entering s2idle suspend. If some devices are not in D3 then the SoC will stay in a higher power state, consuming much more power from the battery then in S0i3. Use the new acpi_s2idle_dev_ops and acpi_register_lps0_dev() functionality to register a new s2idle check function which checks that all hardware blocks in the South complex (controlled by the PMC) are in a state that allows the SoC to enter S0i3 and prints an error message for any device in D0. Some blocks are not used on lower-featured versions of the SoC and these blocks will always report being in D0 on SoCs were they are not used. A false-positive mask is used to identify these blocks and for blocks in this mask the error is turned into a debug message to avoid false-positive error messages. Note the pmc_atom code is enabled by CONFIG_X86_INTEL_LPSS which already depends on ACPI. Signed-off-by:
Johannes Stezenbach <js@sig21.net> Signed-off-by:
Takashi Iwai <tiwai@suse.de> Reviewed-by:
Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> [hdegoede: Use acpi_s2idle_dev_ops, ignore fused off blocks, PMIC I2C] Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20240305105915.76242-4-hdegoede@redhat.comSigned-off-by:
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Hans de Goede authored
The include/linux/platform_data/x86/pmc_atom.h d3_sts register bit defines are named after how these bits are used on Bay Trail devices. On Cherry Trail (CHT) devices some of these bits have a different meaning according to the datasheet. At a comment to the defines for bits which have a different meaning on Cherry Trail devices. Signed-off-by:
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Hans de Goede authored
Move the register defines for the Atom (Bay Trail, Cherry Trail) PMC clocks to include/linux/platform_data/x86/pmc_atom.h. This is a preparation patch to extend the S0i3 readiness checks in drivers/platform/x86/pmc_atom.c with checking that the PMC clocks are off on suspend entry. Note these are added to include/linux/platform_data/x86/pmc_atom.h rather then to include/linux/platform_data/x86/clk-pmc-atom.h because the former already has all the other Atom PMC register defines. Reviewed-by:
Stephen Boyd <sboyd@kernel.org> Signed-off-by:
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Ricardo B. Marliere authored
Since commit 43a7206b ("driver core: class: make class_register() take a const *"), the driver core allows for struct class to be in read-only memory, so move the fw_attr_class structure to be declared at build time placing it into read-only memory, instead of having to be dynamically allocated at boot time. Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Suggested-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by:
"Ricardo B. Marliere" <ricardo@marliere.net> Link: https://lore.kernel.org/r/20240305-class_cleanup-platform-v1-1-9085c97b9355@marliere.netReviewed-by:
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Srinivas Pandruvada authored
The vsec offset can be 64 bit long depending on the PFS start. So change type to u64. Also use 64 bit formatting for seq_printf. Fixes: 47731fd2 ("platform/x86/intel: Intel TPMI enumeration driver") Signed-off-by:
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Cc: stable@vger.kernel.org # v6.3+ Link: https://lore.kernel.org/r/20240305194644.2077867-1-srinivas.pandruvada@linux.intel.comReviewed-by:
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Andy Shevchenko authored
intel-mid.h is providing some core parts of the South Complex PM, which are usually not used by individual drivers. In particular, this driver doesn't use it, so simply remove the unused header. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by:
Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Link: https://lore.kernel.org/r/20240305161539.1364717-3-andriy.shevchenko@linux.intel.comReviewed-by:
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Andy Shevchenko authored
intel-mid.h is providing some core parts of the South Complex PM, which are usually not used by individual drivers. In particular, this driver doesn't use it, so simply remove the unused header. Signed-off-by:
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Armin Wolf authored
The length of the policy buffer is not validated before accessing it, which means that multiple out-of-bounds memory accesses can occur. This is especially bad since userspace can load policy binaries over debugfs. Compile-tested only. Fixes: 7c45534a ("platform/x86/amd/pmf: Add support for PMF Policy Binary") Signed-off-by:
Armin Wolf <W_Armin@gmx.de> Reviewed-by:
Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Link: https://lore.kernel.org/r/20240304205005.10078-5-W_Armin@gmx.deReviewed-by:
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Armin Wolf authored
The cookie header consists of a sign field and a length field. Combine both in a single struct to make accesses simpler. Compile-tested only. Suggested-by:
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Armin Wolf authored
The policy buffer is allocated using normal memory allocation functions, so readl() should not be used on it. Compile-tested only. Fixes: 7c45534a ("platform/x86/amd/pmf: Add support for PMF Policy Binary") Signed-off-by:
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Armin Wolf authored
amd_pmf_start_policy_engine() returns an negative error code upon failure, so the TA_PMF_* error codes cannot be used here. Return -EIO instead. Also stop shadowing the return code in amd_pmf_get_pb_data(). Compile-tested only. Suggested-by:
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Dan Carpenter authored
These need to be signed for the error handling to work. The mlxbf_pmc_get_event_num() function returns int so int type is correct. Fixes: 1ae9ffd3 ("platform/mellanox: mlxbf-pmc: Cleanup signed/unsigned mix-up") Signed-off-by:
Dan Carpenter <dan.carpenter@linaro.org> Link: https://lore.kernel.org/r/a4af764e-990b-4ebd-b342-852844374032@moroto.mountainReviewed-by:
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Srinivas Pandruvada authored
When HWP (Hardware P-states) is disabled, dynamic SST features are disabled. But user should still be able to read the current core-power state, with legacy P-states. This will allow users to read current configuration with static SST enabled from BIOS. To address this, do not call disable_dynamic_sst_features() when the request is for reading the state. Signed-off-by:
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Vishnu Sankar authored
Add more ThinkPads with non-standard register addresses to read fan values. ThinkPads added are L13 Yoga Gen1, X13 Yoga Gen1, L380, L390, 11e Gen5 GL, 11e Gen5 GL-R, 11e Gen5 KL-Y. Signed-off-by:
Vishnu Sankar <vishnuocv@gmail.com> Reviewed-by:
Mark Pearson <mpearson-lenovo@squebb.ca> Reviewed-by:
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Alban Boyé authored
Signed-off-by:
Alban Boyé <alban.boye@protonmail.com> Link: https://lore.kernel.org/r/20240227223919.11587-1-alban.boye@protonmail.comReviewed-by:
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David E. Box authored
As is the case on Meteor Lake, the Gaussian & Neural Accelerator (GNA) device is powered by BIOS to D0 by default. If no driver is loaded, this will cause the Package C state to be limited to PC2, leading to significant power consumption and decrease in batter life. Put the GNA device in D3 by default if no driver is loaded for it. Fixes: 83f168a1 ("platform/x86/intel/pmc: Add Arrow Lake S support to intel_pmc_core driver") Signed-off-by:
"David E. Box" <david.e.box@linux.intel.com> Reviewed-by:
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David E. Box authored
A recent PMC firmware change in Lunar Lake caused the pmc_core driver to fail to probe. This is due to a change in the GUID for PMC telemetry coming from the SSRAM device. Until a final release is ready this value may change again. In the meantime, disable the SSRAM support for Lunar Lake so the driver can load and provide some basic functionality. Fixes: 3748dfda ("platform/x86/intel/pmc: Add Lunar Lake M support to intel_pmc_core driver") Signed-off-by:
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David E. Box authored
intel_vsec_walk_header() is used to configure features from devices that don't provide a PCI VSEC or DVSEC structure. Some of these features may be unsupported and fail to load. Ignore them silently as we do for unsupported features described by VSEC/DVSEC. Signed-off-by:
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SungHwan Jung authored
This parameter allows predator laptop users to test and use features (mode button, platform profile, fan speed monitoring) without adding model names to acer_quirks and compiling kernel. Signed-off-by:
SungHwan Jung <onenowy@gmail.com> Link: https://lore.kernel.org/r/20240220080416.6395-1-onenowy@gmail.comReviewed-by:
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SungHwan Jung authored
Add Acer Predator PH16-71 to Acer_quirks with predator_v4 to support mode button and fan speed sensor. Signed-off-by:
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Armin Wolf authored
The variable is only used internally and has no external users, so it should me made static. Compile-tested only. Reviewed-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20240223163901.13504-3-W_Armin@gmx.deSigned-off-by:
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Armin Wolf authored
The value of policy_base is the return value of a devm_ioremap call, which returns a __iomem pointer instead of an regular pointer. Add the missing __iomem attribute. Compile-tested only. Signed-off-by:
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Armin Wolf authored
The whitelist-based approach for preventing older WMI drivers from being instantiated multiple times has many drawbacks: - uses cannot see all available WMI devices (if not whitelisted) - whitelisting a WMI driver requires changes in the WMI driver core - maintenance burden for driver and subsystem developers Since the WMI driver core already takes care that older WMI drivers are not being instantiated multiple times, remove the now redundant whitelist. Tested on a ASUS Prime B650-Plus. Signed-off-by:
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Armin Wolf authored
Many older WMI drivers cannot be instantiated multiple times for two reasons: - they are using the legacy GUID-based WMI API - they are singletons (with global state) Prevent such WMI drivers from binding to WMI devices with a duplicated GUID, as this would mean that the WMI driver will be instantiated at least two times (one for the original GUID and one for the duplicated GUID). WMI drivers which can be instantiated multiple times can signal this by setting a flag inside struct wmi_driver. Tested on a ASUS Prime B650-Plus. Signed-off-by:
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Armin Wolf authored
When matching a WMI device to a GUID used by the legacy GUID-based API, devices with a duplicated GUID should be ignored. Add an additional WMI device flag signaling that the GUID used by the WMI device is also used by another WMI device. Ignore such devices inside the match functions used by the legacy GUID-based API. Tested on a ASUS Prime B650-Plus. Signed-off-by:
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Gergo Koteles authored
Newer Lenovo Yogas and Legions with 60Hz/90Hz displays send a wmi event when Fn + R is pressed. This is intended for use to switch between the two refresh rates. The Fn + R key was incorrectly assigned to KEY_DISPLAYTOGGLE because it is used to toggle the display on and off. Map Fn + R key to the KEY_REFRESH_RATE_TOGGLE event code. Signed-off-by:
Gergo Koteles <soyer@irl.hu> Link: https://lore.kernel.org/r/8fd36f0f016dde700396d8afaba1979d5dbc30a1.1710065750.git.soyer@irl.huReviewed-by:
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Gergo Koteles authored
Newer Lenovo Yogas and Legions with 60Hz/90Hz displays send a wmi event when Fn + R is pressed. This is intended for use to switch between the two refresh rates. Allocate a new KEY_REFRESH_RATE_TOGGLE keycode for it. Signed-off-by:
Dmitry Torokhov <dmitry.torokhov@gmail.com> Link: https://lore.kernel.org/r/15a5d08c84cf4d7b820de34ebbcf8ae2502fb3ca.1710065750.git.soyer@irl.huReviewed-by:
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- 27 Feb, 2024 9 commits
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Luiz Capitulino authored
Currently, the driver has two behaviors to deal with new & unsupported performance blocks reported by the firmware: 1. For register and unknown block types, the driver will fail to load with the following error message: [ 4510.956369] mlxbf-pmc: probe of MLNXBFD2:00 failed with error -22 2. For counter and crspace blocks, the driver will load and sysfs files will be created but getting the contents of event_list or trying to setup the counter will fail Instead, let's ignore and log unsupported blocks. This means the driver will always load and unsupported blocks will never show up in sysfs. Signed-off-by:Luiz Capitulino <luizcap@redhat.com> Reviewed-by:
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Luiz Capitulino authored
The mlxbf_pmc_event_list() function returns a pointer to an array of supported events and the array size. The array size is returned via a pointer passed as an argument, which is mandatory. However, we want to be able to use mlxbf_pmc_event_list() just to check if a block name is implemented/supported. For this usage passing the size argument is not necessary so let's make it optional. Signed-off-by:
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Armin Wolf authored
The WMI driver core already takes care that the WMI driver is only bound to WMI devices with a matching GUID. Remove the unnecessary call to wmi_has_guid(), which will always be true when the driver probes. Tested on a Dell Inspiron 3505. Signed-off-by:
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Armin Wolf authored
This reverts commit 1a373d15. The WMI core now takes care of draining the event queue if asus-wmi is not loaded, so the hacky event queue handling code is not needed anymore. Signed-off-by:
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Armin Wolf authored
Update the WMI ACPI interface documentation to include the fact that _WED should be evaluated every time an ACPI notification is received. Signed-off-by:
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Armin Wolf authored
The ACPI WMI specification states: "The _WED control method is evaluated by the mapper in response to receiving a notification from a control method." This means that _WED should be evaluated unconditionally even if no WMI event consumers are present. Some firmware implementations actually depend on this behavior by storing the event data inside a queue which will fill up if the WMI core stops retrieving event data items due to no consumers being present Fix this by always evaluating _WED even if no WMI event consumers are present. Signed-off-by:
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Armin Wolf authored
WMI event drivers which do not have no_notify_data set expect that each WMI event contains valid data. Evaluating _WED however might return no data, which can cause issues with such drivers. Fix this by validating that evaluating _WED did return data. Signed-off-by:
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Armin Wolf authored
If a WMI event driver has no_notify_data set, then it indicates support for WMI events which provide no notify data, otherwise the notify() callback expects a valid ACPI object as notify data. However if a WMI event driver which requires notify data is bound to a WMI event device which cannot retrieve such data due to the _WED ACPI method being absent, then the driver will be dysfunctional since all WMI events will be dropped due to the missing notify data. Fix this by not allowing such WMI event drivers to bind to WMI event devices which do not support retrieving of notify data. Also reword the description of no_notify_data a bit. Signed-off-by:
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Szilard Fabian authored
This patch adds battery charge control support on Fujitsu notebooks via the S006 method of the FUJ02E3 ACPI device. With this method it's possible to set charge_control_end_threshold between 50 and 100%. Tested on Lifebook E5411 and Lifebook U728. Sadly I can't test this patch on a dual battery one, but I didn't find any clue about independent battery charge control on dual battery Fujitsu notebooks either. And by that I mean checking the DSDT table of various Lifebook notebooks and reverse engineering FUJ02E3.dll. Signed-off-by:
Szilard Fabian <szfabian@bluemarch.art> Acked-by:
Jonathan Woithe <jwoithe@just42.net> Link: https://lore.kernel.org/r/20240215203012.228758-2-szfabian@bluemarch.art [ij: coding style cleanups.] Reviewed-by:
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- 20 Feb, 2024 2 commits
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Vishnu Sankar authored
Added non-standard thermal register's support for some ThinkPads. Some of the Thinkpads use a non-standard ECFW which has different thermal register addresses. This is a fix to correct the wrong temperature reporting on those systems. Tested on Lenovo ThinkPad L13 Yoga Gen2. Suggested-by:
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Vishnu Sankar authored
Add a thermal_read_mode_check helper to make the code simpler during init. This helps particularly when the new TPACPI_THERMAL_TPEC_12 mode is added in the next patch. Suggested-by:
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- 13 Feb, 2024 2 commits
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Gergo Koteles authored
According to the manual, Fn+R adjusts the display refresh rate. Map Fn+R to KEY_DISPLAYTOGGLE. Signed-off-by:
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Shravan Kumar Ramani authored
Use unsigned integer types for register values and array indices. Use %u instead of %d accordingly. Signed-off-by:
Shravan Kumar Ramani <shravankr@nvidia.com> Link: https://lore.kernel.org/r/d8548c70339a29258a906b2b518e5c48f669795c.1707808180.git.shravankr@nvidia.comReviewed-by:
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