1. 11 Nov, 2014 2 commits
    • Arnd Bergmann's avatar
      Merge branch 'io' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into asm-generic · 1c8d2969
      Arnd Bergmann authored
      * 'io' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux:
        documentation: memory-barriers: clarify relaxed io accessor semantics
        x86: io: implement dummy relaxed accessor macros for writes
        tile: io: implement dummy relaxed accessor macros for writes
        sparc: io: implement dummy relaxed accessor macros for writes
        powerpc: io: implement dummy relaxed accessor macros for writes
        parisc: io: implement dummy relaxed accessor macros for writes
        mn10300: io: implement dummy relaxed accessor macros for writes
        m68k: io: implement dummy relaxed accessor macros for writes
        m32r: io: implement dummy relaxed accessor macros for writes
        ia64: io: implement dummy relaxed accessor macros for writes
        cris: io: implement dummy relaxed accessor macros for writes
        frv: io: implement dummy relaxed accessor macros for writes
        xtensa: io: remove dummy relaxed accessor macros for reads
        s390: io: remove dummy relaxed accessor macros for reads
        microblaze: io: remove dummy relaxed accessor macros
        asm-generic: io: implement relaxed accessor macros as conditional wrappers
      
      Conflicts:
      	include/asm-generic/io.h
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      1c8d2969
    • Thierry Reding's avatar
      ARM: sa11x0: Use void __iomem * in MMIO accessors · 3ba5acf3
      Thierry Reding authored
      MMIO accessors such as readl() and writel() want a void __iomem * for
      the address. Update the BSE nanoEngine PCI driver to pass such pointers
      instead of unsigned long in preparation to converting ARM to use generic
      and more rigidly typed accessors.
      Reported-by: default avatarkbuild test robot <fengguang.wu@intel.com>
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      3ba5acf3
  2. 10 Nov, 2014 11 commits
    • Arnd Bergmann's avatar
      Merge branch 'asm-generic-io' of https://github.com/thierryreding/linux into asm-generic · 1d0eeac7
      Arnd Bergmann authored
      Pull asm-generic/io.h overhaul from Thierry Reding
      
      * 'asm-generic-io' of https://github.com/thierryreding/linux:
        arm64: Use include/asm-generic/io.h
        ARM: Use include/asm-generic/io.h
        asm-generic/io.h: Implement generic {read,write}s*()
        asm-generic/io.h: Reconcile I/O accessor overrides
        /dev/mem: Use more consistent data types
        Change xlate_dev_{kmem,mem}_ptr() prototypes
        ARM: ixp4xx: Properly override I/O accessors
        ARM: ixp4xx: Fix build with IXP4XX_INDIRECT_PCI
        ARM: ebsa110: Properly override I/O accessors
        ARC: Remove redundant PCI_IOBASE declaration
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      1d0eeac7
    • Thierry Reding's avatar
      arm64: Use include/asm-generic/io.h · 09a57239
      Thierry Reding authored
      Include the generic I/O header file so that duplicate implementations
      can be removed. This will also help to establish consistency across more
      architectures regarding which accessors they support.
      Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      09a57239
    • Thierry Reding's avatar
      ARM: Use include/asm-generic/io.h · 84c4d3a6
      Thierry Reding authored
      Include the generic I/O header file so that duplicate implementations
      can be removed. This will also help to establish consistency across more
      architectures regarding which accessors they support.
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      84c4d3a6
    • Thierry Reding's avatar
      asm-generic/io.h: Implement generic {read,write}s*() · 9ab3a7a0
      Thierry Reding authored
      Currently driver writers need to use io{read,write}{8,16,32}_rep() when
      accessing FIFO registers portably. This is bad for two reasons: it is
      inconsistent with how other registers are accessed using the standard
      {read,write}{b,w,l}() functions, which can lead to confusion. On some
      architectures the io{read,write}*() functions also need to perform some
      extra checks to determine whether an address is memory-mapped or refers
      to I/O space. Drivers which can be expected to never use I/O can safely
      use the {read,write}s{b,w,l,q}(), just like they use their non-string
      variants and there's no need for these extra checks.
      
      This patch implements generic versions of readsb(), readsw(), readsl(),
      readsq(), writesb(), writesw(), writesl() and writesq(). Variants of
      these string functions for I/O accesses (ins*() and outs*() as well as
      ioread*_rep() and iowrite*_rep()) are now implemented in terms of the
      new functions.
      
      Going forward, {read,write}{,s}{b,w,l,q}() should be used consistently
      by drivers for devices that will only ever be memory-mapped and hence
      don't need to access I/O space, whereas io{read,write}{8,16,32}_rep()
      should be used by drivers for devices that can be either memory-mapped
      or I/O-mapped.
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      9ab3a7a0
    • Thierry Reding's avatar
      asm-generic/io.h: Reconcile I/O accessor overrides · 9216efaf
      Thierry Reding authored
      Overriding I/O accessors and helpers is currently very inconsistent.
      This commit introduces a homogeneous way to override functions by
      checking for the existence of a macro with the same of the function.
      Architectures can provide their own implementations and communicate this
      to the generic header by defining the appropriate macro. Doing this will
      also help prevent the implementations from being subsequently
      overridden.
      
      While at it, also turn a lot of macros into static inline functions for
      better type checking and to provide a canonical signature for overriding
      architectures to copy. Also reorder functions by logical groups.
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      9216efaf
    • Thierry Reding's avatar
      /dev/mem: Use more consistent data types · 4707a341
      Thierry Reding authored
      The xlate_dev_{kmem,mem}_ptr() functions take either a physical address
      or a kernel virtual address, so data types should be phys_addr_t and
      void *. They both return a kernel virtual address which is only ever
      used in calls to copy_{from,to}_user(), so make variables that store it
      void * rather than char * for consistency.
      
      Also only define a weak unxlate_dev_mem_ptr() function if architectures
      haven't overridden them in the asm/io.h header file.
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      4707a341
    • Thierry Reding's avatar
      Change xlate_dev_{kmem,mem}_ptr() prototypes · dc012014
      Thierry Reding authored
      xlate_dev_mem_ptr() is used to convert a physical address to an uncached
      kernel virtual address mapping, so make it use phys_addr_t as type for
      the physical address and return void * for the kernel virtual address.
      
      xlate_dev_kmem_ptr() converts a cached kernel virtual address mapping to
      an uncached kernel virtual address mapping, so make it use void * for
      both the input parameter and return value.
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      dc012014
    • Thierry Reding's avatar
      ARM: ixp4xx: Properly override I/O accessors · 2e0fa0c9
      Thierry Reding authored
      In order to override accessors properly they must be #define'd so that
      subsequent generic headers (the one for ARM and finally the architecture
      independent one) can properly detect it.
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      2e0fa0c9
    • Arnd Bergmann's avatar
      ARM: ixp4xx: Fix build with IXP4XX_INDIRECT_PCI · e43b21cb
      Arnd Bergmann authored
      Provide *_relaxed() accessors and make sure to pass the volatile void
      __iomem * to accessors rather than the value cast to a u32. This allows
      ixp4xx to build with IXP4XX_INDIRECT_PCI enabled.
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      e43b21cb
    • Thierry Reding's avatar
      ARM: ebsa110: Properly override I/O accessors · 2cd0f559
      Thierry Reding authored
      In order to override accessors properly they must be #define'd so that
      subsequent generic headers (the one for ARM and finally the architecture
      independent one) can properly detect it.
      
      While at it, make all accessors use volatile void __iomem * to avoid a
      slew of build warnings.
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      2cd0f559
    • Thierry Reding's avatar
      ARC: Remove redundant PCI_IOBASE declaration · bfb111ec
      Thierry Reding authored
      ARC's asm/io.h includes the asm-generic/io.h which already defines the
      PCI_IOBASE variable in exactly the same way, so it can be dropped from
      the architecture specific header.
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      bfb111ec
  3. 20 Oct, 2014 18 commits
    • Will Deacon's avatar
      documentation: memory-barriers: clarify relaxed io accessor semantics · a8e0aead
      Will Deacon authored
      This patch extends the paragraph describing the relaxed read io accessors
      so that the relaxed accessors are defined to be:
      
       - Ordered with respect to each other if accessing the same peripheral
      
       - Unordered with respect to normal memory accesses
      
       - Unordered with respect to LOCK/UNLOCK operations
      
      Whilst many architectures will provide stricter semantics, ARM, Alpha and
      PPC can achieve significant performance gains by taking advantage of some
      or all of the above relaxations.
      
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
      Cc: David Howells <dhowells@redhat.com>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      a8e0aead
    • Will Deacon's avatar
      x86: io: implement dummy relaxed accessor macros for writes · cbc908ef
      Will Deacon authored
      write{b,w,l,q}_relaxed are implemented by some architectures in order to
      permit memory-mapped I/O accesses with weaker barrier semantics than the
      non-relaxed variants.
      
      This patch adds dummy macros for the write accessors to x86, in the
      same vein as the dummy definitions for the relaxed read accessors.
      
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      cbc908ef
    • Will Deacon's avatar
      tile: io: implement dummy relaxed accessor macros for writes · 579cadee
      Will Deacon authored
      write{b,w,l,q}_relaxed are implemented by some architectures in order to
      permit memory-mapped I/O accesses with weaker barrier semantics than the
      non-relaxed variants.
      
      This patch adds dummy macros for the write accessors to tile, in the
      same vein as the dummy definitions for the relaxed read accessors.
      Acked-by: default avatarChris Metcalf <cmetcalf@tilera.com>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      579cadee
    • Will Deacon's avatar
      sparc: io: implement dummy relaxed accessor macros for writes · 1191ccb3
      Will Deacon authored
      write{b,w,l,q}_relaxed are implemented by some architectures in order to
      permit memory-mapped I/O accesses with weaker barrier semantics than the
      non-relaxed variants.
      
      This patch adds dummy macros for the write accessors to sparc, in the
      same vein as the dummy definitions for the relaxed read accessors. The
      existing relaxed read{b,w,l} accessors are moved into asm/io.h, since
      they are identical between 32-bit and 64-bit machines.
      Acked-by: default avatar"David S. Miller" <davem@davemloft.net>
      Acked-by: default avatarSam Ravnborg <sam@ravnborg.org>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      1191ccb3
    • Will Deacon's avatar
      powerpc: io: implement dummy relaxed accessor macros for writes · 5da59057
      Will Deacon authored
      write{b,w,l,q}_relaxed are implemented by some architectures in order to
      permit memory-mapped I/O accesses with weaker barrier semantics than the
      non-relaxed variants.
      
      This patch adds dummy macros for the write accessors to powerpc, in the
      same vein as the dummy definitions for the relaxed read accessors.
      
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      5da59057
    • Will Deacon's avatar
      parisc: io: implement dummy relaxed accessor macros for writes · 2f083481
      Will Deacon authored
      write{b,w,l,q}_relaxed are implemented by some architectures in order to
      permit memory-mapped I/O accesses with weaker barrier semantics than the
      non-relaxed variants.
      
      This patch adds dummy macros for the write accessors to parisc, in the
      same vein as the dummy definitions for the relaxed read accessors.
      
      Cc: Helge Deller <deller@gmx.de>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      2f083481
    • Will Deacon's avatar
      mn10300: io: implement dummy relaxed accessor macros for writes · 960a5597
      Will Deacon authored
      write{b,w,l}_relaxed are implemented by some architectures in order to
      permit memory-mapped I/O accesses with weaker barrier semantics than the
      non-relaxed variants.
      
      This patch adds dummy macros for the write accessors to mn10300, in the
      same vein as the dummy definitions for the relaxed read accessors.
      
      Cc: David Howells <dhowells@redhat.com>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      960a5597
    • Will Deacon's avatar
      m68k: io: implement dummy relaxed accessor macros for writes · 88a9192e
      Will Deacon authored
      write{b,w,l}_relaxed are implemented by some architectures in order to
      permit memory-mapped I/O accesses with weaker barrier semantics than the
      non-relaxed variants.
      
      This patch adds dummy macros for the write accessors to m68k, in the
      same vein as the dummy definitions for the relaxed read accessors.
      Additionally, the existing relaxed read accessors are moved into
      asm/io.h, so that they can be used by m68k targets with an MMU.
      Acked-by: default avatarGeert Uytterhoeven <geert@linux-m68k.org>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      88a9192e
    • Will Deacon's avatar
      m32r: io: implement dummy relaxed accessor macros for writes · cb147c0f
      Will Deacon authored
      write{b,w,l}_relaxed are implemented by some architectures in order to
      permit memory-mapped I/O accesses with weaker barrier semantics than the
      non-relaxed variants.
      
      This patch adds dummy macros for the write accessors to m32r, in the
      same vein as the dummy definitions for the relaxed read accessors.
      
      Cc: Hirokazu Takata <takata@linux-m32r.org>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      cb147c0f
    • Will Deacon's avatar
      ia64: io: implement dummy relaxed accessor macros for writes · f6b3b7a9
      Will Deacon authored
      write{b,w,l,q}_relaxed are implemented by some architectures in order to
      permit memory-mapped I/O accesses with weaker barrier semantics than the
      non-relaxed variants.
      
      This patch adds dummy macros for the write accessors to ia64, which may
      be able to be optimised in a similar manner to the relaxed read
      accessors at a later date.
      
      Cc: Tony Luck <tony.luck@intel.com>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      f6b3b7a9
    • Will Deacon's avatar
      cris: io: implement dummy relaxed accessor macros for writes · 62e8abf7
      Will Deacon authored
      write{b,w,l}_relaxed are implemented by some architectures in order to
      permit memory-mapped I/O accesses with weaker barrier semantics than the
      non-relaxed variants.
      
      This patch adds dummy macros for the write accessors to Cris, in the same
      vein as the dummy definitions for the relaxed read accessors.
      
      Cc: Mikael Starvik <starvik@axis.com>
      Acked-by: default avatarJesper Nilsson <jesper.nilsson@axis.com>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      62e8abf7
    • Will Deacon's avatar
      frv: io: implement dummy relaxed accessor macros for writes · 88a68169
      Will Deacon authored
      write{b,w,l}_relaxed are implemented by some architectures in order to
      permit memory-mapped I/O accesses with weaker barrier semantics than the
      non-relaxed variants.
      
      This patch adds dummy macros for the write accessors to frv, in the same
      vein as the dummy definitions for the relaxed read accessors.
      
      Cc: David Howells <dhowells@redhat.com>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      88a68169
    • Will Deacon's avatar
      xtensa: io: remove dummy relaxed accessor macros for reads · affd2ae5
      Will Deacon authored
      These are now defined by asm-generic/io.h, so we don't need the private
      definitions anymore.
      
      Cc: Chris Zankel <chris@zankel.net>
      Acked-by: default avatarMax Filippov <jcmvbkbc@gmail.com>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      affd2ae5
    • Will Deacon's avatar
      s390: io: remove dummy relaxed accessor macros for reads · 916136b3
      Will Deacon authored
      These are now defined by asm-generic/io.h, so we don't need the private
      definitions anymore.
      
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      916136b3
    • Will Deacon's avatar
      microblaze: io: remove dummy relaxed accessor macros · e3bc1e24
      Will Deacon authored
      These are now defined by asm-generic/io.h, so we don't need the private
      definitions anymore.
      Acked-by: default avatarMichal Simek <monstr@monstr.eu>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      e3bc1e24
    • Will Deacon's avatar
      asm-generic: io: implement relaxed accessor macros as conditional wrappers · 9439eb3a
      Will Deacon authored
      {read,write}{b,w,l,q}_relaxed are implemented by some architectures in
      order to permit memory-mapped I/O accesses with weaker barrier semantics
      than the non-relaxed variants.
      
      This patch adds wrappers to asm-generic so that drivers can rely on the
      relaxed accessors being available, even if they don't always provide
      weaker ordering guarantees. Since some architectures both include
      asm-generic/io.h and define some relaxed accessors, the definitions here
      are conditional for the time being.
      
      Cc: Arnd Bergmann <arnd@arndb.de>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      9439eb3a
    • Linus Torvalds's avatar
      Linux 3.18-rc1 · f114040e
      Linus Torvalds authored
      f114040e
    • Linus Torvalds's avatar
      Merge tag 'arm-soc-fixes-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc · 4d3639ac
      Linus Torvalds authored
      Pull ARM SoC fixes from Olof Johansson:
       "A batch of fixes that have come in during the merge window.
      
        Some of them are defconfig updates for things that have now landed,
        some errata additions and a few general scattered fixes.
      
        There's also a qcom DT update that adds support for SATA on AP148, and
        basic support for Sony Xperia Z1 and CM-QS600 platforms that seemed
        isolated enough that we could merge it even if it's late"
      
      * tag 'arm-soc-fixes-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
        MAINTAINERS: corrected bcm2835 search
        ARM: dts: Explicitly set dr_mode on exynos5420-arndale-octa
        ARM: dts: Explicitly set dr_mode on exynos Peach boards
        ARM: dts: qcom: add CM-QS600 board
        ARM: dts: qcom: Add initial DTS file for Sony Xperia Z1 phone
        ARM: dts: qcom: Add SATA support on IPQ8064/AP148
        MAINTAINERS: Update Santosh Shilimkar's email id
        ARM: sunxi_defconfig: enable CONFIG_REGULATOR
        ARM: dts: Disable smc91x on n900 until bootloader dependency is removed
        ARM: omap2plus_defconfig: Enable ARM erratum 430973 for omap3
        ARM: exynos_defconfig: enable USB gadget support
        ARM: exynos_defconfig: Enable Maxim 77693 and I2C GPIO drivers
        ARM: mm: Fix ifdef around cpu_*_do_[suspend, resume] ops
        ARM: EXYNOS: Fix build with PM_SLEEP=n and ARM_EXYNOS_CPUIDLE=n
        ARM: SAMSUNG: Restore Samsung PM Debug functionality
        ARM: dts: Fix pull setting in sd4_width8 pin group for exynos4x12
        ARM: exynos_defconfig: Enable SBS battery support
        ARM: exynos_defconfig: Enable Control Groups support
        ARM: exynos_defconfig: Enable Atmel maXTouch support
        ARM: exynos_defconfig: Enable MAX77802
      4d3639ac
  4. 19 Oct, 2014 9 commits
    • Linus Torvalds's avatar
      Merge git://git.infradead.org/users/eparis/audit · ab074ade
      Linus Torvalds authored
      Pull audit updates from Eric Paris:
       "So this change across a whole bunch of arches really solves one basic
        problem.  We want to audit when seccomp is killing a process.  seccomp
        hooks in before the audit syscall entry code.  audit_syscall_entry
        took as an argument the arch of the given syscall.  Since the arch is
        part of what makes a syscall number meaningful it's an important part
        of the record, but it isn't available when seccomp shoots the
        syscall...
      
        For most arch's we have a better way to get the arch (syscall_get_arch)
        So the solution was two fold: Implement syscall_get_arch() everywhere
        there is audit which didn't have it.  Use syscall_get_arch() in the
        seccomp audit code.  Having syscall_get_arch() everywhere meant it was
        a useless flag on the stack and we could get rid of it for the typical
        syscall entry.
      
        The other changes inside the audit system aren't grand, fixed some
        records that had invalid spaces.  Better locking around the task comm
        field.  Removing some dead functions and structs.  Make some things
        static.  Really minor stuff"
      
      * git://git.infradead.org/users/eparis/audit: (31 commits)
        audit: rename audit_log_remove_rule to disambiguate for trees
        audit: cull redundancy in audit_rule_change
        audit: WARN if audit_rule_change called illegally
        audit: put rule existence check in canonical order
        next: openrisc: Fix build
        audit: get comm using lock to avoid race in string printing
        audit: remove open_arg() function that is never used
        audit: correct AUDIT_GET_FEATURE return message type
        audit: set nlmsg_len for multicast messages.
        audit: use union for audit_field values since they are mutually exclusive
        audit: invalid op= values for rules
        audit: use atomic_t to simplify audit_serial()
        kernel/audit.c: use ARRAY_SIZE instead of sizeof/sizeof[0]
        audit: reduce scope of audit_log_fcaps
        audit: reduce scope of audit_net_id
        audit: arm64: Remove the audit arch argument to audit_syscall_entry
        arm64: audit: Add audit hook in syscall_trace_enter/exit()
        audit: x86: drop arch from __audit_syscall_entry() interface
        sparc: implement is_32bit_task
        sparc: properly conditionalize use of TIF_32BIT
        ...
      ab074ade
    • Olof Johansson's avatar
      Merge tag 'qcom-dt-for-3.18-3' of... · 57764512
      Olof Johansson authored
      Merge tag 'qcom-dt-for-3.18-3' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into fixes
      
      Merge "qcom DT changes for v3.18-3" from Kumar Gala:
      
      Qualcomm ARM Based Device Tree Updates for v3.18-3
      
      * Added Board support for CM-QS600 and Sony Xperia Z1 phone
      * Added SATA support on IPQ8064/AP148
      
      * tag 'qcom-dt-for-3.18-3' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
        ARM: dts: qcom: add CM-QS600 board
        ARM: dts: qcom: Add initial DTS file for Sony Xperia Z1 phone
        ARM: dts: qcom: Add SATA support on IPQ8064/AP148
      57764512
    • Olof Johansson's avatar
      Merge tag 'samsung-fixes-2' of... · e29c6486
      Olof Johansson authored
      Merge tag 'samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes
      
      Pull more fixes from Kukjin Kim:
      
      2nd Samsung fixes for v3.18
      - Explicitly set dr_mode on exynos5800-peach-pi, exynos5420-peach-pit
        and exynos5420-arndale-octa boards, because the USB dwc3 controller
        will not work properly without dr_mode as host on above boards if
        the USB host and gadget are enabled in kernel configuration both.
      
      * tag 'samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
        ARM: dts: Explicitly set dr_mode on exynos5420-arndale-octa
        ARM: dts: Explicitly set dr_mode on exynos Peach boards
      Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
      e29c6486
    • Scott Branden's avatar
      MAINTAINERS: corrected bcm2835 search · 9209bec4
      Scott Branden authored
      Corrected bcm2835 maintainer info by using N: to specify any files with
      bcm2835 in are directed to the proper maintainer.
      Also corrected minor mispelling of ARCHITECTURE in 2 comment locations.
      Signed-off-by: default avatarScott Branden <sbranden@broadcom.com>
      Signed-off-by: default avatarStephen Warren <swarren@wwwdotorg.org>
      Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
      9209bec4
    • Linus Torvalds's avatar
      Merge tag 'ntb-3.18' of git://github.com/jonmason/ntb · 61ed53de
      Linus Torvalds authored
      Pull ntb (non-transparent bridge) updates from Jon Mason:
       "Add support for Haswell NTB split BARs, a debugfs entry for basic
        debugging info, and some code clean-ups"
      
      * tag 'ntb-3.18' of git://github.com/jonmason/ntb:
        ntb: Adding split BAR support for Haswell platforms
        ntb: use errata flag set via DID to implement workaround
        ntb: conslidate reading of PPD to move platform detection earlier
        ntb: move platform detection to separate function
        NTB: debugfs device entry
      61ed53de
    • Linus Torvalds's avatar
      Merge branch 'i2c/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux · 278f1d07
      Linus Torvalds authored
      Pull i2c updates from Wolfram Sang:
       "Highlights from the I2C subsystem for 3.18:
      
         - new drivers for Axxia AM55xx, and Hisilicon hix5hd2 SoC.
      
         - designware driver gained AMD support, exynos gained exynos7 support
      
        The rest is usual driver stuff.  Hopefully no lowlights this time"
      
      * 'i2c/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
        i2c: i801: Add Device IDs for Intel Sunrise Point PCH
        i2c: hix5hd2: add i2c controller driver
        i2c-imx: Disable the clock on probe failure
        i2c: designware: Add support for AMD I2C controller
        i2c: designware: Rework probe() to get clock a bit later
        i2c: designware: Default to fast mode in case of ACPI
        i2c: axxia: Add I2C driver for AXM55xx
        i2c: exynos: add support for HSI2C module on Exynos7
        i2c: mxs: detect No Slave Ack on SELECT in PIO mode
        i2c: cros_ec: Remove EC_I2C_FLAG_10BIT
        i2c: cros-ec-tunnel: Add of match table
        i2c: rcar: remove sign-compare flaw
        i2c: ismt: Use minimum descriptor size
        i2c: imx: Add arbitration lost check
        i2c: rk3x: Remove unlikely() annotations
        i2c: rcar: check for no IRQ in rcar_i2c_irq()
        i2c: rcar: make rcar_i2c_prepare_msg() *void*
        i2c: rcar: simplify check for last message
        i2c: designware: add support of platform data to set I2C mode
        i2c: designware: add support of I2C standard mode
      278f1d07
    • Linus Torvalds's avatar
      Merge tag 'sound-fix-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound · d590c6cd
      Linus Torvalds authored
      Pull sound fixes from Takashi Iwai:
       "Here are a collection of small fixes after 3.18 merge.
      
        The urgent one is the fix for kernel panics with linked PCM substream
        triggered by the recent nonatomic PCM ops support.  Other two fixes
        (emu10k1 and bebob) are stable fixes, and one easy PCI ID addition for
        a new Intel HD-audio controller"
      
      * tag 'sound-fix-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound:
        ALSA: hda_intel: Add Device IDs for Intel Sunrise Point PCH
        ALSA: emu10k1: Fix deadlock in synth voice lookup
        ALSA: pcm: Fix referred substream in snd_pcm_action_group() unlock loop
        ALSA: bebob: Fix failure to detect source of clock for Terratec Phase 88
      d590c6cd
    • Linus Torvalds's avatar
      Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input · fb378df5
      Linus Torvalds authored
      Pull second round of input updates from Dmitry Torokhov:
       "Mostly simple bug fixes, although we do have one brand new driver for
        Microchip AR1021 i2c touchscreen.
      
        Also there is the change to stop trying to use i8042 active
        multiplexing by default (it is still possible to activate it via
        i8042.nomux=0 on boxes that implement it)"
      
      * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input:
        Input: xpad - add Thrustmaster as Xbox 360 controller vendor
        Input: xpad - add USB ID for Thrustmaster Ferrari 458 Racing Wheel
        Input: max77693-haptic - fix state check in imax77693_haptic_disable()
        Input: xen-kbdfront - free grant table entry in xenkbd_disconnect_backend
        Input: alps - fix v4 button press recognition
        Input: i8042 - disable active multiplexing by default
        Input: i8042 - add noloop quirk for Asus X750LN
        Input: synaptics - gate forcepad support by DMI check
        Input: Add Microchip AR1021 i2c touchscreen
        Input: cros_ec_keyb - add of match table
        Input: serio - avoid negative serio device numbers
        Input: avoid negative input device numbers
        Input: automatically set EV_ABS bit in input_set_abs_params
        Input: adp5588-keys - cancel workqueue in failure path
        Input: opencores-kbd - switch to using managed resources
        Input: evdev - fix EVIOCG{type} ioctl
      fb378df5
    • Linus Torvalds's avatar
      Merge tag 'rdma-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband · 2eb7f910
      Linus Torvalds authored
      Pull infiniband/RDMA updates from Roland Dreier:
       - large set of iSER initiator improvements
       - hardware driver fixes for cxgb4, mlx5 and ocrdma
       - small fixes to core midlayer
      
      * tag 'rdma-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband: (47 commits)
        RDMA/cxgb4: Fix ntuple calculation for ipv6 and remove duplicate line
        RDMA/cxgb4: Add missing neigh_release in find_route
        RDMA/cxgb4: Take IPv6 into account for best_mtu and set_emss
        RDMA/cxgb4: Make c4iw_wr_log_size_order static
        IB/core: Fix XRC race condition in ib_uverbs_open_qp
        IB/core: Clear AH attr variable to prevent garbage data
        RDMA/ocrdma: Save the bit environment, spare unncessary parenthesis
        RDMA/ocrdma: The kernel has a perfectly good BIT() macro - use it
        RDMA/ocrdma: Don't memset() buffers we just allocated with kzalloc()
        RDMA/ocrdma: Remove a unused-label warning
        RDMA/ocrdma: Convert kernel VA to PA for mmap in user
        RDMA/ocrdma: Get vlan tag from ib_qp_attrs
        RDMA/ocrdma: Add default GID at index 0
        IB/mlx5, iser, isert: Add Signature API additions
        Target/iser: Centralize ib_sig_domain setting
        IB/iser: Centralize ib_sig_domain settings
        IB/mlx5: Use extended internal signature layout
        IB/iser: Set IP_CSUM as default guard type
        IB/iser: Remove redundant assignment
        IB/mlx5: Use enumerations for PI copy mask
        ...
      2eb7f910