- 21 Jun, 2015 40 commits
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Akinobu Mita authored
This replaces the plain loop over the sglist array with for_each_sg() macro which consists of sg_next() function calls. Since MIPS doesn't select ARCH_HAS_SG_CHAIN, it is not necessary to use for_each_sg() in order to loop over each sg element. But this can help find problems with drivers that do not properly initialize their sg tables when CONFIG_DEBUG_SG is enabled. Signed-off-by:
Akinobu Mita <akinobu.mita@gmail.com> Cc: akpm@linux-foundation.org Cc: linux-mips@linux-mips.org Cc: linux-arch@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9930/Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Rafał Miłecki authored
SoC may have non-Broadcom PCI device attached or one may want to use totally different PCI driver. Signed-off-by:
Rafał Miłecki <zajec5@gmail.com> Cc: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Patchwork: https://patchwork.linux-mips.org/patch/10537/Signed-off-by:
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Rafał Miłecki authored
This simplifies code just a bit (also maybe makes it a bit more intuitive?) and will allow us to stop storing header. Right now we copy whole NVRAM including its header to the internal buffer. It is not needed to store a header as we don't access all these details like CRC, flags, etc. The next improvement that should follow is copying only the real contents. Signed-off-by:
Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Cc: Arend van Spriel <arend@broadcom.com> Cc: Hante Meuleman <meuleman@broadcom.com> Patchwork: https://patchwork.linux-mips.org/patch/10535/Signed-off-by:
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Ralf Baechle authored
allocate_irqno, free_irqno and alloc_legacy_irqno are a simple allocator for interrupt numbers from the days when the numer of interrupts was still fixed to NR_IRQS. This was necessary for the SGI IP27 architecture which with its flexible architecture and possibly large number of interrupts doesn't easily fit into the old pattern. These days there are better alternatives. Move the allocation code from the arch generic code to the only platform using it, the SGI IP27 aka Origin 200/2000, Onyx 2. Signed-off-by: -
Leonid Yegoshin authored
Repleace smp_mb() in arch_write_unlock() and __clear_bit_unlock() to smp_mb__before_llsc() call which does "release" barrier functionality. It seems like it was missed in commit f252ffd5 during introduction of "acquire" and "release" semantics. [ralf@linux-mips: The original patch submission was labelled a fix but actually it replaces a barrier with another less restrictive type of barrier so it doesn't fix any ill behaviour but rather squeezes out a tad better performance. Further improvments will be possible once smp_release() has been merged.] Signed-off-by:
Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: linux-mips@linux-mips.org Cc: benh@kernel.crashing.org Cc: will.deacon@arm.com Cc: linux-kernel@vger.kernel.org Cc: markos.chandras@imgtec.com Cc: macro@linux-mips.org Cc: Steven.Hill@imgtec.com Cc: alexander.h.duyck@redhat.com Cc: davem@davemloft.net Patchwork: https://patchwork.linux-mips.org/patch/10507/Signed-off-by:
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Paul Burton authored
Support probing the i8259 programmable interrupt controller, as found on the Malta board, and using its interrupts via device tree. Signed-off-by:
Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: linux-kernel@vger.kernel.org Patchwork: http://patchwork.linux-mips.org/patch/10114/Signed-off-by:
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Paul Burton authored
Build a DT for the Malta platform into the kernel, load it & probe devices from it. The DT is essentially empty at this point, devices will be added in further patches. [ralf@linux-mips.org: Fixed conflicts.] Signed-off-by:
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Paul Burton authored
A later patch in this series will include mips-cm.h but does not require errno.h. This leads to a build failure with ENODEV undeclared. Include errno.h from mips-cm.h to pull in the appropriate definition and avoid the build failure. Signed-off-by:
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Paul Burton authored
Add definitions for the GICEX field in the GCR_GIC_STATUS register to mips-cm.h for use in a later patch. Signed-off-by:
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Markos Chandras authored
This commit introduces BPF ASM helpers for MIPS and MIPS64 kernels. The purpose of this patch is to twofold: 1) We are now able to handle negative offsets instead of either falling back to the interpreter or to simply not do anything and bail out. 2) Optimize reads from the packet header instead of calling the C helpers Because of this patch, we are now able to get rid of quite a bit of code in the JIT generation process by using MIPS optimized assembly code. The new assembly code makes the test_bpf testsuite happy with all 60 test passing successfully compared to the previous implementation where 2 tests were failing. Doing some basic analysis in the results between the old implementation and the new one we can obtain the following summary running current mainline on an ER8 board (+/- 30us delta is ignored to prevent noise from kernel scheduling or IRQ latencies): Summary: 22 tests are faster, 7 are slower and 47 saw no improvement with the most notable improvement being the tcpdump tests. The 7 tests that seem to be a bit slower is because they all follow the slow path (bpf_internal_load_pointer_neg_helper) which is meant to be slow so that's not a problem. Signed-off-by:
Markos Chandras <markos.chandras@imgtec.com> Cc: netdev@vger.kernel.org Cc: "David S. Miller" <davem@davemloft.net> Cc: Alexei Starovoitov <ast@plumgrid.com> Cc: Daniel Borkmann <dborkman@redhat.com> Cc: Hannes Frederic Sowa <hannes@stressinduktion.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Patchwork: http://patchwork.linux-mips.org/patch/10530/Signed-off-by:
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Markos Chandras authored
Use the BPF register names instead of the arch register names to document how the ABI is structured. Signed-off-by:
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Markos Chandras authored
The registers will be used by a subsequent patch introducing ASM helpers so move them to a common header. Signed-off-by:
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Markos Chandras authored
The RSZIE was used to determine the register width but MIPS already defines SZREG so use that instead. Cc: netdev@vger.kernel.org Cc: "David S. Miller" <davem@davemloft.net> Cc: Alexei Starovoitov <ast@plumgrid.com> Cc: Daniel Borkmann <dborkman@redhat.com> Cc: Hannes Frederic Sowa <hannes@stressinduktion.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Patchwork: http://patchwork.linux-mips.org/patch/10526/Signed-off-by:
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Markos Chandras authored
Move the two scratch registers from s0 and s1 to t4 and t5 in order to free up some callee-saved registers. We will use these callee-saved registers to store some permanent data on them in a subsequent patch. Signed-off-by:
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Joshua Kinard authored
This is the first patch of two to clean up/update the Xtalk detection code used by IP27 with some of the code used in the IP30 port. This specific patch adds Xtalk widget manufacturer and widget device numbers to arch/mips/include/asm/xtalk/widget.h Signed-off-by:
Joshua Kinard <kumba@gentoo.org> Cc: Linux MIPS List <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/10174/Signed-off-by:
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Paul Burton authored
Commits ac1d8590 (MIPS: asm: uaccess: Use EVA instructions wrappers), 05c65160 (MIPS: asm: uaccess: Add EVA support to copy_{in, to,from}_user) & e3a9b07a (MIPS: asm: uaccess: Add EVA support for str*_user operations) added checks to various user memory access functions & macros in order to determine whether to perform standard memory accesses or their EVA userspace equivalents. In kernels built without support for EVA these checks are entirely redundant. Avoid emitting them & allow the compiler to optimise out the EVA userspace code in such kernels by checking config_enabled(CONFIG_EVA). This reduces the size of a malta_defconfig kernel built using GCC 4.9.2 by approximately 33KB (from 5995072 to 5962304 bytes). Signed-off-by:
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Ben Hutchings authored
The Octeon OHCI is now supported by the ohci-platform driver, and USB_OCTEON_OHCI is marked as deprecated. However, it is currently still necessary to enable it in order to select USB_OHCI_BIG_ENDIAN_MMIO. Make CPU_CAVIUM_OCTEON select that as well, so that USB_OCTEON_OHCI is really obsolete. The old ohci-octeon and ehci-octeon drivers also only enabled big-endian MMIO in case the CPU was big-endian. Make the selections of USB_EHCI_BIG_ENDIAN_MMIO and USB_OHCI_BIG_ENDIAN_MMIO conditional, to match this. Fixes: 2193dda5 ("USB: host: Remove ehci-octeon and ohci-octeon drivers") Signed-off-by:
Ben Hutchings <ben@decadent.org.uk> Cc: Alan Stern <stern@rowland.harvard.edu> Cc: linux-mips@linux-mips.org Cc: David Daney <david.daney@cavium.com> Cc: Chandrakala Chavva <cchavva@caviumnetworks.com> Cc: Paul Martin <paul.martin@codethink.co.uk> Patchwork: https://patchwork.linux-mips.org/patch/10178/Signed-off-by:
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Jonas Gorski authored
Detect and use passed dtb address using the UHI interface. This allows for booting with a vmlinux.bin appended dtb instead of using a built-in one. Signed-off-by:
Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: John Crispin <blogic@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: James Hartley <James.Hartley@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/9742/Signed-off-by:
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Jonas Gorski authored
Build all available dtbs to allow them to be appended to the resulting kernel in case there is no builtin dtb. Signed-off-by:
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Jonas Gorski authored
Add support for detecting a vmlinuz.bin appended dtb and overriding the boot arguments to match the UHI interface. To ensure _edata / __apendend_dtb points to the actual end of the binary, align the data section to 16 bytes instead of the address cursor. Due to ld.script not going through the preprocessor, we can't check for MIPS_ZBOOT_APPENDED_DTB being enabled, so always reserve space for it. It should have no consequences for booting without it enabled except 1 MiB more ram usage during the uncompressing stage. Signed-off-by:
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Jonas Gorski authored
Add support for detecting a vmlinux.bin appended dtb and overriding the boot arguments to match the UHI interface. Due to the PERCPU section being empty for !SMP, but still modifying the current address by aligning it to the page size, do not define it for !SMP builds to allow __appended_dtb to still point to the actual end of the data. Signed-off-by:
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Rob Herring authored
In preparation to allow users to enable DeviceTree without arch or machine selecting it, we need to fix build errors on MIPS. When CONFIG_OF is enabled, device_tree_init cannot be resolved. This is trivially fixed by using CONFIG_USE_OF instead of CONFIG_OF for prom.h. Signed-off-by:
Rob Herring <robh@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Signed-off-by:
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Joshua Kinard authored
The R12000 added a new feature to enhance branch prediction called "global history". Per the Vr10000 Series User Manual (U10278EJ4V0UM), Coprocessor 0, Diagnostic Register (22): """ If bit 26 is set, branch prediction uses all eight bits of the global history register. If bit 26 is not set, then bits 25:23 specify a count of the number of bits of global history to be used. Thus if bits 26:23 are all zero, global history is disabled. The global history contains a record of the taken/not-taken status of recently executed branches, and when used is XOR'ed with the PC of a branch being predicted to produce a hashed value for indexing the BPT. Some programs with small "working set of conditional branches" benefit significantly from the use of such hashing, some see slight performance degradation. """ This patch enables global history on R12000 CPUs and up by setting bit 26 in the branch prediction diagnostic register (CP0 $22) to '1'. Bits 25:23 are left alone so that all eight bits of the global history register are available for branch prediction. Signed-off-by:
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Joshua Kinard authored
Inspired by Maciej's recent patch to update DEC cpu-feature-overrides.h, I updated IP27's as well to disable features known to not apply to the IP27 platform or the R10K-series of CPUs. Before: text data bss dec hex filename 8616648 463200 472240 9552088 91c0d8 vmlinux After: text data bss dec hex filename 8592256 471392 472240 9535888 918190 vmlinux I believe the increase in the size of the data section is for the same reasons as in the DEC patch. Signed-off-by:
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Paul Gortmaker authored
The file looks as if it is non-modular, but it piggy-backs off CONFIG_SERIAL_8250 which is tristate. If set to "=m" we will get this after the init/module header cleanup: arch/mips/loongson/common/serial.c:76:1: error: data definition has no type or storage class [-Werror] arch/mips/loongson/common/serial.c:76:1: error: type defaults to 'int' in declaration of 'device_initcall' [-Werror=implicit-int] arch/mips/loongson/common/serial.c:76:1: error: parameter names (without types) in function declaration [-Werror] arch/mips/loongson/common/serial.c:58:19: error: 'serial_init' defined but not used [-Werror=unused-function] cc1: all warnings being treated as errors make[3]: *** [arch/mips/loongson/common/serial.o] Error 1 Make it clearly modular, and add a module_exit function, so that we avoid the above breakage. Reported-by:
kbuild test robot <fengguang.wu@intel.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Signed-off-by:
Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by:
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Sergei Shtylyov authored
Commit 854700115ecf ([MIPS] kgdb: add arch support for the kernel's kgdb core) added the 'kgdb_early_setup' flag to avoid calling trap_init() and init_IRQ() the second time, however the code that called these functions earlier, from kgdb_arch_init(), had been already removed by that time, so the flag never served any useful purpose. Remove the related code along with ugly #ifdef'ery at last. [ralf@linux-mips.org: Folded in Guenter Roeck's fix.] Signed-off-by:
Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Patchwork: https://patchwork.linux-mips.org/patch/10501/Signed-off-by:
Guenter Roeck <linux@roeck-us.net> Patchwork: https://patchwork.linux-mips.org/patch/10533/Signed-off-by:
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Alban Bedel authored
Add a DTS for TL-WR1043ND version 1 and allow to have it built in the kernel to circumvent the broken u-boot found on these boards. Currently only the UART, LEDs and buttons are supported. Signed-off-by:
Alban Bedel <albeu@free.fr> Cc: linux-mips@linux-mips.org Signed-off-by:
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Alban Bedel authored
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Alban Bedel authored
Replace the simple GPIO chip registration by a platform driver and make ath79_gpio_init() just register the device. Signed-off-by:
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Alban Bedel authored
These bindings support the GPIO controllers found on the Qualcomm Atheros AR7xxx/AR9XXX SoC. Signed-off-by:
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Alban Bedel authored
Allow using the SoC clocks in the device tree. Signed-off-by:
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Alban Bedel authored
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Alban Bedel authored
Add OF support for the CPU and MISC interrupt controllers of most supported ATH79 devices. Signed-off-by:
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Alban Bedel authored
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Alban Bedel authored
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Alban Bedel authored
The DDR controller of the ARxxx and AR9xxx families provides an interface to flush the FIFO between various devices and the DDR. This is mainly used by the IRQ controller to flush the FIFO before running the interrupt handler of such devices. Signed-off-by:
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Alban Bedel authored
Add the bare minimum to load a device tree. Signed-off-by:
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Alban Bedel authored
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Hante Meuleman authored
Host platforms such as routers supported by OpenWrt can support NVRAM reading directly from internal NVRAM store. The brcmfmac for one requires the complete nvram contents to select what needs to be sent to wireless device. Signed-off-by:
Arend van Spriel <arend@broadcom.com> Signed-off-by:
Hante Meuleman <meuleman@broadcom.com> Reviewed-by:
Franky (Zhenhui) Lin <frankyl@broadcom.com> Reviewed-by:
Pieter-Paul Giesberts <pieterpg@broadcom.com> Reviewed-by:
Daniel (Deognyoun) Kim <dekim@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10093/Signed-off-by:
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Huacai Chen authored
Currently, code of Loongson-2/3 is under loongson directory and code of Loongson-1 is under loongson1 directory. Besides, there are Kconfig options such as MACH_LOONGSON and MACH_LOONGSON1. This naming style is very ugly and confusing. Since Loongson-2/3 are both 64-bit general- purpose CPU while Loongson-1 is 32-bit SoC, we rename both file names and Kconfig symbols from loongson/loongson1 to loongson64/loongson32. [ralf@linux-mips.org: Resolve a number of simple conflicts.] Signed-off-by:
Huacai Chen <chenhc@lemote.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Cc: Kelvin Cheung <keguang.zhang@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/9790/Signed-off-by:
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