1. 15 Dec, 2020 10 commits
  2. 14 Dec, 2020 7 commits
  3. 12 Dec, 2020 7 commits
    • Paolo Bonzini's avatar
      Merge tag 'kvm-s390-next-5.11-1' of... · e8614e5e
      Paolo Bonzini authored
      Merge tag 'kvm-s390-next-5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux into HEAD
      
      KVM: s390: Features and Test for 5.11
      
      - memcg accouting for s390 specific parts of kvm and gmap
      - selftest for diag318
      - new kvm_stat for when async_pf falls back to sync
      
      The selftest even triggers a non-critical bug that is unrelated
      to diag318, fix will follow later.
      e8614e5e
    • Paolo Bonzini's avatar
      KVM: x86: reinstate vendor-agnostic check on SPEC_CTRL cpuid bits · 39485ed9
      Paolo Bonzini authored
      Until commit e7c587da ("x86/speculation: Use synthetic bits for
      IBRS/IBPB/STIBP"), KVM was testing both Intel and AMD CPUID bits before
      allowing the guest to write MSR_IA32_SPEC_CTRL and MSR_IA32_PRED_CMD.
      Testing only Intel bits on VMX processors, or only AMD bits on SVM
      processors, fails if the guests are created with the "opposite" vendor
      as the host.
      
      While at it, also tweak the host CPU check to use the vendor-agnostic
      feature bit X86_FEATURE_IBPB, since we only care about the availability
      of the MSR on the host here and not about specific CPUID bits.
      
      Fixes: e7c587da ("x86/speculation: Use synthetic bits for IBRS/IBPB/STIBP")
      Cc: stable@vger.kernel.org
      Reported-by: default avatarDenis V. Lunev <den@openvz.org>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      39485ed9
    • Cathy Zhang's avatar
      KVM: x86: Expose AVX512_FP16 for supported CPUID · 2224fc9e
      Cathy Zhang authored
      AVX512_FP16 is supported by Intel processors, like Sapphire Rapids.
      It could gain better performance for it's faster compared to FP32
      if the precision or magnitude requirements are met. It's availability
      is indicated by CPUID.(EAX=7,ECX=0):EDX[bit 23].
      
      Expose it in KVM supported CPUID, then guest could make use of it; no
      new registers are used, only new instructions.
      Signed-off-by: default avatarCathy Zhang <cathy.zhang@intel.com>
      Signed-off-by: default avatarKyung Min Park <kyung.min.park@intel.com>
      Acked-by: default avatarDave Hansen <dave.hansen@intel.com>
      Reviewed-by: default avatarTony Luck <tony.luck@intel.com>
      Message-Id: <20201208033441.28207-3-kyung.min.park@intel.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      2224fc9e
    • Kyung Min Park's avatar
      x86: Enumerate AVX512 FP16 CPUID feature flag · e1b35da5
      Kyung Min Park authored
      Enumerate AVX512 Half-precision floating point (FP16) CPUID feature
      flag. Compared with using FP32, using FP16 cut the number of bits
      required for storage in half, reducing the exponent from 8 bits to 5,
      and the mantissa from 23 bits to 10. Using FP16 also enables developers
      to train and run inference on deep learning models fast when all
      precision or magnitude (FP32) is not needed.
      
      A processor supports AVX512 FP16 if CPUID.(EAX=7,ECX=0):EDX[bit 23]
      is present. The AVX512 FP16 requires AVX512BW feature be implemented
      since the instructions for manipulating 32bit masks are associated with
      AVX512BW.
      
      The only in-kernel usage of this is kvm passthrough. The CPU feature
      flag is shown as "avx512_fp16" in /proc/cpuinfo.
      Signed-off-by: default avatarKyung Min Park <kyung.min.park@intel.com>
      Acked-by: default avatarDave Hansen <dave.hansen@intel.com>
      Reviewed-by: default avatarTony Luck <tony.luck@intel.com>
      Message-Id: <20201208033441.28207-2-kyung.min.park@intel.com>
      Acked-by: default avatarBorislav Petkov <bp@suse.de>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      e1b35da5
    • Aaron Lewis's avatar
      selftests: kvm: Merge user_msr_test into userspace_msr_exit_test · fb636053
      Aaron Lewis authored
      Both user_msr_test and userspace_msr_exit_test tests the functionality
      of kvm_msr_filter.  Instead of testing this feature in two tests, merge
      them together, so there is only one test for this feature.
      Signed-off-by: default avatarAaron Lewis <aaronlewis@google.com>
      Message-Id: <20201204172530.2958493-1-aaronlewis@google.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      fb636053
    • Aaron Lewis's avatar
      selftests: kvm: Test MSR exiting to userspace · 3cea1891
      Aaron Lewis authored
      Add a selftest to test that when the ioctl KVM_X86_SET_MSR_FILTER is
      called with an MSR list, those MSRs exit to userspace.
      
      This test uses 3 MSRs to test this:
        1. MSR_IA32_XSS, an MSR the kernel knows about.
        2. MSR_IA32_FLUSH_CMD, an MSR the kernel does not know about.
        3. MSR_NON_EXISTENT, an MSR invented in this test for the purposes of
           passing a fake MSR from the guest to userspace.  KVM just acts as a
           pass through.
      
      Userspace is also able to inject a #GP.  This is demonstrated when
      MSR_IA32_XSS and MSR_IA32_FLUSH_CMD are misused in the test.  When this
      happens a #GP is initiated in userspace to be thrown in the guest which is
      handled gracefully by the exception handling framework introduced earlier
      in this series.
      
      Tests for the generic instruction emulator were also added.  For this to
      work the module parameter kvm.force_emulation_prefix=1 has to be enabled.
      If it isn't enabled the tests will be skipped.
      
      A test was also added to ensure the MSR permission bitmap is being set
      correctly by executing reads and writes of MSR_FS_BASE and MSR_GS_BASE
      in the guest while alternating which MSR userspace should intercept.  If
      the permission bitmap is being set correctly only one of the MSRs should
      be coming through at a time, and the guest should be able to read and
      write the other one directly.
      Signed-off-by: default avatarAaron Lewis <aaronlewis@google.com>
      Reviewed-by: default avatarAlexander Graf <graf@amazon.com>
      Message-Id: <20201012194716.3950330-5-aaronlewis@google.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      3cea1891
    • Uros Bizjak's avatar
      KVM/VMX: Use TEST %REG,%REG instead of CMP $0,%REG in vmenter.S · 6c44221b
      Uros Bizjak authored
      Saves one byte in __vmx_vcpu_run for the same functionality.
      
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Sean Christopherson <sean.j.christopherson@intel.com>
      Signed-off-by: default avatarUros Bizjak <ubizjak@gmail.com>
      Message-Id: <20201029140457.126965-1-ubizjak@gmail.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      6c44221b
  4. 10 Dec, 2020 4 commits
  5. 09 Dec, 2020 1 commit
  6. 03 Dec, 2020 1 commit
  7. 27 Nov, 2020 1 commit
  8. 19 Nov, 2020 2 commits
  9. 16 Nov, 2020 5 commits
    • Paolo Bonzini's avatar
      KVM: SVM: check CR4 changes against vcpu->arch · dc924b06
      Paolo Bonzini authored
      Similarly to what vmx/vmx.c does, use vcpu->arch.cr4 to check if CR4
      bits PGE, PKE and OSXSAVE have changed.  When switching between VMCB01
      and VMCB02, CPUID has to be adjusted every time if CR4.PKE or CR4.OSXSAVE
      change; without this patch, instead, CR4 would be checked against the
      previous value for L2 on vmentry, and against the previous value for
      L1 on vmexit, and CPUID would not be updated.
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      dc924b06
    • Cathy Avery's avatar
      KVM: SVM: Move asid to vcpu_svm · 7e8e6eed
      Cathy Avery authored
      KVM does not have separate ASIDs for L1 and L2; either the nested
      hypervisor and nested guests share a single ASID, or on older processor
      the ASID is used only to implement TLB flushing.
      
      Either way, ASIDs are handled at the VM level.  In preparation
      for having different VMCBs passed to VMLOAD/VMRUN/VMSAVE for L1 and
      L2, store the current ASID to struct vcpu_svm and only move it to
      the VMCB in svm_vcpu_run.  This way, TLB flushes can be applied
      no matter which VMCB will be active during the next svm_vcpu_run.
      Signed-off-by: default avatarCathy Avery <cavery@redhat.com>
      Message-Id: <20201011184818.3609-2-cavery@redhat.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      7e8e6eed
    • Alex Shi's avatar
      x86/kvm: remove unused macro HV_CLOCK_SIZE · 789f52c0
      Alex Shi authored
      This macro is useless, and could cause gcc warning:
      arch/x86/kernel/kvmclock.c:47:0: warning: macro "HV_CLOCK_SIZE" is not
      used [-Wunused-macros]
      Let's remove it.
      Signed-off-by: default avatarAlex Shi <alex.shi@linux.alibaba.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Sean Christopherson <sean.j.christopherson@intel.com>
      Cc: Vitaly Kuznetsov <vkuznets@redhat.com>
      Cc: Wanpeng Li <wanpengli@tencent.com>
      Cc: Jim Mattson <jmattson@google.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: x86@kernel.org
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Cc: kvm@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Message-Id: <1604651963-10067-1-git-send-email-alex.shi@linux.alibaba.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      789f52c0
    • Andrew Jones's avatar
      KVM: selftests: x86: Set supported CPUIDs on default VM · 22f232d1
      Andrew Jones authored
      Almost all tests do this anyway and the ones that don't don't
      appear to care. Only vmx_set_nested_state_test assumes that
      a feature (VMX) is disabled until later setting the supported
      CPUIDs. It's better to disable that explicitly anyway.
      Signed-off-by: default avatarAndrew Jones <drjones@redhat.com>
      Message-Id: <20201111122636.73346-11-drjones@redhat.com>
      [Restore CPUID_VMX, or vmx_set_nested_state breaks. - Paolo]
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      22f232d1
    • Andrew Jones's avatar
      KVM: selftests: Make test skipping consistent · 08d3e277
      Andrew Jones authored
      Signed-off-by: default avatarAndrew Jones <drjones@redhat.com>
      Message-Id: <20201111122636.73346-12-drjones@redhat.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      08d3e277
  10. 15 Nov, 2020 2 commits