- 13 Apr, 2022 35 commits
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Luca Weiss authored
Configure regulators used by the wifi hardware and enable it. Signed-off-by:
Luca Weiss <luca.weiss@fairphone.com> Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220325101841.172304-2-luca.weiss@fairphone.com
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Luca Weiss authored
Add a node describing the wifi hardware found on sm6350. Signed-off-by:
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Konrad Dybcio authored
Set the aliases for both SDHCI controllers. Signed-off-by:
Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by:
Petr Vorel <petr.vorel@gmail.com> Signed-off-by:
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Konrad Dybcio authored
Add and configure the watchdog node. Signed-off-by:
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Konrad Dybcio authored
MSM8994 actually features 24 DMA channels for each BLSP, fix it! Signed-off-by:
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Konrad Dybcio authored
Add OCMEM node to allow for GPU SRAM access. Signed-off-by:
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Konrad Dybcio authored
Remove regulator-always-on property where not necessary and mark regulators that are not supposed to be voted active on boot with regulator-boot-on. While at it, reorder the load properties to make it look more decent. Reorder PMICs to fix a probe defer caused by messy dependencies and Linux's inability to handle them (at least for now). Signed-off-by:
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Konrad Dybcio authored
I2C4 turns out not to be used on Kitakami after all and it only blocks a GPIO used by camera hardware. Signed-off-by:
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Konrad Dybcio authored
Make sure the necessary clocks are kept on after clk_cleanup (until MDSS is properly handled by its own driver) and touch up the fb address to prevent some weird shifting. It's still not perfect, but at least the kernel log doesn't start a third deep into your screen.. Signed-off-by:
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Konrad Dybcio authored
The default memory map places cont_splash_mem at 3401000, which was overlooked.. Fix it! Signed-off-by:
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Konrad Dybcio authored
Now that proper msm8992 support is in the driver, switch to the new compatible. Signed-off-by:
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Konrad Dybcio authored
Now that proper msm8992 support is in the driver, switch to the new compatible. Signed-off-by:
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Konrad Dybcio authored
Describe the Multimedia Clock Controller block in the DT. Signed-off-by:
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Konrad Dybcio authored
The framebuffer is already enabled by default. Signed-off-by:
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Konrad Dybcio authored
The phone seems to randomly crash when more than 1 CPU is enabled, which is probably related to lack of some driver. Restrict the device to only use a single core until this is solved. Signed-off-by:
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Konrad Dybcio authored
Specify CPU regulator voltages for both VDD_APC rails. Signed-off-by:
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Konrad Dybcio authored
The sleep clock name expected by GCC is actually "sleep" and not "sleep_clk". Fix the clock-names value for it to make sure it is provided. Fixes: 9204da57cd65 ("arm64: dts: qcom: msm8994: Provide missing "xo_board" and "sleep_clk" to GCC") Signed-off-by: -
Akhil P Oommen authored
Add speedbin fuse and additional OPPs for gpu to support sc7280 SKUs. Signed-off-by:
Akhil P Oommen <quic_akhilpo@quicinc.com> Signed-off-by:
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Kathiravan T authored
Sleep clock frequency should be 32768Hz. Lets fix it. Cc: stable@vger.kernel.org Fixes: 41dac73e ("arm64: dts: Add ipq8074 SoC and HK01 board support") Link: https://lore.kernel.org/all/e2a447f8-6024-0369-f698-2027b6edcf9e@codeaurora.org/Signed-off-by:
Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by:
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Dmitry Baryshkov authored
The number of interrupt cells for the mdss interrupt controller is 1, meaning there should only be one cell for the interrupt number, not two. Drop the second cell containing (unused) irq flags. Reviewed-by:
Stephen Boyd <swboyd@chromium.org> Fixes: 7c1dffd4 ("arm64: dts: qcom: sm8250.dtsi: add display system nodes") Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by:
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Dmitry Baryshkov authored
The number of interrupt cells for the mdss interrupt controller is 1, meaning there should only be one cell for the interrupt number, not two. Drop the second cell containing (unused) irq flags. Reviewed-by:
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Dmitry Baryshkov authored
The number of interrupt cells for the mdss interrupt controller is 1, meaning there should only be one cell for the interrupt number, not two. Drop the second cell containing (unused) irq flags. Reviewed-by:
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Dmitry Baryshkov authored
The number of interrupt cells for the mdss interrupt controller is 1, meaning there should only be one cell for the interrupt number, not two. Drop the second cell containing (unused) irq flags. Reviewed-by:
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Dmitry Baryshkov authored
The number of interrupt cells for the mdss interrupt controller is 1, meaning there should only be one cell for the interrupt number, not two. Drop the second cell containing (unused) irq flags. Reviewed-by:
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Dmitry Baryshkov authored
Add device tree nodes for PCIe0/PCIe1 controllers and corresponding PHYs. Signed-off-by:
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Dmitry Baryshkov authored
Enable PCIe0 host on SM8450 QRD device. Signed-off-by:
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Dmitry Baryshkov authored
Enable PCIe0 PHY on the SM8450 QRD device. Signed-off-by:
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Dmitry Baryshkov authored
Add device tree node for the second PCIe host found on the Qualcomm SM8450 platform. Signed-off-by:
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Dmitry Baryshkov authored
Add device tree node for the second PCIe PHY device found on the Qualcomm SM8450 platform. Signed-off-by:
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Dmitry Baryshkov authored
Add device tree node for the first PCIe host found on the Qualcomm SM8450 platform. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by:
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Dmitry Baryshkov authored
Add device tree node for the first PCIe PHY device found on the Qualcomm SM8450 platform. Signed-off-by:
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Taniya Das authored
Add the low pass audio clock controller device nodes. Signed-off-by:
Taniya Das <tdas@codeaurora.org> Reviewed-by:
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Bjorn Andersson authored
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Taniya Das authored
The LPASS(Low Power Audio Subsystem) clock provider have a bunch of generic properties that are needed in a device tree. Also add clock ids for LPASS core clocks and audio clock IDs for LPASS client to request for the clocks. Reviewed-by:
Rob Herring <robh@kernel.org> Reviewed-by:
Stephen Boyd <sboyd@kernel.org> Signed-off-by:
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Kuldeep Singh authored
Qcom BAM DT spec expects generic DMA controller node name as "dma-controller" to enable validations. Signed-off-by:
Kuldeep Singh <singh.kuldeep87k@gmail.com> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
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- 12 Apr, 2022 5 commits
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Stephan Gerhold authored
The huawei-g7 uses the msm8916-wcd-digital/analog audio codecs similar to apq8016-sbc, so we can mostly copy paste it from there to make audio work correctly. The main difference is the hphl-jack-type-normally-open property, which is needed to avoid inverted audio jack detection. Note that at least on my device the jack detection is not fully reliable: sometimes headphones are detected as headsets (with microphone). However, this is not a big problem for typical usage. Signed-off-by:
Stephan Gerhold <stephan@gerhold.net> Signed-off-by:
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Stephan Gerhold authored
The comment with installation instructions in the huawei-g7 device tree is a bit misleading and does not describe the recommended installation steps very well. The bootloader is actually not patched; to avoid all trouble with the vendor bootloader it is easier to bypass it completely by jumping to a custom bootloader (e.g. based on the open-source LK released by Qualcomm). To avoid confusion, simplify the comment to state only the problem and then refer to the wiki article which contains detailed suggested installation instructions. This will also make it easier to keep it up to date with new developments in the future. Fixes: 55056b22 ("arm64: dts: qcom: msm8916: Add device tree for Huawei Ascend G7") Signed-off-by:
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Konrad Dybcio authored
Add nodes for dual Cirrus Logic CS35L41 audio amps connected via I2C. Signed-off-by:
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Shaik Sajida Bhanu authored
Add gcc hardware reset entries for eMMC and SD card. Signed-off-by:
Shaik Sajida Bhanu <quic_c_sbhanu@quicinc.com> Signed-off-by:
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Douglas Anderson authored
The L2C rail on herobrine boards is intended to go to the audio codec. Let's override the 1.62V specified in the qcard.dtsi file to be 1.8V. Signed-off-by:
Douglas Anderson <dianders@chromium.org> Signed-off-by:
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