- 25 Sep, 2020 5 commits
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Ofir Bitton authored
LDMA registers are configured with a fixed value. We add new define set which gives the configuration a proper meaning. Signed-off-by: Ofir Bitton <obitton@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Oded Gabbay authored
The device should be idle after a context is closed. If not, print a notice. Reviewed-by: Tomer Tayar <ttayar@habana.ai> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Oded Gabbay authored
During debugging of error we sometimes need to know whether the error happened when a user context was open. Add debug prints when opening and closing user contexts. Reviewed-by: Tomer Tayar <ttayar@habana.ai> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Oded Gabbay authored
Some engines use resources that belong to the kernel context (e.g. MMU mappings). In case the halt-engines doesn't work properly due to H/W restriction, we need to make sure the kernel context lives on until after the hw_fini. The hw_fini resets the ASIC after that no engine is alive and we can safely close the kernel context. Reviewed-by: Tomer Tayar <ttayar@habana.ai> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Oded Gabbay authored
We don't try to allocate huge pages here so remove the huge word. Reviewed-by: Tomer Tayar <ttayar@habana.ai> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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- 24 Sep, 2020 1 commit
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https://git.linaro.org/people/georgi.djakov/linuxGreg Kroah-Hartman authored
Georgi writes: interconnect changes for 5.10 Here are the interconnect changes for the 5.10-rc1 merge window consisting of core changes, new drivers and cleanups. Core changes: - New bulk API helpers for managing multiple interconnect paths. - New xlate_extended() interface for parsing additional data from DT. - Support for sync_state(). Driver changes: - New drivers for SM8150 and SM8250 platforms. - New drivers for the Qualcomm OSM and EPSS hardware blocks. - Per-BCM scaling factor support. - Misc cleanups. Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> * tag 'icc-5.10-rc1' of https://git.linaro.org/people/georgi.djakov/linux: (28 commits) interconnect: imx: simplify the return expression of imx_icc_unregister interconnect: imx: Simplify with dev_err_probe() interconnect: core: Simplify with dev_err_probe() interconnect: qcom: Use icc_sync_state interconnect: Add sync state support interconnect: Add get_bw() callback interconnect: qcom: osm-l3: Mark more structures const interconnect: qcom: Add EPSS L3 support on SM8250 dt-bindings: interconnect: Add EPSS L3 DT binding on SM8250 interconnect: qcom: Lay the groundwork for adding EPSS support interconnect: qcom: Add OSM L3 support on SM8150 dt-bindings: interconnect: Add OSM L3 DT binding on SM8150 interconnect: qcom: sc7180: Replace xlate with xlate_extended interconnect: qcom: sdm845: Replace xlate with xlate_extended interconnect: qcom: Implement xlate_extended() to parse tags dt-bindings: interconnect: Document the support of optional path tag interconnect: Introduce xlate_extended() callback interconnect: qcom: Add support for per-BCM scaling factors interconnect: qcom: Only wait for completion in AMC/WAKE by default interconnect: qcom: Support bcm-voter-specific TCS wait behavior ...
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- 22 Sep, 2020 34 commits
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Dan Carpenter authored
This return statement is indented one tab too far. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/20200918143405.GF909725@mwandaSigned-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Souptick Joarder authored
Inside __scif_pin_pages(), when map_flags != SCIF_MAP_KERNEL it will call pin_user_pages_fast() to map nr_pages. However, pin_user_pages_fast() might fail with a return value -ERRNO. The return value is stored in pinned_pages->nr_pages. which in turn is passed to unpin_user_pages(), which expects pinned_pages->nr_pages >=0, else disaster. Fix this by assigning pinned_pages->nr_pages to 0 if pin_user_pages_fast() returns -ERRNO. Fixes: ba612aa8 ("misc: mic: SCIF memory registration and unregistration") Cc: John Hubbard <jhubbard@nvidia.com> Cc: Ira Weiny <ira.weiny@intel.com> Cc: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: John Hubbard <jhubbard@nvidia.com> Signed-off-by: Souptick Joarder <jrdr.linux@gmail.com> Link: https://lore.kernel.org/r/1600570295-29546-1-git-send-email-jrdr.linux@gmail.comSigned-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Wang ShaoBo authored
Make use of devm_platform_ioremap_resource() provided by driver core platform instead of duplicated analogue. Acked-by: Arnd Bergmann <arn@arndb.de> Signed-off-by: Wang ShaoBo <bobo.shaobowang@huawei.com> Link: https://lore.kernel.org/r/20200918083634.33124-1-bobo.shaobowang@huawei.comSigned-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Greg Kroah-Hartman authored
Merge tag 'misc-habanalabs-next-2020-09-22' of git://people.freedesktop.org/~gabbayo/linux into char-misc-next Oded writes: This tag contains the following changes for kernel 5.10-rc1: - Stop using the DRM's dma-fence module and instead use kernel completions. - Support PCIe AER - Use dma_mmap_coherent for memory allocated using dma_alloc_coherent - Use smallest possible alignment when allocating virtual addresses in our MMU driver. - Refactor MMU driver code to be device-oriented - Allow user to check CS status without any sleep - Add an option to map a Command Buffer to the Device's MMU - Expose sync manager resource allocation to user through INFO IOCTL - Convert code to use standard BIT(), GENMASK() and FIELD_PREP() - Many small fixes (casting, better error messages, remove unused defines, h/w configuration fixes, etc.) * tag 'misc-habanalabs-next-2020-09-22' of git://people.freedesktop.org/~gabbayo/linux: (46 commits) habanalabs: update scratchpad register map habanalabs: add indication of security-enabled F/W habanalabs/gaudi: fix DMA completions max outstanding to 15 habanalabs/gaudi: remove axi drain support habanalabs: update firmware interface file habanalabs: Add an option to map CB to device MMU habanalabs: Save context in a command buffer object habanalabs: no need for DMA_SHARED_BUFFER habanalabs: allow to wait on CS without sleep habanalabs/gaudi: increase timeout for boot fit load habanalabs: add debugfs support for MMU with 6 HOPs habanalabs: add num_hops to hl_mmu_properties habanalabs: refactor MMU as device-oriented habanalabs: rename mmu.c to mmu_v1.c habanalabs: use smallest possible alignment for virtual addresses habanalabs: check flag before reset because of f/w event habanalabs: increase PQ COMP_OFFSET by one nibble habanalabs: Fix alignment issue in cpucp_info structure habanalabs: remove unused define habanalabs: remove unused ASIC function pointer ...
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Oded Gabbay authored
Our firmware use some scratchpad registers in the device for different roles. Update the file to the latest version of the firmware code. Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Oded Gabbay authored
Future F/W versions will have enhanced security measures and the driver won't be able to do certain configurations that it always did and those configurations will be done by the firmware. We use the firmware's preboot version to determine whether security measures are enabled or not. Because we need this very early in our code, the read of the preboot version is moved to the earliest possible place, right after the device's PCI initialization. Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Oded Gabbay authored
This is a workaround for H/W bug H3-2116, where if there are more than 16 outstanding completions in the DMA transpose engine, there can be a deadlock in the engine. Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Oded Gabbay authored
AXI drain is broken in GAUDI so remove support for enabling it. Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Oded Gabbay authored
Add new packet to fetch PLL information from firmware. This will be needed in the future when the driver won't be able to access the PLL registers directly Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Tomer Tayar authored
There are cases in which the device should access the host memory of a CB through the device MMU, and thus this memory should be mapped. The patch adds a flag to the CB IOCTL, in which a user can ask the driver to perform the mapping when creating a CB. The mapping is allowed only if a dedicated VA range was allocated for the specific ASIC. Signed-off-by: Tomer Tayar <ttayar@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Tomer Tayar authored
Future changes require using a context while handling a command buffer, and thus need to save the context in the command buffer object. Signed-off-by: Tomer Tayar <ttayar@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Oded Gabbay authored
Now that the driver no longer uses dma_buf, we can remove the select of DMA_SHARED_BUFFER from kconfig. Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Oded Gabbay authored
The user sometimes wants to check if a CS has completed to clean resources. In that case, the user doesn't want to sleep but just to check if the CS has finished and continue with his code. Add a new definition to the API of the wait on CS. The new definition says that if the timeout is 0, the driver won't sleep at all but return immediately after checking if the CS has finished. Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Oded Gabbay authored
The firmware running in the boot stage takes more time to execute due to increased security mechanisms. Therefore, we need to increase the timeout we wait for the boot fit to finish loading. Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Moti Haimovski authored
This commit modify the existing debugfs code to support future devices that have a 6 HOPs MMU implementation instead of 5 HOPs implementation. Signed-off-by: Moti Haimovski <mhaimovski@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Moti Haimovski authored
This commit adds the number of HOPs supported by the device to the device MMU properties. Signed-off-by: Moti Haimovski <mhaimovski@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Moti Haimovski authored
As preparation to MMU v2, rework MMU to be device oriented instantiated according to the device in hand. Signed-off-by: Moti Haimovski <mhaimovski@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Moti Haimovski authored
In the future we will have MMU v2 code, so we need to prepare the driver for it. The first step is to rename the current MMU file to mmu_v1.c. Signed-off-by: Moti Haimovski <mhaimovski@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Omer Shpigelman authored
Change the acquiring of a device virtual address for mapping by using the smallest possible alignment, rather than the biggest, depending on the page size used by the user for allocating the memory. This will lower the virtual space memory consumption. Signed-off-by: Omer Shpigelman <oshpigelman@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Oded Gabbay authored
For consistency with GAUDI code, add check of the relevant flag in the device structure before resetting the GOYA device in case of firmware event. Reviewed-by: Tomer Tayar <ttayar@habana.ai> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Oded Gabbay authored
For future ASICs, we increase this field by one nibble. This field was not used by the current ASICs so this change doesn't break anything. Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Ofir Bitton authored
Because the device CPU compiler aligns structures to 8 bytes, struct cpucp_info has an alignment issue as some parts in the structure are not aligned to 8 bytes. It is preferred that we explicitly insert placeholders inside the structure to avoid confusion in order to validate this scenario, we printed both pointers: __u8 cpucp_version[VERSION_MAX_LEN]; (0xffff899c67ed4cbc) __le64 dram_size; (0xffff899c67ed4d40) we see difference of 132 bytes although the first array is only 128 bytes long, Meaning compiler added a 4 byte padding. Signed-off-by: Ofir Bitton <obitton@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Oded Gabbay authored
Cleanup the code. Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Oded Gabbay authored
Old function pointer that was left when the call to this function pointer was removed. Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Oded Gabbay authored
There were a couple of comments where the name ArmCP was still used. Rename it to CPU-CP. In addition, rename ArmCP or ARM in log messages to "device CPU". Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Oded Gabbay authored
There is a case where the user reaches the maximum number of CS in-flight. In that case, the driver rejects the new CS of the user with EAGAIN. Count that event so the user can query the driver later to see if it happened. Reviewed-by: Tomer Tayar <ttayar@habana.ai> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Hillf Danton authored
Add dma_mmap_coherent() for goya and gaudi to match their use of dma_alloc_coherent(), see the Link tag for why. Link: https://lore.kernel.org/lkml/20200609091727.GA23814@lst.de/ Cc: Christoph Hellwig <hch@lst.de> Cc: Zhang Li <li.zhang@bitmain.com> Cc: Ding Z Nan <oshack@hotmail.com> Signed-off-by: Hillf Danton <hdanton@sina.com> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Oded Gabbay authored
The driver use vm_pgoff to hold the CB idr handle. Before we actually call the mapping function, we need to clear the handle so there won't be any garbage left in vm_pgoff. Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Oded Gabbay authored
Arrange the hl_mmap code to be more structured and expandable for the future. Add better defines that describe our usage of the vm_pgoff. Note that I shamelessly took the code and defines from the amdkfd driver (my previous driver). Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Oded Gabbay authored
When shifting a boolean variable by more than 31 bits and putting the result into a u64 variable, we need to cast the boolean into unsigned 64 bits to prevent possible overflow. Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Oded Gabbay authored
ArmCP mandates that the device CPU is always an ARM processor, which might be wrong in the future. Most of this change is an internal renaming of variables, functions and defines but there are two entries in sysfs which have armcp in their names. Add identical cpucp entries but don't remove yet the armcp entries. Those will be deprecated next year. Add the documentation about it in sysfs documentation. Signed-off-by: Moti Haimovski <mhaimovski@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Oded Gabbay authored
Add define for the 2 MME slave engines. Reviewed-by: Tomer Tayar <ttayar@habana.ai> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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farah kassabri authored
Add driver implementation for reading the total energy consumption from the device ARM FW. Signed-off-by: farah kassabri <fkassabri@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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Tomer Tayar authored
Include linux/bitfield.h only in habanalabs.h, instead of in each and every file that needs it, as habanalabs.h is already included by all. Signed-off-by: Tomer Tayar <ttayar@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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