- 27 Jan, 2017 40 commits
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Christian König authored
They are 64bit not 32 for a while now. Signed-off-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
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Christian König authored
We don't need to use the PCI BAR on APUs. This allows us to access the full VRAM directly without being limited by the BAR size. v2: squash in 64bit shift fix Signed-off-by:
Michel Dänzer <michel.daenzer@amd.com> Signed-off-by:
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Christian König authored
We don't need to use the PCI BAR on APUs. This allows us to access the full VRAM directly without being limited by the BAR size. v2: squash in 64bit shift fix Signed-off-by:
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Rex Zhu authored
Return early if it's disabled. Signed-off-by:
Rex Zhu <Rex.Zhu@amd.com> Reviewed-by:
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Rex Zhu authored
1. current_ps/request_ps not update. 2. compare crrent_ps and request_ps, if same, don't re-set power state. Signed-off-by:
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Rex Zhu authored
Signed-off-by:
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Alex Deucher authored
The vfct table can contain multiple vbios images if the platform contains multiple GPUs. Noticed by netkas on phoronix forums. This patch fixes those platforms. Signed-off-by: -
Alex Deucher authored
The vfct table can contain multiple vbios images if the platform contains multiple GPUs. Noticed by netkas on phoronix forums. This patch fixes those platforms. Signed-off-by: -
Alex Deucher authored
Move these to the amdgpu directory to match what we do for other asics. Acked-by:
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Alex Deucher authored
All of these are available elsewhere. Acked-by:
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Alex Deucher authored
No longer necessary with the new 58 mc ucode. bug: https://bugs.freedesktop.org/show_bug.cgi?id=76490Reviewed-by:
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Alex Deucher authored
No longer necessary with the new 58 mc ucode. Reviewed-by:
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Arvind Yadav authored
Here, If ioremap_nocache will fail. It will return NULL. Kernel can run into a NULL-pointer dereference. This error check will avoid NULL pointer dereference. Signed-off-by:
Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by:
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Arvind Yadav authored
Here, If ioremap_nocache will fail. It will return NULL. Kernel can run into a NULL-pointer dereference. This error check will avoid NULL pointer dereference. Reviewed-by:
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Yintian Tao authored
In the case of pass-through, amdgpu.ko may be included into a image with the hard code ID therefore loading driver with specified virtual display ID will lose efficacy when the BDF of GPU modifies.So add the new ID string "all" for it as same as vf case what does. Reviewed-by:
Yintian Tao <yttao@amd.com> Signed-off-by:
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Junwei Zhang authored
Signed-off-by:
Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by:
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Nils Holland authored
Add the bo creation changes that have been done to the radeon driver in recent times, e.g. disable GTT WC on 32 bit because it is broken there, and also disable it generally (and print a warning message) when CONFIG_X86_PAT is not set. v2: agd: fix warning in defined(CONFIG_X86) && !defined(CONFIG_X86_PAT) case Reviewed-by:Nils Holland <nholland@tisys.org> Signed-off-by:
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Nicolas Iooss authored
In smu7_clockpowergating.h, the #ifndef statement which prevents multiple inclusions of the header file uses _SMU7_CLOCK_POWER_GATING_H_ but the following #define statement uses _SMU7_CLOCK__POWER_GATING_H_. Signed-off-by:
Nicolas Iooss <nicolas.iooss_linux@m4x.org> Signed-off-by:
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Christian König authored
Without the custom LRU management the callback is not used any more. agd: fix trivial warning Reviewed-by:
Sinclair Yeh <syeh@vmware.com> Signed-off-by:
Roger.He <Hongbo.He@amd.com> Signed-off-by:
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Christian König authored
The additional housekeeping had too much CPU overhead, let's use the BO priorities instead. agd: also revert hibmc changes Reviewed-by:
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Christian König authored
Give kernel allocations a higher priority cause it is often more work to swap them back in. Signed-off-by:
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Christian König authored
Keeping groups of BOs on the LRU is to time consuming on command submission. Instead use the newly added BO priority to give a certain eviction order. v2: agd: trivial warning fix Signed-off-by:
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Christian König authored
This way the driver can specify a priority for a BO which has the effect that a BO is only evicted when all other BOs with a lower priority are evicted first. Reviewed-by:
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Christian König authored
Not allowing errors here is completely pointless and actually dangerous cause trying to continue on an error can cause an endless loop. Reviewed-by:
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Xiangliang Yu authored
For virt, freed mailbox irq should be handled in hw fini, not hw init. Correct it. Signed-off-by:
Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by:
Monk Liu <Monk.Liu@amd.com> Reviewed-by:
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Xiangliang Yu authored
Reboot process will call HW fini functions of IP blocks. For virt, need to send event three before hw fini and send event four after hw fini. Signed-off-by:
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Tom St Denis authored
So we can determine which device the entry is before connecting a display. Signed-off-by:
Tom St Denis <tom.stdenis@amd.com> Reviewed-by:
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Monk Liu authored
for non-VM submit which is from kernel side, no need to switch buffer at all. Signed-off-by:
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Monk Liu authored
SR-IOV requires the preamble. Signed-off-by:
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Monk Liu authored
no need to set it per ib_schedule(), hw won't override this polling address. Signed-off-by:
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Monk Liu authored
to support SRIOV preemption. v2: fix emit_frame_size Signed-off-by:
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Monk Liu authored
To determine whether the context uses GPUVM or not. Signed-off-by:
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Monk Liu authored
those package need to insert into ring buffer for SRIOV case. they are used to let CP do preemption. Signed-off-by:
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Monk Liu authored
Write multiple dwords to the ring. Signed-off-by:
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Monk Liu authored
META-DATA is used in GFX cmd submit, we have two format suit for META-DATA-init, one is legacy and another is for chained-ib preempt, which is used in vulkan UMD. v2: drop use CP version number to judge if chain-ib supports or not, we wait for it mature Signed-off-by:
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Rex Zhu authored
Fix up the powergating logic. Signed-off-by:
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Nils Wallménius authored
The scratch regs are sequential so there's no need to keep them in an array, we can just return the index of the first free register + the base register. Also change the array of bools for keeping track of the free regs to a bitfield. Reviewed-by:
Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by:
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Andrey Grodzovsky authored
Make pflip atomic friendly. Split the fuinction into whatever can fail part and the actual flip submit part. Call the pre-submit function before atomic states are swapped so in case of error we can fail the IOCTL. v2: Update due to target_vblank code change. Fix identetation. Change return type for amdgpu_crtc_submit_flip to void v3: agd: fix formatting Signed-off-by:
Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by Harry Wentland <harry.wentland@amd.com> Signed-off-by:
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Andrey Grodzovsky authored
Switching to -ENOMEM resolves a hang in case the driver uses this function in atomic code path. v2: Update commit message. v3: Remove forcing -EINVAL in case of amdgpu_bo_pin fail since there is no apparent reason for not just passing through the the return value. Signed-off-by:
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Julia Lawall authored
Use BUG_ON instead of a if condition followed by BUG. Generated by: scripts/coccinelle/misc/bugon.cocci Reviewed-by:
Julia Lawall <julia.lawall@lip6.fr> Signed-off-by:
Fengguang Wu <fengguang.wu@intel.com> Signed-off-by:
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