1. 05 May, 2014 9 commits
    • David S. Miller's avatar
      Merge branch 'for-davem' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next · 2ad06496
      David S. Miller authored
      John W. Linville says:
      
      ====================
      pull request: wireless-next 2014-05-02
      
      Please pull this batch of updates intended for the 3.16 stream...
      
      For the mac80211 bits, Johannes says:
      
      "In this round we have a large number of small features and
      improvements from people too numerous to list here. The only really
      bit thing is Michał and Luca's CSA work (including changing how
      interface combination verification is done)."
      
      For the Bluetooth bits, Gustavo says:
      
      "Here goes some patches for the -next release. There is nothing
      really special for this pull request, just a bunch of refactors,
      fixes and clean ups."
      
      For the ath10k/ath6kl bits, Kalle says:
      
      "For ath6kl Kalle fixed a bunch of checkpatch warnings.
      
      In ath10k we had more changes, major ones being:
      
      * fix memory allocation failures after a firmware crash (Michal)
      
      * some rework of DFS configuration to enable it correctly in all cases
        (Michal)
      
      * add a new firmware crash option to make it possible to crash 10.1
        firmware for testing purposes (Marek P)
      
      * fix RTS/CTS protection in certain cases (Marek K)
      
      * fix wrong RSSI and rate reporting in some cases (Janusz)
      
      * fix firmware stats reporting (Chun, Ben & Bartosz)"
      
      For the iwlwifi bits, Emmanuel says:
      
      "I have here a bunch of unrelated things. I disabled support for
      -7.ucode which means that I can removed a lot of code. Eliad has
      a brand new feature: we reduce the Tx power when the link allows -
      this reduces our power consumption. The regular changes in power and
      scan area. One interesting thing though is the patches from Johannes,
      we have now GRO which allows to increase our throughput in TCP Rx. The
      main advantage is that it reduces the number of TCP Acks - these TCP
      Acks are completely useless when we are using A-MPDU since the first
      packet of the A-MPDU generates a TCP Ack which is made obsolete by
      the next packets."
      
      Along with that, there are a variety of updates to b43, mwifiex,
      rtl8180 and wil6210 drivers and a handful of other updates here
      and there.
      
      Please let me know if there are problems!
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      2ad06496
    • David S. Miller's avatar
      Merge branch 'am437x' · 05f46409
      David S. Miller authored
      George Cherian says:
      
      ====================
      The series adds CPTS support for AM4372.
      
      Patch 1 - DT changes w.r.t clock changes for AM33xx.
      Patch 2 - CPTS clock name harcoding in the driver is removed.
      	  Easier to pass the clock name from dt rather than hardcoding in driver.
      	  Also in prepration for DRA7x CPTS support.
      Patch 3 - Enable the CPTS support for both DRA7x and AM4372 in the driver.
      Patch 4 - Enable the Annexe F for L2 PTP for AM437x and DRA7x.
      Patch 5 - Change the default clocksource to dpll_core_m5
      Patch 6 - DT changes for AM4372.
      
      v1 -> v2
      	Patch 1 and 2 Re-ordering.
      	Seperate TS_BITS define for Hw version V2 and V3
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      05f46409
    • George Cherian's avatar
      ARM: dts: am4372: Add clock names for cpsw and cpts · de21b26e
      George Cherian authored
      Add CPSW fck and CPTS clock and clock names for AM4372
      Signed-off-by: default avatarGeorge Cherian <george.cherian@ti.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      de21b26e
    • George Cherian's avatar
      ARM: AM43xx: clk: Change the cpts ref clock source to dpll_core_m5 clk · f9786f41
      George Cherian authored
      cpsw_cpts_rft_clk has got the choice of 3 clocksources
       -dpll_core_m4_ck
       -dpll_core_m5_ck
       -dpll_disp_m2_ck
      
      By default dpll_core_m4_ck is selected, witn this as clock
      source the CPTS doesnot work properly. It gives clockcheck errors
      while running PTP.
      
       clockcheck: clock jumped backward or running slower than expected!
      
      By selecting dpll_core_m5_ck as the clocksource fixes this issue.
      In AM335x dpll_core_m5_ck is the default clocksource.
      Signed-off-by: default avatarGeorge Cherian <george.cherian@ti.com>
      Acked-by: default avatarTero Kristo <t-kristo@ti.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      f9786f41
    • George Cherian's avatar
      drivers: net: cpsw: Enable Annexe F Time sync · 09c55372
      George Cherian authored
      Enable the Annex F Time Sync explicitly for DRA7x and AM4372.
      With this enabled the L2 PTP is working.
      
      while at that rename TS_BIT8 to TS_TTL_NONZERO
      Signed-off-by: default avatarGeorge Cherian <george.cherian@ti.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      09c55372
    • George Cherian's avatar
      drivers: net: cpsw: Enable CPTS for DRA7xx and AM4372 · f7d403cb
      George Cherian authored
      Enable cpts hardware time stamping for Dra7xx and AM4372.
      This enables PTPv2 for DRA7xx and AM4372.
      Signed-off-by: default avatarGeorge Cherian <george.cherian@ti.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      f7d403cb
    • George Cherian's avatar
      drivers: net: cpts: Remove hardcoded clock name for CPTS · d0415e7c
      George Cherian authored
      CPTS refclk name is hardcoded, which makes it fail in case of DRA7x
      Remove the hardcoded clock name for CPTS refclk and get the same from DT.
      Signed-off-by: default avatarGeorge Cherian <george.cherian@ti.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      d0415e7c
    • George Cherian's avatar
      ARM: dts: am33xx: Add clock names for cpsw and cpts · 0987a6ef
      George Cherian authored
      Add CPSW fck and CPTS clock and clock names
      Signed-off-by: default avatarGeorge Cherian <george.cherian@ti.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      0987a6ef
    • Roopa Prabhu's avatar
      unregister_netdevice : move RTM_DELLINK to until after ndo_uninit · 56bfa7ee
      Roopa Prabhu authored
      This patch fixes ordering of rtnl notifications during unregister_netdevice
      by moving RTM_DELLINK notification to until after ndo_uninit.
      
      The problem was seen with unregistering bond netdevices.
      
      bond ndo_uninit callback generates a few RTM_NEWLINK notifications for
      NETDEV_CHANGEADDR and NETDEV_FEAT_CHANGE. This is seen mostly when the
      bond is deleted with slaves still enslaved to the bond.
      
      During unregister netdevice (rollback_registered_many to be specific)
      bond ndo_uninit is called after RTM_DELLINK notification goes out.
      This results in userspace seeing RTM_DELLINK followed by a couple of
      RTM_NEWLINK's.
      
      In userspace problem was seen with libnl. libnl cache deletes the bond
      when it sees RTM_DELLINK and re-adds the bond with the following
      RTM_NEWLINK. Resulting in a stale bond entry in libnl cache when the kernel
      has already deleted the bond.
      
      This patch has been tested for bond, bridges and vlan devices.
      Signed-off-by: default avatarRoopa Prabhu <roopa@cumulusnetworks.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      56bfa7ee
  2. 04 May, 2014 5 commits
  3. 03 May, 2014 1 commit
  4. 02 May, 2014 9 commits
  5. 30 Apr, 2014 16 commits