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  1. 01 May, 2016 24 commits
  3. 27 Apr, 2016 1 commit
  5. 26 Apr, 2016 6 commits
    • Thiago Jung Bauermann's avatar
      ftrace: Match dot symbols when searching functions on ppc64 · 7132e2d6
      Thiago Jung Bauermann authored 
      In the ppc64 big endian ABI, function symbols point to function
descriptors. The symbols which point to the function entry points
have a dot in front of the function name. Consequently, when the
ftrace filter mechanism searches for the symbol corresponding to
an entry point address, it gets the dot symbol.

As a result, ftrace filter users have to be aware of this ABI detail on
ppc64 and prepend a dot to the function name when setting the filter.

The perf probe command insulates the user from this by ignoring the dot
in front of the symbol name when matching function names to symbols,
but the sysfs interface does not. This patch makes the ftrace filter
mechanism do the same when searching symbols.

Fixes the following failure in ftracetest's kprobe_ftrace.tc:

  .../kprobe_ftrace.tc: line 9: echo: write error: Invalid argument

That failure is on this line of kprobe_ftrace.tc:

  echo _do_fork > set_ftrace_filter

This is because there's no _do_fork entry in the functions list:

  # cat available_filter_functions | grep _do_fork
  ._do_fork

This change introduces no regressions on the perf and ftracetest
testsuite results.

Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: default avatarThiago Jung Bauermann <bauerman@linux.vnet.ibm.com>
Acked-by: default avatarSteven Rostedt <rostedt@goodmis.org>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      7132e2d6
    • Daniel Axtens's avatar
      powerpc: rework sparse for lib/xor_vmx.c · 8fe08885
      Daniel Axtens authored 
      Sparse doesn't seem to be passing -maltivec around properly, leading
to lots of errors:

.../include/altivec.h:34:2: error: Use the "-maltivec" flag to enable PowerPC AltiVec support
arch/powerpc/lib/xor_vmx.c:27:16: error: Expected ; at end of declaration
arch/powerpc/lib/xor_vmx.c:27:16: error: got signed
arch/powerpc/lib/xor_vmx.c:60:9: error: No right hand side of '*'-expression
arch/powerpc/lib/xor_vmx.c:60:9: error: Expected ; at end of statement
arch/powerpc/lib/xor_vmx.c:60:9: error: got v1_in
...
arch/powerpc/lib/xor_vmx.c:87:9: error: too many errors

Only include the altivec.h header for non-__CHECKER__ builds.
For builds with __CHECKER__, make up some stubs instead, as
suggested by Balbir. (The vector size of 16 is arbitrary.)
Suggested-by: default avatarBalbir Singh <bsingharora@gmail.com>
Signed-off-by: default avatarDaniel Axtens <dja@axtens.net>
Tested-by: default avatarBalbir Singh <bsingharora@gmail.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      8fe08885
    • Chris Smart's avatar
      powerpc: Add support for userspace P9 copy paste · 8a649045
      Chris Smart authored 
      The copy paste facility introduced in POWER9 provides an optimised
mechanism for a userspace application to copy a cacheline. This is
provided by a pair of instructions, copy and paste, while a third,
cp_abort (copy paste abort), provides a clean up of the state in case of
a failure.

The copy instruction will read a 128 byte cacheline and store it in an
internal buffer. The subsequent paste instruction will store this
internal buffer to memory and set a CR field if the paste succeeds.

Since the state of the copy paste buffer is internal (and not
architecturally visible), in the unlikely event of a context switch, the
state cannot be stored and the paste should therefore fail.

The cp_abort instruction exists to fail and clean up any such
interrupted copy paste sequence and is to be called by the kernel as
part of the context switch. Doing so prevents data from a preceding copy
in one process leaking into the paste of another.

This code enables use of the cp_abort instruction if a supported
processor is detected.

NOTE: this is for userspace only, not in kernel, and does not deal
with KVM guests.

Patch created with much assistance from Michael Neuling
<mikey@neuling.org>
Signed-off-by: default avatarChris Smart <chris@distroguy.com>
Reviewed-by: default avatarCyril Bur <cyrilbur@gmail.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      8a649045
    • Andrew Donnellan's avatar
      powerpc/mpic: handle subsys_system_register() failure · 4ad5e883
      Andrew Donnellan authored 
      mpic_init_sys() currently doesn't check whether
subsys_system_register() succeeded or not. Check the return code of
subsys_system_register() and clean up if there's an error.
Signed-off-by: default avatarAndrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      4ad5e883
    • Andrew Donnellan's avatar
      powerpc/eeh: fix misleading indentation · 2d521784
      Andrew Donnellan authored 
      Found by smatch.
Signed-off-by: default avatarAndrew Donnellan <andrew.donnellan@au1.ibm.com>
Acked-by: default avatarRussell Currey <ruscur@russell.cc>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      2d521784
    • Aneesh Kumar K.V's avatar
      cxl: Fix DAR check & use REGION_ID instead of opencoding · 3b1dbfa1
      Aneesh Kumar K.V authored 
      The current code will set _PAGE_USER to the access flags for any
fault address, because the ~ operation will be true for all address we
take a fault on. But setting _PAGE_USER also means that the fault will
be handled only if the page table have _PAGE_USER set. Hence there is
no security hole with the current code.

Now if it is an user space access, then the change in this patch really
don't have an impact because we have (!ctx->kernel) set true
and we take the if condition true.

Now kernel context created fault on an address in the kernel range
will result in a fault loop because we will not insert the
hash pte due to access and pte permission mismatch. This patch fix
the above issue.

Fixes: f204e0b8 ("cxl: Driver code for powernv PCIe based cards for userspace access")
Reviewed-by: default avatarAndrew Donnellan <andrew.donnellan@au1.ibm.com>
Acked-by: default avatarIan Munsie <imunsie@au1.ibm.com>
Signed-off-by: default avatarAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      3b1dbfa1
  7. 22 Apr, 2016 2 commits
  9. 21 Apr, 2016 6 commits
    • Madhavan Srinivasan's avatar
      tool/perf: Add sample_reg_mask to include all perf_regs · bb62bad6
      Madhavan Srinivasan authored 
      Add sample_reg_mask array with pt_regs registers.
This is needed for printing supported regs ( -I? option).
Signed-off-by: default avatarMadhavan Srinivasan <maddy@linux.vnet.ibm.com>
Acked-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      bb62bad6
    • Anju T's avatar
      tools/perf: Map the ID values with register names · dc642e83
      Anju T authored 
      Map ID values with corresponding register names. These names are then
displayed when user issues perf record with the -I option
followed by perf report/script with -D option.

To test this patchset, Eg:

  $ perf record -I ls   # record machine state at interrupt
  $ perf script -D      # read the perf.data file

Sample output obtained for this patch / output looks like as follows:

  496768515470 0x1988 [0x188]: PERF_RECORD_SAMPLE(IP, 0x1): 4522/4522:
  0xc0000000001e538c period: 1 addr: 0
  ... intr regs: mask 0x7ffffffffff ABI 64-bit
  .... r0    0xc0000000001e5e34
  .... r1    0xc000000fe733f9a0
  .... r2    0xc000000001523100
  .... r3    0xc000000ffaadeb60
  .... r4    0xc000000003456800
  .... r5    0x73a9b5e000
  .... r6    0x1e000000
  .... r7    0x0
  .... r8    0x0
  .... r9    0x0
  .... r10   0x1
  .... r11   0x0
  .... r12   0x24022822
  .... r13   0xc00000000feec180
  .... r14   0x0
  .... r15   0xc000001e4be18800
  .... r16   0x0
  .... r17   0xc000000ffaac5000
  .... r18   0xc000000fe733f8a0
  .... r19   0xc000000001523100
  .... r20   0xc00000000009fd1c
  .... r21   0xc000000fcaa69000
  .... r22   0xc0000000001e4968
  .... r23   0xc000000001523100
  .... r24   0xc000000fe733f850
  .... r25   0xc000000fcaa69000
  .... r26   0xc000000003b8fcf0
  .... r27   0xfffffffffffffead
  .... r28   0x0
  .... r29   0xc000000fcaa69000
  .... r30   0x1
  .... r31   0x0
  .... nip   0xc0000000001dd320
  .... msr   0x9000000000009032
  .... orig_r3 0xc0000000001e538c
  .... ctr   0xc00000000009d550
  .... link  0xc0000000001e5e34
  .... xer   0x0
  .... ccr   0x84022882
  .... softe 0x0
  .... trap  0xf01
  .... dar   0x0
  .... dsisr 0xf00040060000004
   ... thread: :4522:4522
   ...... dso: /root/.debug/.build-id/b0/ef11b1a1629e62ac9de75199117ee5ef9469e9
             :4522 4522 496.768515: 1 cycles: c0000000001e538c
             .perf_event_context_sched_in (/boot/vmlinux)
Signed-off-by: default avatarAnju T <anju@linux.vnet.ibm.com>
Acked-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      dc642e83
    • Anju T's avatar
      powerpc/perf: Add support for sampling interrupt register state · ed4a4ef8
      Anju T authored 
      The perf infrastructure uses a bit mask to find out valid registers to
display. Define a register mask for supported registers defined in
uapi/asm/perf_regs.h. The bit positions also correspond to register IDs
which is used by perf infrastructure to fetch the register values.
CONFIG_HAVE_PERF_REGS enables sampling of the interrupted machine state.
Signed-off-by: default avatarAnju T <anju@linux.vnet.ibm.com>
[mpe: Add license, use CONFIG_PPC64, fix 32-bit build]
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      ed4a4ef8
    • Anju T's avatar
      powerpc/perf: Assign an id to each powerpc register · 1bfadabf
      Anju T authored 
      The enum definition assigns an 'id' to each register in "struct pt_regs"
of arch/powerpc. The order of these values in the enum definition are
based on the order of members in pt_regs.
Signed-off-by: default avatarAnju T <anju@linux.vnet.ibm.com>
[mpe: Rename LNK to LINK, use _UAPI_ASM for include guards]
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      1bfadabf
    • Hari Bathini's avatar
      powerpc/book3s64: Remove __end_handlers marker · 057b6d7e
      Hari Bathini authored 
      The __end_handlers marker was intended to mark down upto code that gets
called from exception prologs. But that hasn't kept pace with code
changes. Case in point, slb_miss_realmode being called from exception
prolog code but isn't below __end_handlers marker. So, __end_handlers
marker is as good as a comment but could be misleading at times if it
isn't in sync with the code, as is the case now. So, let us avoid this
confusion by having a better comment and removing __end_handlers marker
altogether.
Signed-off-by: default avatarHari Bathini <hbathini@linux.vnet.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      057b6d7e
    • Hari Bathini's avatar
      powerpc/book3s64: Fix branching to OOL handlers in relocatable kernel · 8ed8ab40
      Hari Bathini authored 
      Some of the interrupt vectors on 64-bit POWER server processors are only
32 bytes long (8 instructions), which is not enough for the full
first-level interrupt handler. For these we need to branch to an
out-of-line (OOL) handler. But when we are running a relocatable kernel,
interrupt vectors till __end_interrupts marker are copied down to real
address 0x100. So, branching to labels (ie. OOL handlers) outside this
section must be handled differently (see LOAD_HANDLER()), considering
relocatable kernel, which would need at least 4 instructions.

However, branching from interrupt vector means that we corrupt the
CFAR (come-from address register) on POWER7 and later processors as
mentioned in commit 1707dd16. So, EXCEPTION_PROLOG_0 (6 instructions)
that contains the part up to the point where the CFAR is saved in the
PACA should be part of the short interrupt vectors before we branch out
to OOL handlers.

But as mentioned already, there are interrupt vectors on 64-bit POWER
server processors that are only 32 bytes long (like vectors 0x4f00,
0x4f20, etc.), which cannot accomodate the above two cases at the same
time owing to space constraint. Currently, in these interrupt vectors,
we simply branch out to OOL handlers, without using LOAD_HANDLER(),
which leaves us vulnerable when running a relocatable kernel (eg. kdump
case). While this has been the case for sometime now and kdump is used
widely, we were fortunate not to see any problems so far, for three
reasons:

  1. In almost all cases, production kernel (relocatable) is used for
     kdump as well, which would mean that crashed kernel's OOL handler
     would be at the same place where we end up branching to, from short
     interrupt vector of kdump kernel.
  2. Also, OOL handler was unlikely the reason for crash in almost all
     the kdump scenarios, which meant we had a sane OOL handler from
     crashed kernel that we branched to.
  3. On most 64-bit POWER server processors, page size is large enough
     that marking interrupt vector code as executable (see commit
     429d2e83) leads to marking OOL handler code from crashed kernel,
     that sits right below interrupt vector code from kdump kernel, as
     executable as well.

Let us fix this by moving the __end_interrupts marker down past OOL
handlers to make sure that we also copy OOL handlers to real address
0x100 when running a relocatable kernel.

This fix has been tested successfully in kdump scenario, on an LPAR with
4K page size by using different default/production kernel and kdump
kernel.

Also tested by manually corrupting the OOL handlers in the first kernel
and then kdump'ing, and then causing the OOL handlers to fire - mpe.

Fixes: c1fb6816 ("powerpc: Add relocation on exception vector handlers")
Cc: stable@vger.kernel.org
Signed-off-by: default avatarHari Bathini <hbathini@linux.vnet.ibm.com>
Signed-off-by: default avatarMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      8ed8ab40
  11. 18 Apr, 2016 1 commit
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