1. 17 Dec, 2011 4 commits
    • Santosh Shilimkar's avatar
      ARM: OMAP4: clock: Add CPU local timer clock node · 30c95692
      Santosh Shilimkar authored
      Local timer clock is sourced from the CPU clock and hence changes
      along with CPU clock. These per CPU local timers are used as
      clock-events, so they need to be reconfigured on CPU frequency
      change as part of CPUfreq governor.
      
      Newly introduced clockevents_reconfigure() needs to know the
      twd clock-rate. Provide a clock-node to make clk_get_rate() work
      for TWD.
      Signed-off-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Kevin Hilman <khilman@ti.com>
      [paul@pwsan.com: renamed clock node to 'mpu_periphclk' to indicate that this
       is the Cortex-A9 MPCore subsystem clock PERIPHCLK (DDI 0407G); moved
       clock and clkdev entries to match the autogenerated script output]
      Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      30c95692
    • Benoit Cousson's avatar
      ARM: OMAP4: hwmod: Don't wait for the idle status if modulemode is not supported · bfc141e3
      Benoit Cousson authored
      If the module does not have any modulemode, the _disable_module function
      will do nothing. There is then no point waiting for a idle status change.
      
      It will remove the following warnings.
      
      [    0.331848] omap_hwmod: dmm: _wait_target_disable failed
      [    0.339935] omap_hwmod: emif_fw: _wait_target_disable failed
      [    0.348358] omap_hwmod: l3_main_1: _wait_target_disable failed
      [    0.356964] omap_hwmod: l3_main_2: _wait_target_disable failed
      [    0.365600] omap_hwmod: l4_abe: _wait_target_disable failed
      [    0.373931] omap_hwmod: l4_cfg: _wait_target_disable failed
      [    0.382263] omap_hwmod: l4_per: _wait_target_disable failed
      [    0.391113] omap_hwmod: l4_wkup: _wait_target_disable failed
      [    0.399536] omap_hwmod: dma_system: _wait_target_disable failed
      [    0.408325] omap_hwmod: dss_core: _wait_target_disable failed
      [    0.416839] omap_hwmod: dss_dispc: _wait_target_disable failed
      [    0.425445] omap_hwmod: dss_dsi1: _wait_target_disable failed
      [    0.433990] omap_hwmod: dss_dsi2: _wait_target_disable failed
      [    0.442504] omap_hwmod: dss_hdmi: _wait_target_disable failed
      [    0.451019] omap_hwmod: dss_rfbi: _wait_target_disable failed
      [    0.459564] omap_hwmod: dss_venc: _wait_target_disable failed
      [    0.489471] omap_hwmod: mailbox: _wait_target_disable failed
      [    0.505920] omap_hwmod: spinlock: _wait_target_disable failed
      
      Note: For such module, the state is managed automatically by HW according
      to clock domain transition. It is then not possible to wait for idle even
      later in the _idle function since the status will change at clock domain
      boundary.
      Signed-off-by: default avatarBenoit Cousson <b-cousson@ti.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      [paul@pwsan.com: renamed fns to indicate that they are OMAP4-only; moved
       _wait_target_disable() into _disable_module(), removing duplicate code]
      Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      bfc141e3
    • Paul Walmsley's avatar
      ARM: OMAP: AM3517/3505: fix crash on boot due to incorrect voltagedomain data · ddf536d0
      Paul Walmsley authored
      AM3517/3505 chips don't have voltage controller and voltage processor
      IP blocks.  Trying to use OMAP34xx/36xx voltage domain data on these
      chips causes a crash during boot:
      
        omap_vc_init_channel: PMIC info requried to configure vc forvdd_core not populated.Hence cannot initialize vc
        Unable to handle kernel NULL pointer dereference at virtual address 00000025
        pgd = c0004000
        [00000025] *pgd=00000000
        Internal error: Oops: 5 [#1] SMP
        Modules linked in:
        CPU: 0    Tainted: G        W     (3.2.0-rc5-00006-g402ecf4 #304)
        PC is at omap_vp_init+0x5c/0x14c
        LR is at omap_vp_init+0x54/0x14c
      
      Fix this by using very minimal voltage domain definitions for AM3517/3505.
      Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
      Cc: Igor Grinberg <grinberg@compulab.co.il>
      Cc: Kevin Hilman <khilman@ti.com>
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      ddf536d0
    • Tony Lindgren's avatar
  2. 16 Dec, 2011 2 commits
    • Aaro Koskinen's avatar
      ARM: OMAP: hwmod data: fix the panic on Nokia RM-680 during boot · 91a36bdb
      Aaro Koskinen authored
      Booting the Linux kernel on Nokia RM-680 board has been broken since
      2.6.39 due to the following:
      
      [    0.217193] omap_hwmod: timer12: enabling
      [    0.221435] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa304010
      [    0.229431] Internal error: : 1028 [#1] SMP
      [    0.233825] Modules linked in:
      [    0.237060] CPU: 0    Not tainted  (3.2.0-rc4-dirty #46)
      [    0.242645] PC is at _update_sysc_cache+0x2c/0x7c
      [    0.247589] LR is at _enable+0x1b0/0x2d8
      [    0.251708] pc : [<c0026108>]    lr : [<c0026df4>]    psr: 40000013
      [    0.251708] sp : ef831f40  ip : ef82f380  fp : c06ac0c0
      [    0.263702] r10: 00000000  r9 : c05dfb2c  r8 : ef830000
      [    0.269165] r7 : c0027494  r6 : 00000000  r5 : 00000000  r4 : c06608b0
      [    0.276000] r3 : fa304000  r2 : 00000010  r1 : c0661e28  r0 : c06608b0
      [    0.282806] Flags: nZcv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
      [    0.290405] Control: 10c5387d  Table: 80004019  DAC: 00000017
      [    0.296417] Process swapper (pid: 1, stack limit = 0xef8302f8)
      [    0.302520] Stack: (0xef831f40 to 0xef832000)
      [    0.307098] 1f40: c06608b0 c0026df4 c06ad094 c0035120 00000001 c06608b0 00000000 c0027530
      [    0.315612] 1f60: c0027604 ef830000 c05dfb2c c06608b0 c0642ac0 c0025bf0 c0621234 c062120c
      [    0.324127] 1f80: c0621738 00000013 ef830000 c05dfb6c c0621234 c0008688 c062c880 c009eadc
      [    0.332641] 1fa0: 0000005f 00000000 c0621738 35390013 00000000 00000000 00000000 0000019a
      [    0.341156] 1fc0: c0681cf4 c0621234 c062120c c0621738 00000013 00000000 00000000 00000000
      [    0.349670] 1fe0: 00000000 c05d5298 00000000 c05d5200 c0014fa8 c0014fa8 ffff0000 ffff0000
      [    0.358184] [<c0026108>] (_update_sysc_cache+0x2c/0x7c) from [<c0026df4>] (_enable+0x1b0/0x2d8)
      [    0.367248] [<c0026df4>] (_enable+0x1b0/0x2d8) from [<c0027530>] (_setup+0x9c/0x170)
      [    0.375335] [<c0027530>] (_setup+0x9c/0x170) from [<c0025bf0>] (omap_hwmod_for_each+0x38/0x58)
      [    0.384307] [<c0025bf0>] (omap_hwmod_for_each+0x38/0x58) from [<c05dfb6c>] (omap_hwmod_setup_all+0x40/0xa0)
      [    0.394409] [<c05dfb6c>] (omap_hwmod_setup_all+0x40/0xa0) from [<c0008688>] (do_one_initcall+0x34/0x180)
      [    0.404296] [<c0008688>] (do_one_initcall+0x34/0x180) from [<c05d5298>] (kernel_init+0x98/0x144)
      [    0.413452] [<c05d5298>] (kernel_init+0x98/0x144) from [<c0014fa8>] (kernel_thread_exit+0x0/0x8)
      [    0.422576] Code: e3130c01 1590304c 0590304c 119320b2 (07932002)
      [    0.429046] ---[ end trace 1b75b31a2719ed1c ]---
      [    0.433959] Kernel panic - not syncing: Attempted to kill init!
      
      Timer 12 is not necessarily available on non-GP devices (see e.g.
      http://marc.info/?l=linux-omap&m=129433066521102&w=2), so it should be
      registered only on GP OMAPs. With this change it's again possible to
      boot RM-680 into the shell. Tested with 3.2-rc4.
      Signed-off-by: default avatarAaro Koskinen <aaro.koskinen@nokia.com>
      [paul@pwsan.com: changed subject line]
      Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
      91a36bdb
    • Felipe Contreras's avatar
      ARM: OMAP: hwmod data: fix iva and mailbox hwmods for OMAP 3 · 7c17c770
      Felipe Contreras authored
      Seems the commit 7e89098c was overly aggressive in adding iva and mailbox
      hwmods so now they are registered twice.
      
      ------------[ cut here ]------------
      WARNING: at arch/arm/mach-omap2/omap_hwmod.c:1959 omap_hwmod_register+0x104/0x12c()
      omap_hwmod: iva: _register returned -22
      Modules linked in:
      [<c0012aa4>] (unwind_backtrace+0x0/0xec) from [<c002f970>] (warn_slowpath_common+0x4c/0x64)
      [<c002f970>] (warn_slowpath_common+0x4c/0x64) from [<c002fa08>] (warn_slowpath_fmt+0x2c/0x3c)
      [<c002fa08>] (warn_slowpath_fmt+0x2c/0x3c) from [<c02fdb4c>] (omap_hwmod_register+0x104/0x12c)
      [<c02fdb4c>] (omap_hwmod_register+0x104/0x12c) from [<c02fbb44>] (omap3_init_early+0x1c/0x28)
      [<c02fbb44>] (omap3_init_early+0x1c/0x28) from [<c02f9580>] (setup_arch+0x6b8/0x7a4)
      [<c02f9580>] (setup_arch+0x6b8/0x7a4) from [<c02f754c>] (start_kernel+0x6c/0x264)
      [<c02f754c>] (start_kernel+0x6c/0x264) from [<80008040>] (0x80008040)
      ---[ end trace 1b75b31a2719ed1c ]---
      ------------[ cut here ]------------
      WARNING: at arch/arm/mach-omap2/omap_hwmod.c:1959 omap_hwmod_register+0x104/0x12c()
      omap_hwmod: mailbox: _register returned -22
      Modules linked in:
      [<c0012aa4>] (unwind_backtrace+0x0/0xec) from [<c002f970>] (warn_slowpath_common+0x4c/0x64)
      [<c002f970>] (warn_slowpath_common+0x4c/0x64) from [<c002fa08>] (warn_slowpath_fmt+0x2c/0x3c)
      [<c002fa08>] (warn_slowpath_fmt+0x2c/0x3c) from [<c02fdb4c>] (omap_hwmod_register+0x104/0x12c)
      [<c02fdb4c>] (omap_hwmod_register+0x104/0x12c) from [<c02fbb44>] (omap3_init_early+0x1c/0x28)
      [<c02fbb44>] (omap3_init_early+0x1c/0x28) from [<c02f9580>] (setup_arch+0x6b8/0x7a4)
      [<c02f9580>] (setup_arch+0x6b8/0x7a4) from [<c02f754c>] (start_kernel+0x6c/0x264)
      [<c02f754c>] (start_kernel+0x6c/0x264) from [<80008040>] (0x80008040)
      ---[ end trace 1b75b31a2719ed1d ]---
      Signed-off-by: default avatarFelipe Contreras <felipe.contreras@gmail.com>
      Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
      7c17c770
  3. 13 Dec, 2011 1 commit
  4. 12 Dec, 2011 1 commit
  5. 09 Dec, 2011 32 commits