- 27 Dec, 2011 40 commits
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Avi Kivity authored
Intercept RDPMC and forward it to the PMU emulation code. Signed-off-by:
Avi Kivity <avi@redhat.com> Signed-off-by:
Gleb Natapov <gleb@redhat.com> Signed-off-by:
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Avi Kivity authored
Add a helper function that emulates the RDPMC instruction operation. Signed-off-by:
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Gleb Natapov authored
Use perf_events to emulate an architectural PMU, version 2. Based on PMU version 1 emulation by Avi Kivity. [avi: adjust for cpuid.c] [jan: fix anonymous field initialization for older gcc] Signed-off-by:
Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by:
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Avi Kivity authored
Needed to deliver performance monitoring interrupts. Signed-off-by:
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Takuya Yoshikawa authored
Group 9: 0F C7 Rename em_grp9() to em_cmpxchg8b() and register it. Signed-off-by:
Takuya Yoshikawa <yoshikawa.takuya@oss.ntt.co.jp> Signed-off-by:
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Takuya Yoshikawa authored
Group 4: FE Group 5: FF Signed-off-by:
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Takuya Yoshikawa authored
Group 1A: 8F Register em_pop() directly and remove em_grp1a(). Signed-off-by:
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Hamo authored
by checking the return value from kvm_init_debug, we can ensure that the entries under debugfs for KVM have been created correctly. Signed-off-by:
Yang Bai <hamo.by@gmail.com> Signed-off-by:
Marcelo Tosatti <mtosatti@redhat.com>
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Gleb Natapov authored
Drop bsp_vcpu pointer from kvm struct since its only use is incorrect anyway. Signed-off-by:
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Jan Kiszka authored
Move the test for KVM_PIT_FLAGS_HPET_LEGACY into create_pit_timer instead of replicating it on the caller site. Signed-off-by:
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Jan Kiszka authored
Works so far by change, but it is not guaranteed to stay like this. Signed-off-by:
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Avi Kivity authored
PMU virtualization needs to talk to Intel-specific bits of perf; these are only available when CPU_SUP_INTEL=y. Fixes arch/x86/built-in.o: In function `atomic_switch_perf_msrs': vmx.c:(.text+0x6b1d4): undefined reference to `perf_guest_get_msrs' Reported-by:
Ingo Molnar <mingo@elte.hu> Reported-by:
Randy Dunlap <rdunlap@xenotime.net> Signed-off-by:
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Avi Kivity authored
* tip/perf/core: (66 commits) perf, x86: Expose perf capability to other modules perf, x86: Implement arch event mask as quirk x86, perf: Disable non available architectural events jump_label: Provide jump_label_key initializers jump_label, x86: Fix section mismatch perf, core: Rate limit perf_sched_events jump_label patching perf: Fix enable_on_exec for sibling events perf: Remove superfluous arguments perf, x86: Prefer fixed-purpose counters when scheduling perf, x86: Fix event scheduler for constraints with overlapping counters perf, x86: Implement event scheduler helper functions perf: Avoid a useless pmu_disable() in the perf-tick x86/tools: Add decoded instruction dump mode x86: Update instruction decoder to support new AVX formats x86/tools: Fix insn_sanity message outputs x86/tools: Fix instruction decoder message output x86: Fix instruction decoder to handle grouped AVX instructions x86/tools: Fix Makefile to build all test tools perf test: Soft errors shouldn't stop the "Validate PERF_RECORD_" test perf test: Validate PERF_RECORD_ events and perf_sample fields ... Signed-off-by:
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Sasha Levin authored
Switch to using memdup_user when possible. This makes code more smaller and compact, and prevents errors. Signed-off-by:
Sasha Levin <levinsasha928@gmail.com> Signed-off-by:
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Sasha Levin authored
Switch to kmemdup() in two places to shorten the code and avoid possible bugs. Signed-off-by:
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Avi Kivity authored
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Jan Kiszka authored
This was probably copy&pasted from the cr0 case, but it's unneeded here. Signed-off-by:
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Jan Kiszka authored
freed_pages is never evaluated, so remove it as well as the return code kvm_mmu_remove_some_alloc_mmu_pages so far delivered to its only user. Signed-off-by:
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Alex,Shi authored
percpu_xxx funcs are duplicated with this_cpu_xxx funcs, so replace them for further code clean up. And in preempt safe scenario, __this_cpu_xxx funcs has a bit better performance since __this_cpu_xxx has no redundant preempt_disable() Signed-off-by:
Alex Shi <alex.shi@intel.com> Signed-off-by:
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Xiao Guangrong authored
inline audit function and little cleanup Signed-off-by:
Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com> Signed-off-by:
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Xiao Guangrong authored
The unsync code should be stable now, maybe it is the time to remove this parameter to cleanup the code a little bit Signed-off-by:
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Xiao Guangrong authored
Move the mmu code in kvm_arch_vcpu_init() to kvm_mmu_create() Signed-off-by:
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Xiao Guangrong authored
KVM_EXIT_HYPERCALL is not used anymore, so remove the code Signed-off-by:
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Xiao Guangrong authored
The tracepoint is only used to audit mmu code, it should not be exposed to user, let us replace it with jump-label. Signed-off-by:
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Xiao Guangrong authored
Export these two symbols, they will be used by KVM mmu audit Signed-off-by:
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Sasha Levin authored
This patch cleans and simplifies kvm_dev_ioctl_get_supported_cpuid by using a table instead of duplicating code as Avi suggested. This patch also fixes a bug where kvm_dev_ioctl_get_supported_cpuid would return -E2BIG when amount of entries passed was just right. Signed-off-by:
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Liu, Jinsong authored
Intel latest cpu add 6 new features, refer http://software.intel.com/file/36945 The new feature cpuid listed as below: 1. FMA CPUID.EAX=01H:ECX.FMA[bit 12] 2. MOVBE CPUID.EAX=01H:ECX.MOVBE[bit 22] 3. BMI1 CPUID.EAX=07H,ECX=0H:EBX.BMI1[bit 3] 4. AVX2 CPUID.EAX=07H,ECX=0H:EBX.AVX2[bit 5] 5. BMI2 CPUID.EAX=07H,ECX=0H:EBX.BMI2[bit 8] 6. LZCNT CPUID.EAX=80000001H:ECX.LZCNT[bit 5] This patch expose these features to guest. Among them, FMA/MOVBE/LZCNT has already been defined, MOVBE/LZCNT has already been exposed. This patch defines BMI1/AVX2/BMI2, and exposes FMA/BMI1/AVX2/BMI2 to guest. Signed-off-by:
Liu, Jinsong <jinsong.liu@intel.com> Signed-off-by:
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Avi Kivity authored
The cpuid code has grown; put it into a separate file. Signed-off-by: -
Takuya Yoshikawa authored
INSB : 6C INSW/INSD : 6D OUTSB : 6E OUTSW/OUTSD: 6F The I/O port address is read from the DX register when we decode the operand because we see the SrcDX/DstDX flag is set. Signed-off-by:
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Julian Stecklina authored
This fixes byte accesses to IOAPIC_REG_SELECT as mandated by at least the ICH10 and Intel Series 5 chipset specs. It also makes ioapic_mmio_write consistent with ioapic_mmio_read, which also allows byte and word accesses. Signed-off-by:
Julian Stecklina <js@alien8.de> Signed-off-by:
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Xiao Guangrong authored
There is the same struct definition in ia64 and kvm common code: arch/ia64/kvm//kvm-ia64.c: At top level: arch/ia64/kvm//kvm-ia64.c:777:8: error: redefinition of ‘struct kvm_io_range’ include/linux/kvm_host.h:62:8: note: originally defined here So, rename kvm_io_range to kvm_ia64_io_range in ia64 code Signed-off-by:
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Xiao Guangrong authored
The operation of getting dirty log is frequent when framebuffer-based displays are used(for example, Xwindow), so, we introduce a mapping table to speed up id_to_memslot() Signed-off-by:
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Xiao Guangrong authored
Sort memslots base on its size and use line search to find it, so that the larger memslots have better fit The idea is from Avi Signed-off-by:
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Xiao Guangrong authored
Introduce id_to_memslot to get memslot by slot id Signed-off-by:
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Xiao Guangrong authored
Introduce kvm_for_each_memslot to walk all valid memslot Signed-off-by:
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Xiao Guangrong authored
Introduce update_memslots to update slot which will be update to kvm->memslots Signed-off-by:
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Xiao Guangrong authored
Introduce KVM_MEM_SLOTS_NUM macro to instead of KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS Signed-off-by:
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Takuya Yoshikawa authored
BSF: 0F BC BSR: 0F BD Signed-off-by:
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Takuya Yoshikawa authored
CMPXCHG: 0F B0, 0F B1 Signed-off-by:
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Takuya Yoshikawa authored
WRMSR: 0F 30 RDMSR: 0F 32 Signed-off-by:
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