- 15 Jul, 2024 6 commits
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Shenwei Wang authored
The power domain is automatically activated from clk_prepare(). However, on certain platforms like i.MX8QM and i.MX8QXP, the power-on handling invokes sleeping functions, which triggers the 'scheduling while atomic' bug in the context switch path during device probing: BUG: scheduling while atomic: kworker/u13:1/48/0x00000002 Call trace: __schedule_bug+0x54/0x6c __schedule+0x7f0/0xa94 schedule+0x5c/0xc4 schedule_preempt_disabled+0x24/0x40 __mutex_lock.constprop.0+0x2c0/0x540 __mutex_lock_slowpath+0x14/0x20 mutex_lock+0x48/0x54 clk_prepare_lock+0x44/0xa0 clk_prepare+0x20/0x44 imx_irqsteer_resume+0x28/0xe0 pm_generic_runtime_resume+0x2c/0x44 __genpd_runtime_resume+0x30/0x80 genpd_runtime_resume+0xc8/0x2c0 __rpm_callback+0x48/0x1d8 rpm_callback+0x6c/0x78 rpm_resume+0x490/0x6b4 __pm_runtime_resume+0x50/0x94 irq_chip_pm_get+0x2c/0xa0 __irq_do_set_handler+0x178/0x24c irq_set_chained_handler_and_data+0x60/0xa4 mxc_gpio_probe+0x160/0x4b0 Cure this by implementing the irq_bus_lock/sync_unlock() interrupt chip callbacks and handle power management in them as they are invoked from non-atomic context. [ tglx: Rewrote change log, added Fixes tag ] Fixes: 0136afa0 ("irqchip: Add driver for imx-irqsteer controller") Signed-off-by:
Shenwei Wang <shenwei.wang@nxp.com> Signed-off-by:
Thomas Gleixner <tglx@linutronix.de> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20240703163250.47887-1-shenwei.wang@nxp.com
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Geert Uytterhoeven authored
The caller of gic_of_setup_kvm_info() already queried DT for the value of the #redistributor-regions property. So just pass this value, instead of doing the DT look-up again in the callee. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by:
Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/808286a3ac08f60585ae7e2c848e0f9b3cb79cf8.1719912215.git.geert+renesas@glider.be
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Stefan Wahren authored
The BCM2835 ARMCTRL interrupt controller doesn't provide any facility to configure the wakeup sources. That's the reason why the driver lacks the irq_set_wake() callback for the interrupt chip. But this prevent to properly enter power management states like "suspend to idle". Enable the flags IRQCHIP_SKIP_SET_WAKE and IRQCHIP_MASK_ON_SUSPEND so the interrupt suspend logic can handle the chip correctly. Signed-off-by:
Stefan Wahren <wahrenst@gmx.net> Signed-off-by:
Florian Fainelli <florian.fainelli@broadcom.com>
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Marc Zyngier authored
In order to make sure that vpe->col_idx is correctly sampled when a VMAPP command is issued, the vpe_lock must be held for the VPE. This is now possible since the introduction of the per-VM vmapp_lock, which can be taken before vpe_lock in the correct locking order. Signed-off-by:
Nianyao Tang <tangnianyao@huawei.com> Link: https://lore.kernel.org/r/20240705093155.871070-4-maz@kernel.org
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Marc Zyngier authored
vmovp_lock is abused in a number of cases to serialise updates to vlpi_count[] and deal with map/unmap of a VM to ITSs. Instead, provide a per-VM lock and revisit the use of vlpi_count[] so that it is always wrapped in this per-VM vmapp_lock. This reduces the potential contention on a concurrent VMOVP command, and paves the way for subsequent VPE locking that holding vmovp_lock actively prevents due to the lock ordering. Signed-off-by:
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Marc Zyngier authored
There are currently two paths to set the initial affinity of a VPE: - at activation time on GICv4 without the stupid VMOVP list, and on GICv4.1 - at map time for GICv4 with VMOVP list The latter location may end-up modifying the affinity of VPE that is currently running, making the results unpredictible. Instead, unify the two paths, making sure to set the initial affinity only at activation time. Reported-by:
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- 25 Jun, 2024 2 commits
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Thomas Gleixner authored
This reverts commit 7cc4f309. Causes build fails. Reported-by:
Mark Brown <broonie@kernel.org> Reported-by:
kernel test robot <lkp@intel.com> Signed-off-by:
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Thomas Gleixner authored
This reverts commit 760d7e71. This results in build failures and has other issues according to Tianyang. Reported-by:
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- 23 Jun, 2024 18 commits
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Antonio Borneo authored
Drop auto-selecting the driver, so it can be built either as a module or built-in. Signed-off-by:
Antonio Borneo <antonio.borneo@foss.st.com> Signed-off-by:
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Antonio Borneo authored
Drop auto-selecting the driver, so it can be built either as a module or built-in. Signed-off-by:
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Antonio Borneo authored
Allow to build the driver as a module by adding the necessarily hooks in Kconfig and in the driver's code. Since all the probe dependencies linked to this driver have already been fixed, remove the not longer relevant 'arch_initcall'. Signed-off-by:
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Antonio Borneo authored
Rename all the internal symbols accordingly to the new name of the driver. Renaming done automatically through sed rules: s/stm32_exti_set_type/stm32mp_exti_convert_type/g s/stm32_exti_h_/stm32mp_exti_/g s/stm32_exti/stm32mp_exti/g s/stm32_bank/bank/g s/stm32_/stm32mp_/g s/STM32_/STM32MP_/g s/STM32MP1_/STM32MP_/g s/stm32mp1_exti_/stm32mp_exti_/g s/stm32-exti-h/stm32mp-exti/g Manually fix some indentation after the rename. [ tglx: Mop up more coding style issues while at it ] Signed-off-by:
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Antonio Borneo authored
Keep only the code for ARMv7m STM32 MCUs in in stm32-exti.c and split out the code for ARMv7a & ARMv8a STM32MPxxx MPUs into stm32mp-exti.c Signed-off-by:
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Antonio Borneo authored
Use the new config flag to build the correct driver that will be extracted from the old code. Signed-off-by:
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Antonio Borneo authored
Build the proper driver by selecting the appropriate config flag. Signed-off-by:
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Antonio Borneo authored
To guarantee bisect-ability during the split of stm32-exti in MCU and MPU code, introduce CONFIG_STM32MP_EXTI. Signed-off-by:
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Jisheng Zhang authored
The driver is now always built in. In some synaptics ARM64 SoCs it is used as a second level interrupt controller hanging off the ARM GIC and is therefore loadable during boot. Enable it to be built as a module and handle built-in usage correctly, so that it continues working on systems where it is the main interrupt controller. [ tglx: Massage changelog ] Signed-off-by:
Jisheng Zhang <jszhang@kernel.org> Signed-off-by:
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Jinjie Ruan authored
The initialization code has an is_of_node() check and invokes to_of_node() for every of_property_*() invocation. to_of_node() has a is_of_node() check already, so simplify the code by invoking to_of_node() and checking that for NULL. If not NULL hand in the node pointer to of_property_*(). The same applies to of_property_*() which fails when invoked with a NULL node pointer. [ tglx: Massaged change log ] Signed-off-by:
Jinjie Ruan <ruanjinjie@huawei.com> Signed-off-by:
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Tianyang Zhang authored
Introduce the advanced extended interrupt controllers. This feature will allow each core to have 256 independent interrupt vectors and MSI interrupts can be independently routed to any vector on any CPU. [ tglx: Fixed up coding style. Made on/offline functions void ] Co-developed-by:
Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by:
Liupu Wang <wangliupu@loongson.cn> Signed-off-by:
Tianyang Zhang <zhangtianyang@loongson.cn> Signed-off-by:
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Pali Rohár authored
The doorbell interrupts have the following layout on IPI vs no-IPI platforms: | 0...7 | 8...15 | 16...31 | ------------------+---------+----------+---------------------+ IPI platform | IPI | n/a | MSI | ------------------+---------+----------+---------------------+ non-IPI platform | MSI | ------------------+------------------------------------------+ Currently the driver only allows for the upper 16...31 interrupts for MSI domain (i.e. the MSI domain has only 16 interrupts). On platforms where IPI is not available, we can use whole 32 MSI interrupts. Implement support also for the lower 16 MSI interrupts on non-IPI platforms. [ Marek: refactored, changed commit message ] Signed-off-by:Pali Rohár <pali@kernel.org> Signed-off-by:
Marek Behún <kabel@kernel.org> Signed-off-by:
Andrew Lunn <andrew@lunn.ch>
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Pali Rohár authored
On platforms where IPI is not available in the MPIC, the IPI registers instead represent an additional set of MSI interrupt registers (currently unused by the driver). Do not touch these registers on platforms where IPI is not available in the MPIC. [ Marek: refactored, changed commit message ] Signed-off-by:
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Pali Rohár authored
IPI is available only on systems where the mpic controller does not have a parent interrupt defined (e.g. on Armada XP). If a parent interrupt is defined, inter-processor interrupts are handled by an interrupt controller higher in the hierarchy (most probably a parent GIC). Only call ipi_resume() on systems where IPI is available in the mpic controller. Signed-off-by:
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Pali Rohár authored
IRQs 0 (IPI) and 1 (MSI) are handled internally by this driver, generic_handle_domain_irq() is never called for these IRQs. Disallow mapping these IRQs. [ Marek: changed commit message ] Signed-off-by:
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Marek Behún authored
Use the dedicated atomic_io_modify() instead of a open coded spin_lock() + readl() + writel() + spin_unlock() sequence. This allows to drop the irq_controller_lock spinlock from the driver. Signed-off-by:
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Jeff Johnson authored
On x86, make allmodconfig && make W=1 C=1 reports: WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/irqchip/irq-ts4800.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/irqchip/irq-meson-gpio.o Add the missing invocation of the MODULE_DESCRIPTION() macro to all files which have a MODULE_LICENSE(). This includes a 3rd file, irq-mvebu-pic.c, which did not produce a warning with the x86 allmodconfig, but which may cause this warning with other kernel configurations. Signed-off-by:
Jeff Johnson <quic_jjohnson@quicinc.com> Signed-off-by:
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Lad Prabhakar authored
The order of function calls in the disable operation should be the reverse of that in the enable operation. Thus, reorder the function calls to first disable the parent IRQ chip before disabling the TINT IRQ. Reported-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by:
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- 21 Jun, 2024 1 commit
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Jisheng Zhang authored
The two functions riscv_intc_aia_irq() and riscv_intc_irq() are only called by C functions. Signed-off-by:
Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20240614151955.1949-1-jszhang@kernel.org
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- 17 Jun, 2024 13 commits
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Thomas Gleixner authored
ld: kernel/irq/irqdomain.o: in function `irq_domain_instantiate': kernel/irq/irqdomain.c:296:(.text+0x10dd): undefined reference to `irq_domain_alloc_generic_chips' ld: kernel/irq/irqdomain.c:313:(.text+0x1218): undefined reference to `irq_domain_remove_generic_chips' ld: kernel/irq/irqdomain.o: in function `irq_domain_remove': kernel/irq/irqdomain.c:349:(.text+0x1ddf): undefined reference to `irq_domain_remove_generic_chips' Provide the required stubs. Fixes: e6f67ce3 ("irqdomain: Add support for generic irq chips creation before publishing a domain") Reported-by:
Borislav Betkov <bp@alien8.de> Signed-off-by:
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Herve Codina authored
After contributing the driver, add myself as the maintainer for the Microchip LAN966x OIC driver. Signed-off-by:
Herve Codina <herve.codina@bootlin.com> Signed-off-by:
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Herve Codina authored
The Microchip LAN966x outband interrupt controller (OIC) maps the internal interrupt sources of the LAN966x device to an external interrupt. When the LAN966x device is used as a PCI device, the external interrupt is routed to the PCI interrupt. Signed-off-by:
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Herve Codina authored
The Microchip LAN966x outband interrupt controller (OIC) maps the internal interrupt sources of the LAN966x device to an external interrupt. When the LAN966x device is used as a PCI device, the external interrupt is routed to the PCI interrupt. Signed-off-by:
Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20240614173232.1184015-22-herve.codina@bootlin.com
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Herve Codina authored
__irq_domain_add() has been replaced by irq_domain_instanciate() and so, it is no more used. Simply remove it. Signed-off-by:
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Herve Codina authored
um_pci_init() uses __irq_domain_add(). With the introduction of irq_domain_instantiate(), __irq_domain_add() becomes obsolete. In order to fully remove __irq_domain_add(), use directly irq_domain_instantiate(). [ tglx: Fixup struct initializer ] Signed-off-by:
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Herve Codina authored
Domain creation functions use __irq_domain_add(). With the introduction of irq_domain_instantiate(), __irq_domain_add() becomes obsolete. In order to fully remove __irq_domain_add(), convert domain creation function to irq_domain_instantiate() Signed-off-by:
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Herve Codina authored
__irq_domain_add() wrappers use directly __irq_domain_add(). With the introduction of irq_domain_instantiate(), __irq_domain_add() becomes obsolete. In order to fully remove __irq_domain_add(), convert wrappers to irq_domain_instantiate() [ tglx: Fixup struct initializers ] Signed-off-by:
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Herve Codina authored
Add a devres version of irq_domain_instantiate(). Signed-off-by:
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Herve Codina authored
The current API functions create an irq_domain and also publish this newly created to domain. Once an irq_domain is published, consumers can request IRQ in order to use them. Some interrupt controller drivers have to perform some more operations with the created irq_domain in order to have it ready to be used. For instance: - Allocate generic irq chips with irq_alloc_domain_generic_chips() - Retrieve the generic irq chips with irq_get_domain_generic_chip() - Initialize retrieved chips: set register base address and offsets, set several hooks such as irq_mask, irq_unmask, ... With the newly introduced irq_domain_alloc_generic_chips(), an interrupt controller driver can use the irq_domain_chip_generic_info structure and set the init() hook to perform its generic chips initialization. In order to avoid a window where the domain is published but not yet ready to be used, handle the generic chip creation (i.e the irq_domain_alloc_generic_chips() call) before the domain is published. Suggested-by: -
Herve Codina authored
Most of generic chip drivers need to perform some more additional initializations on the generic chips allocated before they can be fully ready. These additional initializations need to be performed before the IRQ domain is published to avoid a race condition between IRQ consumers and suppliers. Introduce the init() hook to perform these initializations at the right place just after the generic chip creation. Also introduce the exit() hook to allow reverting operations done by the init() hook just before the generic chip is destroyed. Suggested-by:
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Herve Codina authored
The existing __irq_alloc_domain_generic_chips() uses a bunch of parameters to describe the generic chips that need to be allocated. Adding more parameters and wrappers to hide new parameters in the existing code leads to more and more code without any relevant values and without any flexibility. Introduce irq_domain_alloc_generic_chips() where the generic chips description is done using the irq_domain_chip_generic_info structure instead of the bunch of parameters to allow flexibility and easy evolution. Also introduce irq_domain_remove_generic_chips() to revert the operations done by irq_domain_alloc_generic_chips(). Suggested-by:
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Herve Codina authored
The current API does not allow additional initialization before the domain is published. This can lead to a race condition between consumers and supplier as a domain can be available for consumers before being fully ready. Introduce the init() hook to allow additional initialization before plublishing the domain. Also introduce the exit() hook to revert operations done in init() on domain removal. Suggested-by:
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