1. 26 Jun, 2020 6 commits
  2. 25 Jun, 2020 15 commits
  3. 24 Jun, 2020 19 commits
    • YueHaibing's avatar
      lan743x: Remove duplicated include from lan743x_main.c · 147373d9
      YueHaibing authored
      Remove duplicated include.
      Signed-off-by: default avatarYueHaibing <yuehaibing@huawei.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      147373d9
    • David S. Miller's avatar
      Merge branch 'net-bridge-fdb-activity-tracking' · 593b03d4
      David S. Miller authored
      Nikolay Aleksandrov says:
      
      ====================
      net: bridge: fdb activity tracking
      
      This set adds extensions needed for EVPN multi-homing proper and
      efficient mac sync. User-space (e.g. FRR) needs to be able to track
      non-dynamic entry activity on per-fdb basis depending if a tracked fdb is
      currently peer active or locally active and needs to be able to add new
      peer active fdb (static + track + inactive) without refreshing it to get
      real activity tracking. Patch 02 adds a new NDA attribute - NDA_FDB_EXT_ATTRS
      to avoid future pollution of NDA attributes by bridge or vxlan. New
      bridge/vxlan specific fdb attributes are embedded in NDA_FDB_EXT_ATTRS,
      which is used in patch 03 to pass the new NFEA_ACTIVITY_NOTIFY attribute
      which controls if an fdb should be tracked and also reflects its current
      state when dumping. It is treated as a bitfield, current valid bits are:
       1 - mark an entry for activity tracking
       2 - mark an entry as inactive to avoid multiple notifications and
           reflect state properly
      
      Patch 04 adds the ability to avoid refreshing an entry when changing it
      via the NFEA_DONT_REFRESH flag. That allows user-space to mark a static
      entry for tracking and keep its real activity unchanged.
      The set has been extensively tested with FRR and those changes will
      be upstreamed if/after it gets accepted.
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      593b03d4
    • Nikolay Aleksandrov's avatar
      net: bridge: add a flag to avoid refreshing fdb when changing/adding · b5f1d9ec
      Nikolay Aleksandrov authored
      When we modify or create a new fdb entry sometimes we want to avoid
      refreshing its activity in order to track it properly. One example is
      when a mac is received from EVPN multi-homing peer by FRR, which doesn't
      want to change local activity accounting. It makes it static and sets a
      flag to track its activity.
      Signed-off-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      b5f1d9ec
    • Nikolay Aleksandrov's avatar
      net: bridge: add option to allow activity notifications for any fdb entries · 31cbc39b
      Nikolay Aleksandrov authored
      This patch adds the ability to notify about activity of any entries
      (static, permanent or ext_learn). EVPN multihoming peers need it to
      properly and efficiently handle mac sync (peer active/locally active).
      We add a new NFEA_ACTIVITY_NOTIFY attribute which is used to dump the
      current activity state and to control if static entries should be monitored
      at all. We use 2 bits - one to activate fdb entry tracking (disabled by
      default) and the second to denote that an entry is inactive. We need
      the second bit in order to avoid multiple notifications of inactivity.
      Obviously this makes no difference for dynamic entries since at the time
      of inactivity they get deleted, while the tracked non-dynamic entries get
      the inactive bit set and get a notification.
      Signed-off-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      31cbc39b
    • Nikolay Aleksandrov's avatar
      net: neighbor: add fdb extended attribute · 899426b3
      Nikolay Aleksandrov authored
      Add an attribute to NDA which will contain all future fdb-specific
      attributes in order to avoid polluting the NDA namespace with e.g.
      bridge or vxlan specific attributes. The attribute is called
      NDA_FDB_EXT_ATTRS and the structure would look like:
       [NDA_FDB_EXT_ATTRS] = {
          [NFEA_xxx]
       }
      Signed-off-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      899426b3
    • Nikolay Aleksandrov's avatar
      net: bridge: fdb_add_entry takes ndm as argument · 0592ff88
      Nikolay Aleksandrov authored
      We can just pass ndm as an argument instead of its fields separately.
      Signed-off-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      0592ff88
    • David S. Miller's avatar
      Merge branch 'net-phy-mscc-PHC-and-timestamping-support' · b430081b
      David S. Miller authored
      Antoine Tenart says:
      
      ====================
      net: phy: mscc: PHC and timestamping support
      
      This series aims at adding support for PHC and timestamping operations
      in the MSCC PHY driver, for the VSC858x and VSC8575. Those PHYs are
      capable of timestamping in 1-step and 2-step for both L2 and L4 traffic.
      
      As of this series, only IPv4 support was implemented when using L4 mode.
      This is because of an hardware limitation which prevents us for
      supporting both IPv4 and IPv6 at the same time. Implementing support for
      IPv6 should be quite easy (I do have the modifications needed for the
      hardware configuration) but I did not see a way to retrieve this
      information in hwtstamp(). What would you suggest?
      
      Those PHYs are distributed in hardware packages containing multiple
      times the PHY. The VSC8584 for example is composed of 4 PHYs. With
      hardware packages, parts of the logic is usually common and one of the
      PHY has to be used for some parts of the initialization. Following this
      logic, the 1588 blocks of those PHYs are shared between two PHYs and
      accessing the registers has to be done using the "base" PHY of the
      group. This is handled thanks to helpers in the PTP code (and locks).
      We also need the MDIO bus lock while performing a single read or write
      to the 1588 registers as the read/write are composed of multiple MDIO
      transactions (and we don't want other threads updating the page).
      
      To get and set the PHC time, a GPIO has to be used and changes are only
      retrieved or committed when on a rising edge. The same GPIO is shared by
      all PHYs, so the granularity of the lock protecting it has to be
      different from the ones protecting the 1588 registers (the VSC8584 PHY
      has 2 1588 blocks, and a single load/save pin).
      
      Patch 1 extends the recently added helpers to share information between
      PHYs of the same hardware package; to allow having part of the probe to
      be shared (in addition to the already supported init part). This will be
      used when adding support for PHC/TS to initialize locks.
      
      Patches 2 and 3 are mostly cosmetic.
      
      Patch 4 takes into account the 1588 block in the MACsec initialization,
      to allow having both the MACsec and 1588 blocks initialized on a running
      system.
      
      Patches 5 and 6 add support for PHC and timestamping operations in the
      MSCC driver. An initialization of the 1588 block (plus all the registers
      definition; and helpers) is added first; and then comes a patch to
      implement the PHC and timestamping API.
      
      Patches 7 and 8 add the required hardware description for device trees,
      to be able to use the load/save GPIO pin on the PCB120 board.
      
      To use this on a PCB120 board, two other series are needed and have
      already been sent upstream (one is merged). There are no dependency
      between all those series.
      
      Since v3:
        - Fixed a SKB leak.
        - Removed ts_lock from the init, as TS and PHC operations aren't
          registered at this time.
        - Refectored the ts_base_addr/phy intialization.
        - Cleaned up the ingr/egr latencies definitons.
        - Fixed a comment about locking and the shared GPIO.
        - A few cosmetic fixes.
      
      Since v2:
        - Removed explicit inlines from .c files.
        - Fixed three warnings.
      
      Since v1:
        - Removed checks in rxtstamp/txtstamp as skb cannot be NULL here.
        - Reworked get_ptp_header_rx/get_ptp_header.
        - Reworked the locking logic between the PHC and timestamping
          operations.
        - Fixed a compilation issue on x86 reported by Jakub.
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      b430081b
    • Quentin Schulz's avatar
      MIPS: dts: ocelot: describe the load/save GPIO · 15324652
      Quentin Schulz authored
      This patch adds a description of the load/save GPIN pin, used in the
      VSC8584 PHY for timestamping operations. The related pinctrl description
      is also added.
      Signed-off-by: default avatarQuentin Schulz <quentin.schulz@bootlin.com>
      Signed-off-by: default avatarAntoine Tenart <antoine.tenart@bootlin.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      15324652
    • Antoine Tenart's avatar
      dt-bindings: net: phy: vsc8531: document the load/save GPIO · 3461522d
      Antoine Tenart authored
      A new optional property can be used to reference the load/save GPIO,
      used for PTP hardware clock (PHC) operations. This patch documents it in
      the binding documentation.
      Signed-off-by: default avatarAntoine Tenart <antoine.tenart@bootlin.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      3461522d
    • Antoine Tenart's avatar
      net: phy: mscc: timestamping and PHC support · 7d272e63
      Antoine Tenart authored
      This patch adds support for PHC and timestamping operations for the MSCC
      PHY. PTP 1-step and 2-step modes are supported, over Ethernet and UDP.
      
      To get and set the PHC time, a GPIO has to be used and changes are only
      retrieved or committed when on a rising edge. The same GPIO is shared by
      all PHYs, so the granularity of the lock protecting it has to be
      different from the ones protecting the 1588 registers (the VSC8584 PHY
      has 2 1588 blocks, and a single load/save pin).
      Co-developed-by: default avatarQuentin Schulz <quentin.schulz@bootlin.com>
      Signed-off-by: default avatarQuentin Schulz <quentin.schulz@bootlin.com>
      Signed-off-by: default avatarAntoine Tenart <antoine.tenart@bootlin.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      7d272e63
    • Quentin Schulz's avatar
      net: phy: mscc: 1588 block initialization · ab2bf933
      Quentin Schulz authored
      This patch adds the first parts of the 1588 support in the MSCC PHY,
      with registers definition and the 1588 block initialization.
      
      Those PHYs are distributed in hardware packages containing multiple
      times the PHY. The VSC8584 for example is composed of 4 PHYs. With
      hardware packages, parts of the logic is usually common and one of the
      PHY has to be used for some parts of the initialization. Following this
      logic, the 1588 blocks of those PHYs are shared between two PHYs and
      accessing the registers has to be done using the "base" PHY of the
      group. This is handled thanks to helpers in the PTP code (and locks).
      We also need the MDIO bus lock while performing a single read or write
      to the 1588 registers as the read/write are composed of multiple MDIO
      transactions (and we don't want other threads updating the page).
      Co-developed-by: default avatarAntoine Tenart <antoine.tenart@bootlin.com>
      Signed-off-by: default avatarQuentin Schulz <quentin.schulz@bootlin.com>
      Signed-off-by: default avatarAntoine Tenart <antoine.tenart@bootlin.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      ab2bf933
    • Antoine Tenart's avatar
      net: phy: mscc: take into account the 1588 block in MACsec init · 4c8c5dc5
      Antoine Tenart authored
      This patch takes in account the use of the 1588 block in the MACsec
      initialization, as a conditional configuration has to be done (when the
      1588 block is used).
      Signed-off-by: default avatarAntoine Tenart <antoine.tenart@bootlin.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      4c8c5dc5
    • Quentin Schulz's avatar
      net: phy: mscc: remove the TR CLK disable magic value · 6705b58d
      Quentin Schulz authored
      This patch adds a define for the 0x8000 magic value used to perform
      enable/disable actions on the "token ring clock". The patch is only
      cosmetic.
      Signed-off-by: default avatarQuentin Schulz <quentin.schulz@bootlin.com>
      Signed-off-by: default avatarAntoine Tenart <antoine.tenart@bootlin.com>
      Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      6705b58d
    • Antoine Tenart's avatar
      net: phy: mscc: fix copyright and author information in MACsec · c7cd2a6a
      Antoine Tenart authored
      All headers in the MSCC PHY driver have been copied and pasted from the
      original mscc.c file. However the information is not necessarily
      correct, as in the MACsec support. Fix this.
      Signed-off-by: default avatarAntoine Tenart <antoine.tenart@bootlin.com>
      Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      c7cd2a6a
    • Antoine Tenart's avatar
      net: phy: add support for a common probe between shared PHYs · 0ef44e5c
      Antoine Tenart authored
      Shared PHYs (PHYs in the same hardware package) may have shared
      registers and their drivers would usually need to share information.
      There is currently a way to have a shared (part of the) init, by using
      phy_package_init_once(). This patch extends the logic to share parts of
      the probe to allow sharing the initialization of locks or resources
      retrieval.
      Signed-off-by: default avatarAntoine Tenart <antoine.tenart@bootlin.com>
      Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      0ef44e5c
    • David S. Miller's avatar
      Merge branch 'cxgb4-fix-more-warnings-reported-by-sparse' · 7b0cc34a
      David S. Miller authored
      Rahul Lakkireddy says:
      
      ====================
      cxgb4: fix more warnings reported by sparse
      
      Patch 1 ensures all callers take on-chip memory lock when flashing
      PHY firmware to fix lock context imbalance warnings.
      
      Patch 2 moves all static arrays in header file to respective C file
      in device dump collection path.
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      7b0cc34a
    • Rahul Lakkireddy's avatar
      cxgb4: move device dump arrays in header to C file · f35d2117
      Rahul Lakkireddy authored
      Move all arrays related to device dump in header file to C file.
      Also, move the function that shares the arrays to the same C file.
      
      Fixes following warnings reported by make W=1 in several places:
      cudbg_entity.h:513:18: warning: 't6_hma_ireg_array' defined but not
      used [-Wunused-const-variable=]
        513 | static const u32 t6_hma_ireg_array[][IREG_NUM_ELEM] = {
      
      Fixes: a7975a2f ("cxgb4: collect register dump")
      Fixes: 17b332f4 ("cxgb4: add support to read serial flash")
      Signed-off-by: default avatarRahul Lakkireddy <rahul.lakkireddy@chelsio.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      f35d2117
    • Rahul Lakkireddy's avatar
      cxgb4: always sync access when flashing PHY firmware · 5fff701c
      Rahul Lakkireddy authored
      Access to on-chip memory for flashing PHY firmware must always
      be synchronized. So, ensure the callers take on-chip memory lock.
      
      Also fixes following sparse warning:
      sge.c:1641:26: warning: context imbalance in 't4_load_phy_fw' -
      different lock contexts for basic block
      
      Fixes: 01b69614 ("cxgb4: Add PHY firmware support for T420-BT cards")
      Fixes: 4ee339e1 ("cxgb4: add support to flash PHY image")
      Signed-off-by: default avatarRahul Lakkireddy <rahul.lakkireddy@chelsio.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      5fff701c
    • tannerlove's avatar
      selftests/net: plug rxtimestamp test into kselftest framework · 0558c396
      tannerlove authored
      Run rxtimestamp as part of TEST_PROGS. Analogous to other tests, add
      new rxtimestamp.sh wrapper script, so that the test runs isolated
      from background traffic in a private network namespace.
      
      Also ignore failures of test case #6 by default. This case verifies
      that a receive timestamp is not reported if timestamp reporting is
      enabled for a socket, but generation is disabled. Receive timestamp
      generation has to be enabled globally, as no associated socket is
      known yet. A background process that enables rx timestamp generation
      therefore causes a false positive. Ntpd is one example that does.
      
      Add a "--strict" option to cause failure in the event that any test
      case fails, including test #6. This is useful for environments that
      are known to not have such background processes.
      
      Tested:
      make -C tools/testing/selftests TARGETS="net" run_tests
      Signed-off-by: default avatarTanner Love <tannerlove@google.com>
      Acked-by: default avatarWillem de Bruijn <willemb@google.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      0558c396