1. 16 Feb, 2009 2 commits
  2. 13 Feb, 2009 10 commits
    • Paul Mackerras's avatar
      perfcounters: make context switch and migration software counters work again · c07c99b6
      Paul Mackerras authored
      Jaswinder Singh Rajput reported that commit 23a185ca caused the
      context switch and migration software counters to report zero always.
      With that commit, the software counters only count events that occur
      between sched-in and sched-out for a task.  This is necessary for the
      counter enable/disable prctls and ioctls to work.  However, the
      context switch and migration counts are incremented after sched-out
      for one task and before sched-in for the next.  Since the increment
      doesn't occur while a task is scheduled in (as far as the software
      counters are concerned) it doesn't count towards any counter.
      
      Thus the context switch and migration counters need to count events
      that occur at any time, provided the counter is enabled, not just
      those that occur while the task is scheduled in (from the perf_counter
      subsystem's point of view).  The problem though is that the software
      counter code can't tell the difference between being enabled and being
      scheduled in, and between being disabled and being scheduled out,
      since we use the one pair of enable/disable entry points for both.
      That is, the high-level disable operation simply arranges for the
      counter to not be scheduled in any more, and the high-level enable
      operation arranges for it to be scheduled in again.
      
      One way to solve this would be to have sched_in/out operations in the
      hw_perf_counter_ops struct as well as enable/disable.  However, this
      takes a simpler approach: it adds a 'prev_state' field to the
      perf_counter struct that allows a counter's enable method to know
      whether the counter was previously disabled or just inactive
      (scheduled out), and therefore whether the enable method is being
      called as a result of a high-level enable or a schedule-in operation.
      
      This then allows the context switch, migration and page fault counters
      to reset their hw.prev_count value in their enable functions only if
      they are called as a result of a high-level enable operation.
      Although page faults would normally only occur while the counter is
      scheduled in, this changes the page fault counter code too in case
      there are ever circumstances where page faults get counted against a
      task while its counters are not scheduled in.
      Reported-by: default avatarJaswinder Singh Rajput <jaswinder@kernel.org>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      c07c99b6
    • Ingo Molnar's avatar
      Merge branch 'x86/core' into perfcounters/core · b1864e9a
      Ingo Molnar authored
      Conflicts:
      	arch/x86/Kconfig
      	arch/x86/kernel/apic.c
      	arch/x86/kernel/setup_percpu.c
      b1864e9a
    • Ingo Molnar's avatar
      Merge branches 'x86/paravirt', 'x86/pat', 'x86/setup-v2', 'x86/subarch',... · 7032e869
      Ingo Molnar authored
      Merge branches 'x86/paravirt', 'x86/pat', 'x86/setup-v2', 'x86/subarch', 'x86/uaccess' and 'x86/urgent' into x86/core
      7032e869
    • Ingo Molnar's avatar
      Merge branch 'x86/mm' into x86/core · f268fe73
      Ingo Molnar authored
      f268fe73
    • Ingo Molnar's avatar
      Merge branches 'x86/acpi', 'x86/asm', 'x86/cpudetect', 'x86/crashdump',... · a56cdcb6
      Ingo Molnar authored
      Merge branches 'x86/acpi', 'x86/asm', 'x86/cpudetect', 'x86/crashdump', 'x86/debug', 'x86/defconfig', 'x86/doc', 'x86/header-fixes', 'x86/headers' and 'x86/minor-fixes' into x86/core
      a56cdcb6
    • Ingo Molnar's avatar
      Merge branch 'x86/cleanups' into x86/core · 881c4776
      Ingo Molnar authored
      881c4776
    • Ingo Molnar's avatar
      Merge branch 'core/percpu' into x86/core · ab639f35
      Ingo Molnar authored
      ab639f35
    • Ingo Molnar's avatar
      Merge branch 'linus' into x86/apic · f8a6b2b9
      Ingo Molnar authored
      Conflicts:
      	arch/x86/kernel/acpi/boot.c
      	arch/x86/mm/fault.c
      f8a6b2b9
    • Ingo Molnar's avatar
      Merge branch 'linus' into perfcounters/core · e9c4ffb1
      Ingo Molnar authored
      Conflicts:
      	arch/x86/kernel/acpi/boot.c
      e9c4ffb1
    • john stultz's avatar
      x86, hpet: fix for LS21 + HPET = boot hang · b13e2464
      john stultz authored
      Between 2.6.23 and 2.6.24-rc1 a change was made that broke IBM LS21
      systems that had the HPET enabled in the BIOS, resulting in boot hangs
      for x86_64.
      
      Specifically commit b8ce3359, which
      merges the i386 and x86_64 HPET code.
      
      Prior to this commit, when we setup the HPET timers in x86_64, we did
      the following:
      
      	hpet_writel(HPET_TN_ENABLE | HPET_TN_PERIODIC | HPET_TN_SETVAL |
                          HPET_TN_32BIT, HPET_T0_CFG);
      
      However after the i386/x86_64 HPET merge, we do the following:
      
      	cfg = hpet_readl(HPET_Tn_CFG(timer));
      	cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
      			HPET_TN_SETVAL | HPET_TN_32BIT;
      	hpet_writel(cfg, HPET_Tn_CFG(timer));
      
      However on LS21s with HPET enabled in the BIOS, the HPET_T0_CFG register
      boots with Level triggered interrupts (HPET_TN_LEVEL) enabled. This
      causes the periodic interrupt to be not so periodic, and that results in
      the boot time hang I reported earlier in the delay calibration.
      
      My fix: Always disable HPET_TN_LEVEL when setting up periodic mode.
      Signed-off-by: default avatarJohn Stultz <johnstul@us.ibm.com>
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      b13e2464
  3. 12 Feb, 2009 18 commits
  4. 11 Feb, 2009 10 commits