- 29 Aug, 2024 4 commits
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Yan Zhen authored
When the original file is guaranteed to contain the minmax.h header file and compile correctly, using the real macro is usually more intuitive and readable. Signed-off-by:
Yan Zhen <yanzhen@vivo.com> Link: https://patch.msgid.link/20240827131203.3918516-1-yanzhen@vivo.comSigned-off-by:
Mark Brown <broonie@kernel.org>
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Fabio Estevam authored
The rv1108-elgin-r1 board has an LCD controlled via SPI in userspace. The marking on the LCD is JG10309-01. Add the "elgin,jg10309-01" compatible string. Signed-off-by:
Fabio Estevam <festevam@gmail.com> Reviewed-by:
Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20240829113158.3324928-2-festevam@gmail.comSigned-off-by:
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Fabio Estevam authored
The rv1108-elgin-r1 board has an LCD controlled via SPI in userspace. The marking on the LCD is JG10309-01. Add an entry for the "elgin,jg10309-01" compatible string. Signed-off-by:
Conor Dooley <conor.dooley@microchip.com> Acked-by:
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Yang Ruibin authored
Increase the reference count by calling pci_get_slot(), and remember to decrement the reference count by calling pci_dev_put(). Signed-off-by:
Yang Ruibin <11162571@vivo.com> Link: https://patch.msgid.link/20240829033511.1917015-1-11162571@vivo.comSigned-off-by:
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- 28 Aug, 2024 1 commit
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Bastien Curutchet authored
The timeout used when waiting for transfer's completion is always set to HZ. This isn't enough if a transfer is too large or if the bus speed is too low. Use the bus speed and the transfer length to calculate an appropriate timeout Signed-off-by:
Bastien Curutchet <bastien.curutchet@bootlin.com> Link: https://patch.msgid.link/20240828063131.10507-1-bastien.curutchet@bootlin.comSigned-off-by:
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- 23 Aug, 2024 3 commits
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Jinjie Ruan authored
Instead of calling platform_get_resource_byname() and devm_ioremap_resource(), simplify the code by simply calling devm_platform_ioremap_resource_byname(). Signed-off-by:
Jinjie Ruan <ruanjinjie@huawei.com> Link: https://patch.msgid.link/20240820124011.1788479-1-ruanjinjie@huawei.comSigned-off-by:
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Jinjie Ruan authored
Use the devm_platform_ioremap_resource_byname() helper instead of calling platform_get_resource_byname() and devm_ioremap_resource() separately. Signed-off-by:
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Jinjie Ruan authored
Use the devm_platform_ioremap_resource_byname() helper instead of calling platform_get_resource_byname() and devm_ioremap_resource() separately. Signed-off-by:
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- 19 Aug, 2024 5 commits
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Mark Brown authored
Merge series from Jinjie Ruan <ruanjinjie@huawei.com>: Fix module autoloading and missing pm_runtime_disable().
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Jinjie Ruan authored
The pm_runtime_disable() is missing in the remove function, fix it by using devm_pm_runtime_enable(), so the pm_runtime_disable() in the probe error path can also be removed. Fixes: 2d13f2ff ("spi: bcm63xx-spi: fix pm_runtime") Cc: stable@vger.kernel.org # v5.13+ Signed-off-by:
Jonas Gorski <jonas.gorski@gmail.com> Link: https://patch.msgid.link/20240819123349.4020472-3-ruanjinjie@huawei.comSigned-off-by:
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Jinjie Ruan authored
Add MODULE_DEVICE_TABLE(), so modules could be properly autoloaded based on the alias from platform_device_id table. Fixes: 44d8fb30 ("spi/bcm63xx: move register definitions into the driver") Cc: stable@vger.kernel.org Signed-off-by:
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Jinjie Ruan authored
Add MODULE_DEVICE_TABLE(), so modules could be properly autoloaded based on the alias from of_device_id table. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20240819040523.2801461-1-ruanjinjie@huawei.comSigned-off-by:
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Jinjie Ruan authored
The sparse tool complains as follows: drivers/spi/spi-cadence-xspi.c:334:11: warning: symbol 'cdns_mrvl_xspi_clk_div_list' was not declared. Should it be static? This symbol is not used outside spi-cadence-xspi.c, so marks it static. Signed-off-by:
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- 14 Aug, 2024 4 commits
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Pierre-Henry Moussay authored
PIC64GX SPI/QSPI are compatible with MPFS SPI/QSPI driver, we just use fallback mechanism Signed-off-by:
Pierre-Henry Moussay <pierre-henry.moussay@microchip.com> Link: https://patch.msgid.link/20240725121609.13101-5-pierre-henry.moussay@microchip.comSigned-off-by:
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Krzysztof Kozlowski authored
Use scoped for_each_available_child_of_node_scoped() when iterating over device nodes to make code a bit simpler. Signed-off-by:
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Andy Shevchenko authored
0 is incorrect error code when failed to parse and map IRQ. Replace OF specific old API for IRQ retrieval with a generic one to fix this issue. Fixes: 0f245463 ("spi: ppc4xx: handle irq_of_parse_and_map() errors") Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20240814144525.2648450-1-andriy.shevchenko@linux.intel.comSigned-off-by:
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Ma Ke authored
Zero and negative number is not a valid IRQ for in-kernel code and the irq_of_parse_and_map() function returns zero on error. So this check for valid IRQs should only accept values > 0. Fixes: 44dab88e ("spi: add spi_ppc4xx driver") Signed-off-by:
Ma Ke <make24@iscas.ac.cn> Link: https://patch.msgid.link/20240722141822.1052370-1-make24@iscas.ac.cnSigned-off-by:
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- 13 Aug, 2024 1 commit
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Frank Li authored
Convert binding doc spi-sc18is602.txt (I2C to SPI bridge) to yaml. Additional change: - ref spi-controller.yaml Fix below warning: arch/arm64/boot/dts/freescale/fsl-lx2160a-bluebox3.dtb: /soc/i2c@2000000/i2c-mux@77/i2c@7/i2c-mux@75/i2c@0/spi@28: failed to match any schema with compatible: ['nxp,sc18is602b'] Reviewed-by:
Rob Herring (Arm) <robh@kernel.org> Signed-off-by:
Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20240813154444.3886690-1-Frank.Li@nxp.comSigned-off-by:
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- 02 Aug, 2024 2 commits
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Mark Brown authored
Merge series from Richard Fitzgerald <rf@opensource.cirrus.com>: Provide empty versions of acpi_spi_count_resources(), acpi_spi_device_alloc() and acpi_spi_find_controller_by_adev() if the real functions are not being built. This commit fixes two problems with the original definitions: 1) There wasn't an empty version of these functions 2) The #if only depended on CONFIG_ACPI. But the functions are implemented in the core spi.c so CONFIG_SPI_MASTER must also be enabled for the real functions to exist.
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Richard Fitzgerald authored
Provide empty versions of acpi_spi_count_resources(), acpi_spi_device_alloc() and acpi_spi_find_controller_by_adev() if the real functions are not being built. This commit fixes two problems with the original definitions: 1) There wasn't an empty version of these functions 2) The #if only depended on CONFIG_ACPI. But the functions are implemented in the core spi.c so CONFIG_SPI_MASTER must also be enabled for the real functions to exist. Signed-off-by:
Richard Fitzgerald <rf@opensource.cirrus.com> Link: https://patch.msgid.link/20240802152215.20831-2-rf@opensource.cirrus.comSigned-off-by:
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- 31 Jul, 2024 1 commit
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Biju Das authored
Add missing MODULE_DEVICE_TABLE definition for automatic loading of the driver when it is built as a module. Fixes: eb8d6d46 ("spi: add Renesas RPC-IF driver") Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20240731072955.224125-1-biju.das.jz@bp.renesas.comSigned-off-by:
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- 30 Jul, 2024 1 commit
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Witold Sadowski authored
xSPI block requires 64 bit operation for proper Marvell SDMA handling. Disallow bulding on targets without 64 bit support. Signed-off-by:
Witold Sadowski <wsadowski@marvell.com> Link: https://patch.msgid.link/20240730131627.1874257-1-wsadowski@marvell.comSigned-off-by:
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- 29 Jul, 2024 18 commits
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Mark Brown authored
Merge series from Witold Sadowski <wsadowski@marvell.com>: This patch series adds support for the second version of the Marvell hardware overlay for the Cadence xSPI IP block. The overlay is a hardware change made around the original xSPI block. It extends xSPI features with clock configuration, interrupt masking, and full-duplex, variable-length SPI operations. These functionalities allow the xSPI block to operate not only with memory devices but also with simple SPI devices and TPM devices. Example ACPI entry: Device (SPI0) { Name (_HID, "PRP0001") // ACPI_DT_NAMESPACE_HID Name (_UID, 0) Name (_DDN, "SPI controller 0") Name (_CCA, ONE) Method (_STA) {Return (0xF)} Name (_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer,// ResourceUsage PosDecode, // Decode MinFixed, // MinType MaxFixed, // MaxType NonCacheable, // MemType ReadWrite, // ReadWriteType 0, // AddressGranularity 0x804000000000, // MinAddress 0x804000001037, // MaxAddress 0, // AddressTranslation 0x1038) // AddressLength QWordMemory ( ResourceConsumer,// ResourceUsage PosDecode, // Decode MinFixed, // MinType MaxFixed, // MaxType NonCacheable, // MemType ReadWrite, // ReadWriteType 0, // AddressGranularity 0x804010000000, // MinAddress 0x804010000007, // MaxAddress 0, // AddressTranslation 0x8) // AddressLength QWordMemory ( ResourceConsumer,// ResourceUsage PosDecode, // Decode MinFixed, // MinType MaxFixed, // MaxType NonCacheable, // MemType ReadWrite, // ReadWriteType 0, // AddressGranularity 0x804000002000, // MinAddress 0x804000004027, // MaxAddress 0, // AddressTranslation 0x2028) // AddressLength QWordMemory ( ResourceConsumer,// ResourceUsage PosDecode, // Decode MinFixed, // MinType MaxFixed, // MaxType NonCacheable, // MemType ReadWrite, // ReadWriteType 0, // AddressGranularity 0x804000008000, // MinAddress 0x804000008237, // MaxAddress 0, // AddressTranslation 0x238) // AddressLength Interrupt(ResourceConsumer, Edge, ActiveHigh, Exclusive) { 0x7A } }) Name (_DSD, Package() { ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "compatible", "marvell,cn10-xspi-nor"}, Package () { "reg", 0x8040}, } }) } // SPI0 -
Mark Brown authored
Merge series from Marcelo Schmitt <marcelo.schmitt@analog.com>: This patch series extends the SPI bitbang, gpio, and spi-engine controllers to support configurable MOSI line idle states. It then introduces the ad4000 driver which uses the MOSI idle configuration to provide improved support for the AD4000 series of ADCs. Documentation is added describing the new extension to the SPI protocol. The currently supported wiring modes for AD4000 devices were documented under IIO documentation directory. Change log v6 -> v7: [Device tree] No changes to device tree from v6 to v7. [SPI] spi.c: Removed blank line added in code not related to MOSI idle feature. spi: bitbang: Rewrapped commit message. spi: bitbang: Rebased bitbang patch on top of spi for-next branch. [IIO] ad4000: Checked gain-milli read from dt and made it match one of supported gains or fail. ad4000: Added blank lines to improve code readability. ad4000: return 0; when known that no errors occurred. Link to v6: https://lore.kernel.org/linux-iio/cover.1719686465.git.marcelo.schmitt@analog.com/ Link to v5: https://lore.kernel.org/linux-iio/cover.1719351923.git.marcelo.schmitt@analog.com/ Link to v4: https://lore.kernel.org/linux-iio/cover.1718749981.git.marcelo.schmitt@analog.com/ Link to v3: https://lore.kernel.org/linux-iio/cover.1717539384.git.marcelo.schmitt@analog.com/ Link to v2: https://lore.kernel.org/linux-iio/cover.1712585500.git.marcelo.schmitt@analog.com/ Link to v1: https://lore.kernel.org/linux-iio/cover.1711131830.git.marcelo.schmitt@analog.com/ Prerequisite patches to apply this series to IIO testing branch: c3358a74 "spi: bitbang: Convert unsigned to unsigned int" https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?id=c3358a746e078d0f9048732c90fdab4f37c00e0d f261172d "spi: bitbang: Use typedef for txrx_*() callbacks" https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?id=f261172d39f358dcecce13c310690d3937e0cca6 6ecdb0aa "spi: axi-spi-engine: Add SPI_CS_HIGH support" https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?h=for-6.11&id=6ecdb0aa4dca62d236a659426e11e6cf302e8f18 Prerequisite patches to apply the series to SPI for-next brach: ef60f9ca "docs: iio: add documentation for adis16480 driver" https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio.git/commit/?h=testing&id=ef60f9ca26d33d0f8e1a709771c61d3e96f64559 Thanks, Marcelo Marcelo Schmitt (7): spi: Enable controllers to extend the SPI protocol with MOSI idle configuration spi: bitbang: Implement support for MOSI idle state configuration spi: spi-gpio: Add support for MOSI idle state configuration spi: spi-axi-spi-engine: Add support for MOSI idle configuration dt-bindings: iio: adc: Add AD4000 iio: adc: Add support for AD4000 Documentation: Add AD4000 documentation .../bindings/iio/adc/adi,ad4000.yaml | 197 +++++ Documentation/iio/ad4000.rst | 131 ++++ Documentation/iio/index.rst | 1 + Documentation/spi/spi-summary.rst | 83 ++ MAINTAINERS | 9 + drivers/iio/adc/Kconfig | 12 + drivers/iio/adc/Makefile | 1 + drivers/iio/adc/ad4000.c | 722 ++++++++++++++++++ drivers/spi/spi-axi-spi-engine.c | 15 +- drivers/spi/spi-bitbang.c | 24 + drivers/spi/spi-gpio.c | 12 +- drivers/spi/spi.c | 6 + include/linux/spi/spi_bitbang.h | 1 + include/uapi/linux/spi/spi.h | 5 +- 14 files changed, 1213 insertions(+), 6 deletions(-) create mode 100644 Documentation/devicetree/bindings/iio/adc/adi,ad4000.yaml create mode 100644 Documentation/iio/ad4000.rst create mode 100644 drivers/iio/adc/ad4000.c base-commit: 986da024b99a72e64f6bdb3f3f0e52af024b1f50 prerequisite-patch-id: 76a35c35c2af889be2ff20052da02df561b3d71b prerequisite-patch-id: ce5abb83d4f04e72c69d0df4ded79077065cd649 prerequisite-patch-id: b30f54a92e47dbad33ca7450089c7b19610e9cf2 -- 2.43.0
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AngeloGioacchino Del Regno authored
In order to avoid blocking for an excessive amount of time, eventually impacting on system responsiveness, interrupt handlers should finish executing in as little time as possible. Use threaded interrupt and move the SPI transfer handling (both CPU and DMA) for the non-spimem case to an interrupt thread instead. For SPI-MEM (IPM) controllers, handling is kept in the blocking interrupt as it simply consists in signalling completion. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://patch.msgid.link/20240726114721.142196-1-angelogioacchino.delregno@collabora.comSigned-off-by:
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Chen Ni authored
Replace a comma between expression statements by a semicolon. Fixes: 3e0cf4d3 ("spi: meson-spicc: add a linear clock divider support") Signed-off-by:
Chen Ni <nichen@iscas.ac.cn> Reviewed-by:
Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20240716091151.1434450-1-nichen@iscas.ac.cnSigned-off-by:
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Ma Ke authored
Zero and negative number is not a valid IRQ for in-kernel code and the irq_of_parse_and_map() function returns zero on error. So this check for valid IRQs should only accept values > 0. Fixes: 44dab88e ("spi: add spi_ppc4xx driver") Signed-off-by:
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Rafał Miłecki authored
MT7981 has SPI controllers based on IPM design Signed-off-by:
Rafał Miłecki <rafal@milecki.pl> Acked-by:
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David Lechner authored
This adds a check on xfer->len to avoid emitting an XFER_BITS instruction for empty transfers in the AXI SPI Engine driver. This avoids unnecessary delays caused by executing an instruction that has no effect on the actual SPI transfer. Signed-off-by:
David Lechner <dlechner@baylibre.com> Reviewed-by:
Nuno Sa <nuno.sa@analog.com> Link: https://patch.msgid.link/20240723-spi-axi-spi-engine-opt-bpw-v1-1-2625ba4c4387@baylibre.comSigned-off-by:
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Marcelo Schmitt authored
Add device tree documentation for AD4000 series of ADC devices. Reviewed-by:
Marcelo Schmitt <marcelo.schmitt@analog.com> Reviewed-by:
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Marcelo Schmitt authored
Implement MOSI idle low and MOSI idle high to better support peripherals that request specific MOSI behavior. Acked-by:
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Marcelo Schmitt authored
Implement MOSI idle low and MOSI idle high to better support peripherals that request specific MOSI behavior. Acked-by:
Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by:
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Marcelo Schmitt authored
Some SPI peripherals may require strict MOSI line state when the controller is not clocking out data. Implement support for MOSI idle state configuration (low or high) by setting the data output line level on controller setup and after transfers. Bitbang operations now call controller specific set_mosi_idle() callback to set MOSI to its idle state. The MOSI line is kept at its idle state if no tx buffer is provided. Acked-by:
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Marcelo Schmitt authored
The behavior of an SPI controller data output line (SDO or MOSI or COPI (Controller Output Peripheral Input) for disambiguation) is usually not specified when the controller is not clocking out data on SCLK edges. However, there do exist SPI peripherals that require specific MOSI line state when data is not being clocked out of the controller. Conventional SPI controllers may set the MOSI line on SCLK edges then bring it low when no data is going out or leave the line the state of the last transfer bit. More elaborated controllers are capable to set the MOSI idle state according to different configurable levels and thus are more suitable for interfacing with demanding peripherals. Add SPI mode bits to allow peripherals to request explicit MOSI idle state when needed. When supporting a particular MOSI idle configuration, the data output line state is expected to remain at the configured level when the controller is not clocking out data. When a device that needs a specific MOSI idle state is identified, its driver should request the MOSI idle configuration by setting the proper SPI mode bit. Acked-by:
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Witold Sadowski authored
Try to read bus width property using acpi_dev_get_property function, do not rely on spi_mem_default_supports_op function only. If of_device_get_match_data() will fail, retry with acpi_device_get_match_data() to handle ACPI properly. Signed-off-by:
Piyush Malgujar <pmalgujar@marvell.com> Link: https://patch.msgid.link/20240724154739.582367-10-wsadowski@marvell.comSigned-off-by:
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Witold Sadowski authored
In current implementation cs property can be read only from device-tree(for_each_available_child_of_node_scoped). Change it to fwnode based read to allow property reading in ACPI case too. Signed-off-by:
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Witold Sadowski authored
If mapping resource by name will fail try to map resource by number. Such situation can occur in ACPI case. Signed-off-by:
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Witold Sadowski authored
Marvell Xfer overlay extends xSPI capabilities to support non-memory SPI operations. The Marvell overlay, combined with a generic command, allows for full-duplex SPI transactions. It also enables transactions with undetermined lengths using the cs_hold parameter and the ability to extend CS signal assertion, even if the xSPI block requests CS signal de-assertion. Marvell overlay is using part of xSPI for writing data into device, and additional hardware block to read data from the device. To do that xSPI will trigger 1 byte generic command followed by data sequence. In same time overlay block will monitor MISO pin to read data from the device. Due to that SDMA data start will be shifted by 1 byte. Signed-off-by:
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Witold Sadowski authored
It is possible that before enabling interrupt, interrupt bit will be set. It might cause improper IRQ handler behaviour. To fix it, clear interrupt bit before enabling interrupts. That behaviour is specific to Marvell xSPI implementation. In addition in Marvell xSPI interrupt must be cleared in two places - xSPI itself, and Marvell overlay. Signed-off-by:
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Witold Sadowski authored
In Marvell xSPI implementation any access to SDMA register will result in 8 byte SPI data transfer. Reading less data(eg. 1B) will result in losing remaining bytes. To avoid that read/write 8 bytes into temporary buffer, and read/write whole temporary buffer into SDMA. Signed-off-by:
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