Make RTC_DRV_HID_SENSOR_TIME depend on IIO and HID_SENSOR_HUB to remove
possible circular dependencies as this is the only symbol selecting those.
Suggested-by: Florian Lohoff <f@zz.de>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

Add a driver for the MicroCrystal RV-3028. It is a SMT Real-Time Clock
Module that incorporates an integrated CMOS circuit together with an XTAL.
It has an i2c interface.

The driver handles date/time, alarms, trickle charging, timestamping,
frequency offset correction, EEPROM and NVRAM.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

Since this documents multiple chips controlled by the isl1208 driver,
name it isil,isl1208.txt, as the convention is to use the base driver
name in the bindings document for drivers with multiple devices.

Include all chips supported by this driver in the docs.  Make it
clear which properties apply to which chips.

Expand documentation for existing isil,evienb property to explain
operation in more detail.  Existing docs just describe it in terms of
setting a bit in a register.

CC: Alessandro Zummo <a.zummo@towertech.it>
CC: Alexandre Belloni <alexandre.belloni@bootlin.com>
CC: Rob Herring <robh+dt@kernel.org>
CC: Mark Rutland <mark.rutland@arm.com>
CC: devicetree@vger.kernel.org
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

Add support for the RTC's NVRAM using the standard nvmem support that is
part of the Linux RTC framework.

This driver already has a sysfs attribute that provides access to the
RTC's NVRAM as a single 16-bit value.  Some chips have more than two
bytes of NVRAM, so this will not work for them.  It's also non-standard.

This sysfs attribute is left in for backward compatibility, but will only
be able to read the first two bytes of NVRAM.  The nvmem interface will
allow access to all NVRAM, e.g. eight bytes on the isl1218.

Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

Add more support in the driver for dealing with differences in is1208
compatible chips.  Put the 1208, 1209, 1218, and 1219 in the list and
encode information about nvram size, tamper, and timestamp features.

This adds support for the isl1209, which has a tamper detect but no
timestamp feature.

Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

This driver has no state of its own, depending entirely on what is in
the generic rtc device.

Intoduce a state struct.  For now it only contains a pointer to the rtc
device struct, but future patches will add more data.

Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

rtc_nvmem_unregister() is called on rtc_device release so it is not
necessary to call it from the driver.
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

Add support for the RTC block on the 32-bit Amlogic Meson6, Meson8,
Meson8b and Meson8m2 SoCs.

The RTC is split in to two parts, which are both managed by this driver:
- the AHB front end
- and a simple serial connection to the actual registers

The RTC_COUNTER register which holds the time is 32-bits wide.

There are four 32-bit wide (in total: 16 bytes) "regmem" registers which
are exposed using nvmem. On Amlogic's 3.10 kernel this is used to store
data which needs to survive a suspend / resume cycle.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
[resurrected Ben's patches after 2 years]
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

The 32-bit Amlogic Meson SoCs (Meson6, Meson8, Meson8b and Meson8m2)
have a built-in RTC block.
It has the following inputs:
- an 32.768kHz crystal oscillator
- an interrupt line
- a reset line
- 0.9V voltage input
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
[resurrected patches from Ben after 2 years]
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

When the oscillator of the rtc gets interrupted,
e.g. due to an empty battery, reading from the rtc will now return an error
and the oscillator bit will be cleared, once the rtc is successfully reset.
Signed-off-by: Oliver Rohe <oliver.rohe@wago.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

Fix the following build issue:

drivers/rtc/rtc-imx-sc.o: In function `imx_sc_rtc_set_time':
>> rtc-imx-sc.c:(.text+0x212): undefined reference to `__arm_smccc_smc'

Fixes: 13a929f3 ("rtc: imx-sc: add rtc set time support")
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

Shifting a u8 by 24 will cause the value to be promoted to an integer. If
the top bit of the u8 is set then the following conversion to an unsigned
long will sign extend the value causing the upper 32 bits to be set in
the result.

Fix this by casting the u8 value to an unsigned long before the shift.

Detected by CoverityScan, CID#1309693 ("Unintended sign extension")

Fixes: 9a9a54ad ("drivers/rtc: add support for Qualcomm PMIC8xxx RTC")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

Shifting a u8 by 24 will cause the value to be promoted to an integer. If
the top bit of the u8 is set then the following conversion to an unsigned
long will sign extend the value causing the upper 32 bits to be set in
the result.

Fix this by casting the u8 value to an unsigned long before the shift.

Detected by CoverityScan, CID#714646-714649 ("Unintended sign extension")

Fixes: 2985c29c ("rtc: Add rtc support to 88PM80X PMIC")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

Shifting a u8 by 24 will cause the value to be promoted to an integer. If
the top bit of the u8 is set then the following conversion to an unsigned
long will sign extend the value causing the upper 32 bits to be set in
the result.

Fix this by casting the u8 value to an unsigned long before the shift.

Detected by CoverityScan, CID#144925-144928 ("Unintended sign extension")

Fixes: 008b3040 ("mfd: Add rtc support to 88pm860x")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

When the EXTENSION.WADA bit is set, register 0x19 contains a bitmap of
week days, not a day of month. As Linux only handles a single alarm
without repetition using day of month is more flexible, so clear this
bit. (Otherwise a value depending on time.tm_wday would have to be
written to register 0x19.)

Also optimize setting the AIE bit to use a single register write instead
of a bulk write of three registers.

Fixes: ee0981be ("rtc: ds1307: Add support for Epson RX8130CE")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

When voltage dropped since the RTC was last set the reported time is not
reliable. In this case return an error indicator instead of a bogus
time.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

While rx8130 has a register offset of 0x10 in its chip_desc, this isn't
used when regmap accesses are done. So add 0x10 to access the right
locations.

Fixes: ee0981be ("rtc: ds1307: Add support for Epson RX8130CE")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

There used to be 16 declarations for static functions. By just adding a
declaration for the chips array and reordering the functions the 16
function declarations can be dropped.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

This allows to use the register offsets in all functions
which is needed in one of the next patches.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

This patch adds i.MX system controller RTC set time support, the
RTC set time is implemented via SIP(silicon provider) runtime
service call and ARM-Trusted-Firmware will communicate with system
controller via MU(message unit) IPC to set RTC time.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

The Ricoh chips have slightly different register layouts
and the r2221 chip uses bit 5 as the oscillator halt sensor bit.
Signed-off-by: Olive Rohe <oliver.rohe@wago.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

During system suspend, the SNVS RTC's clock will be disabled in
noirq suspend phase, but SNVS RTC's alarm interrupt could still
arrive, system will hang if SNVS RTC driver tries to access register
without clock enabled, this patch fixes the issue of this scenario.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

Shifting a u8 by 24 will cause the value to be promoted to an integer. If
the top bit of the u8 is set then the following conversion to an unsigned
long will sign extend the value causing the upper 32 bits to be set in
the result.

Fix this by casting the u8 value to an unsigned long before the shift.

Detected by CoverityScan, CID#138801 ("Unintended sign extension")

Fixes: edf1aaa3 ("[PATCH] RTC subsystem: DS1672 driver")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

The RV1805 uses smaller package than the AB1805, discern those two
chips based on the compatible value and configure reserved bits in
the RV1805 to prevent current leakage and accidental test mode entry.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com>
To: linux-rtc@vger.kernel.org
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

Add compatible string for Microcrystal RV1805 RTC, which is compatible
with AB1805. The RV1805 uses smaller 10 pin package, while the AB1805
uses larger 16pin package, however the die inside the chip is the same.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Rob Herring <robh+dt@kernel.org>
To: devicetree@vger.kernel.org
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

Remove .owner field if calls are used which set it automatically
Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

This patch adds a driver for Cadence RTC controller.

It can be enabled with RTC_DRV_CADENCE Kconfig option.
It supports waking system from sleep modes.
Signed-off-by: Jan Kotas <jank@cadence.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

This patch adds a DT binding documentation for
Cadence RTC controller.
Signed-off-by: Jan Kotas <jank@cadence.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

Older versions of Libreboot and Coreboot had an invalid value
(`3' in my case) in the century byte affecting the GM45 in
the Thinkpad X200.  Not everybody's updated their firmwares,
and Linux <= 4.2 was able to read the RTC without problems,
so workaround this by ignoring invalid values.

Fixes: 3c217e51 ("rtc: cmos: century support")

Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Sylvain Chouleur <sylvain.chouleur@intel.com>
Cc: Patrick McDermott <patrick.mcdermott@libiquity.com>
Cc: linux-rtc@vger.kernel.org
Signed-off-by: Eric Wong <e@80x24.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

When i2c_smbus_read_i2c_block_data() fails, the read data in "buf" could
be incorrect and should not be used. The fix checks if
i2c_smbus_read_i2c_block_data fails, and if so, return its error code
upstream.
Signed-off-by: Kangjie Lu <kjlu@umn.edu>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

clk_prepare() could fail, so let's check its status and if it fails
return its error code upstream.
Signed-off-by: Kangjie Lu <kjlu@umn.edu>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

Add support for specifying the xtal load capacitance in the DT node.
The pcf85063 supports xtal load capacitance of 7pF or 12.5pF.
If the rtc has the wrong configuration the time will
drift several hours/week.

The driver use the default value 7pF.

The DT may specify either 7000fF or 12500fF.
(The DT uses femto Farad to avoid decimal numbers).
Other values are warned and the driver uses the default value.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Urs Fässler <urs.fassler@bbv.ch>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

Add support for specifying the xtal load capacitance in the DT node.
The pcf8523 supports xtal load capacitance of 7pF or 12.5pF.
If the rtc has the wrong configuration the time will
drift several hours/week.

The driver use the default value 12.5pF.

The DT may specify either 7000fF or 12500fF.
(The DT uses femto Farad to avoid decimal numbers).
Other values are warned and the driver uses the default value.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

The NXP pcf85063 supports two different xtal load capacitance
- 7000fF  (7pF)    HW default, Linux driver default
- 12500fF (12.5pF) Minimum power consumption

To obtain a precise RTC the pcf85063 must be configured
with the correct capacitance load of the xtal.

Add a property to specify the xtal capacitance load.
The default value matches that of the current Linux driver.

With a dedicated binding remove the entry in rtc.txt
Signed-off-by: Søren Andersen <san@skov.dk>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Urs Fässler <urs.fassler@bbv.ch>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

The NXP pcf8523 supports two different xtal load capacitance
- 7000fF  (7pF)    HW default
- 12500fF (12.5pF) Minimum power consumption, driver default

To obtain a precise RTC the pcf8523 must be configured
with the correct capacitance load of the xtal.

Add a property to specify the xtal capacitance load.
The default value matches that of the current Linux driver.

With a dedicated binding remove the entry in rtc.txt
Signed-off-by: Søren Andersen <san@skov.dk>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

The quartz-load-femtofarads are relevant for
several users. Add it as a common property in rtc.
Note that valid values and default values must be documented.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Suggested-by: Rob Herring <robh+dt@kernel.org>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

When dealing with capacitance of 0.5 pF then
a smaller unit is preferred.
Add femtofarads to deal with this.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

Replace of_match_node() with of_device_get_match_data(), which removes a
few lines of code from the driver.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

s3c_rtc_enable/disable_clk() functions were designed to be called multiple
times without reference counting, because they were initially only used in
alarm setting/clearing functions, which can be called both when alarm is
already set or not. Later however, calls to those functions have been added to
other places in the driver - like time and /proc reading callbacks, what
results in broken alarm if any of such events happens after the alarm has
been set. Fix this by simplifying s3c_rtc_enable/disable_clk() functions
to rely on proper reference counting in clock core and move alarm enable
counter to s3c_rtc_setaie() function.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

Fixes the following sparse warning:

drivers/rtc/rtc-sd3078.c:218:19: warning:
 symbol 'sd3078_driver' was not declared. Should it be static?

Fixes: 1d67a232 ("rtc: sd3078: new driver.")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>