1. 10 Mar, 2012 1 commit
  2. 07 Mar, 2012 1 commit
  3. 05 Mar, 2012 1 commit
  4. 29 Feb, 2012 15 commits
  5. 27 Feb, 2012 5 commits
  6. 23 Feb, 2012 2 commits
    • Dave Airlie's avatar
      Merge tag 'drm-intel-next-2012-02-16-merge-resolved' of... · e5bcf234
      Dave Airlie authored
      Merge tag 'drm-intel-next-2012-02-16-merge-resolved' of git://people.freedesktop.org/~danvet/drm-intel into drm-core-next
      
      * tag 'drm-intel-next-2012-02-16-merge-resolved' of git://people.freedesktop.org/~danvet/drm-intel: (45 commits)
        Revert "drivers/gpu/drm/i915/intel_overlay.c needs seq_file.h"
        drm/i915/lvds: Always use the presence pin for LVDS on PCH
        drm/i915: Record the position of the request upon error
        drm/i915: Record the in-flight requests at the time of a hang
        drm/i915: Record the tail at each request and use it to estimate the head
        drm/i915: add missing SDVO bits for interlaced modes on ILK
        drm/i915: Fix race condition in accessing GMBUS
        drm/i915: add a "force-dvi" HDMI audio mode
        drm/i915: Don't lock panel registers when downclocking
        drm/i915: fix up locking inconsistency around gem_do_init
        drm/i915: enable forcewake voodoo also for gen6
        drm/i915: fixup seqno allocation logic for lazy_request
        drm/i915: outstanding_lazy_request is a u32
        drm/i915: check gtfifodbg after possibly failed writes
        drm/i915: catch gtfifo errors on forcewake_put
        drm/i915: use gtfifodbg
        drm/i915: set interlaced bits for TRANSCONF
        drm/i915: fixup overlay checks for interlaced modes
        drm/i915: allow interlaced mode output on the HDMI connector
        drm/i915: allow interlaced mode output on the SDVO connector
        ...
      e5bcf234
    • Daniel Vetter's avatar
      Merge remote-tracking branch 'airlied/drm-next' into for-airlied · ff5f4b05
      Daniel Vetter authored
      Manually resolve the conflict between the new enum drm property
      helpers in drm-next and the new "force-dvi" option that the "audio" output
      property gained in drm-intel-next.
      
      While resolving this conflict, switch the new drm_prop_enum_list to
      use the newly introduced enum defines instead of magic values.
      
      Conflicts:
      	drivers/gpu/drm/i915/intel_modes.c
      Signed-Off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      ff5f4b05
  7. 16 Feb, 2012 4 commits
  8. 15 Feb, 2012 4 commits
    • Chris Wilson's avatar
      drm/i915/lvds: Always use the presence pin for LVDS on PCH · f3cfcba6
      Chris Wilson authored
      With the introduction of the PCH, we gained an LVDS presence pin but we
      continued to use the existing logic that asserted that LVDS was only
      supported on certain mobile chipsets. However, there are desktop
      IronLake systems with LVDS attached which we fail to detect. So for PCH,
      trust the LVDS presence pin and quirk all the lying manufacturers.
      Tested-by: default avatarDaniel Woff <wolff.daniel@gmail.com>
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43171Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: default avatarEugeni Dodonov <eugeni.dodonov@intel.com>
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      f3cfcba6
    • Chris Wilson's avatar
      drm/i915: Record the position of the request upon error · ee4f42b1
      Chris Wilson authored
      So that we can tally the request against the command sequence in the
      ringbuffer, or merely jump to the interesting locations.
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      ee4f42b1
    • Chris Wilson's avatar
      drm/i915: Record the in-flight requests at the time of a hang · 52d39a21
      Chris Wilson authored
      Being able to tally the list of outstanding requests with the sequence
      of commands in the ringbuffer is often useful evidence with respect to
      driver corruption.
      
      Note that since this is the umpteenth per-ring data structure to be added
      to the error state, I've coallesced the nearby loops (the ringbuffer and
      batchbuffer) into a single structure along with the list of requests.  A
      later task would be to refactor the ring register state into the same
      structure.
      
      v2: Fix pretty printing of requests so that they are parsed correctly by
      intel_error_decode and use the 0x%08x format for seqno for consistency
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      52d39a21
    • Chris Wilson's avatar
      drm/i915: Record the tail at each request and use it to estimate the head · a71d8d94
      Chris Wilson authored
      By recording the location of every request in the ringbuffer, we know
      that in order to retire the request the GPU must have finished reading
      it and so the GPU head is now beyond the tail of the request. We can
      therefore provide a conservative estimate of where the GPU is reading
      from in order to avoid having to read back the ring buffer registers
      when polling for space upon starting a new write into the ringbuffer.
      
      A secondary effect is that this allows us to convert
      intel_ring_buffer_wait() to use i915_wait_request() and so consolidate
      upon the single function to handle the complicated task of waiting upon
      the GPU. A necessary precaution is that we need to make that wait
      uninterruptible to match the existing conditions as all the callers of
      intel_ring_begin() have not been audited to handle ERESTARTSYS
      correctly.
      
      By using a conservative estimate for the head, and always processing all
      outstanding requests first, we prevent a race condition between using
      the estimate and direct reads of I915_RING_HEAD which could result in
      the value of the head going backwards, and the tail overflowing once
      again. We are also careful to mark any request that we skip over in
      order to free space in ring as consumed which provides a
      self-consistency check.
      
      Given sufficient abuse, such as a set of unthrottled GPU bound
      cairo-traces, avoiding the use of I915_RING_HEAD gives a 10-20% boost on
      Sandy Bridge (i5-2520m):
        firefox-paintball  18927ms -> 15646ms: 1.21x speedup
        firefox-fishtank   12563ms -> 11278ms: 1.11x speedup
      which is a mild consolation for the performance those traces achieved from
      exploiting the buggy autoreported head.
      
      v2: Add a few more comments and make request->tail a conservative
      estimate as suggested by Daniel Vetter.
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      [danvet: resolve conflicts with retirement defering and the lack of
      the autoreport head removal (that will go in through -fixes).]
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      a71d8d94
  9. 14 Feb, 2012 4 commits
    • Paulo Zanoni's avatar
      drm/i915: add missing SDVO bits for interlaced modes on ILK · 7c26e5c6
      Paulo Zanoni authored
      This was pointed by Jesse Barnes. The code now seems to follow the
      specification but I don't have an SDVO device to really test this.
      Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
      Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      7c26e5c6
    • Dave Airlie's avatar
      Merge tag 'drm-intel-next-2012-02-07' of... · cdbe8b54
      Dave Airlie authored
      Merge tag 'drm-intel-next-2012-02-07' of git://people.freedesktop.org/~danvet/drm-intel into drm-core-next
      
      * tag 'drm-intel-next-2012-02-07' of git://people.freedesktop.org/~danvet/drm-intel: (29 commits)
        drm/i915: Handle unmappable buffers during error state capture
        drm/i915: rewrite shmem_pread_slow to use copy_to_user
        drm/i915: rewrite shmem_pwrite_slow to use copy_from_user
        drm/i915: fall through pwrite_gtt_slow to the shmem slow path
        drm/i915: add debugfs file for swizzling information
        drm/i915: fix swizzle detection for gen3
        drm/i915: Remove the upper limit on the bo size for mapping into the CPU domain
        drm/i915: add per-ring fault reg to error_state
        drm/i915: reject GTT domain in relocations
        drm/i915: remove the i915_batchbuffer_info debugfs file
        drm/i915: capture error_state also for stuck rings
        drm/i915: refactor debugfs create functions
        drm/i915: refactor debugfs open function
        drm/i915: don't trash the gtt when running out of fences
        drm/i915: Separate fence pin counting from normal bind pin counting
        drm/i915/ringbuffer: kill snb blt workaround
        drm/i915: collect more per ring error state
        drm/i915: refactor ring error state capture to use arrays
        drm/i915: switch ring->id to be a real id
        drm/i915: set AUD_CONFIG N_value_index for DisplayPort
        ...
      cdbe8b54
    • Yufeng Shen's avatar
      drm/i915: Fix race condition in accessing GMBUS · 8a8ed1f5
      Yufeng Shen authored
      GMBUS has several ports and each has it's own corresponding
      I2C adpater. When multiple I2C adapters call gmbus_xfer() at
      the same time there is a race condition in using the underlying
      GMBUS controller. Fixing this by adding a mutex lock when calling
      gmbus_xfer().
      
      v2: Moved gmbus_mutex below intel_gmbus and added comments.
      Rebased to drm-intel-next-queued.
      Signed-off-by: default avatarYufeng Shen <miletus@chromium.org>
      [danvet: Shortened the gmbus_mutex comment a bit and add the patch
      revision comment to the commit message.]
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      8a8ed1f5
    • Wu Fengguang's avatar
      drm/i915: add a "force-dvi" HDMI audio mode · b1d7e4b4
      Wu Fengguang authored
      When HDMI-DVI converter is used, it's not only necessary to turn off
      audio, but also to disable HDMI_MODE_SELECT and video infoframe. Since
      the DVI mode is mainly tied to audio functionality from end user POV,
      add a new "force-dvi" audio mode:
      
      	xrandr --output HDMI1 --set audio force-dvi
      
      Note that most users won't need to set this and happily rely on the EDID
      based DVI auto detection.
      Reported-by: default avatarAndrea Arcangeli <aarcange@redhat.com>
      Signed-off-by: default avatarWu Fengguang <fengguang.wu@intel.com>
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      b1d7e4b4
  10. 13 Feb, 2012 3 commits
    • Sean Paul's avatar
      drm/i915: Don't lock panel registers when downclocking · 8ac5a6d5
      Sean Paul authored
      This patch replaces the locking from the downclock routines with an assert
      to ensure the registers are indeed unlocked. Without this patch, pre-SNB
      devices would lock the registers when downclocking which would cause a
      WARNING on suspend/resume with downclocking enabled.
      
      Note: To hit this bug, you need to have lvds downclocking enabled.
      Signed-off-by: default avatarSean Paul <seanpaul@chromium.org>
      Acked-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      8ac5a6d5
    • Jerome Glisse's avatar
      drm/radeon: add support for evergreen/ni tiling informations v11 · 285484e2
      Jerome Glisse authored
      evergreen and northern island gpu needs more informations for 2D tiling
      than previous r6xx/r7xx. Add field to tiling ioctl to allow userspace
      to provide those.
      
      The v8 cs checking change to track color view on r6xx/r7xx doesn't
      affect old userspace as old userspace always emited 0 for this register.
      
      v2 fix r6xx/r7xx 2D tiling computation
      v3 fix r6xx/r7xx height align for untiled surface & add support for
         tile split on evergreen and newer
      v4 improve tiling debugging output
      v5 fix tile split code for evergreen and newer
      v6 set proper tile split for crtc register
      v7 fix tile split limit value
      v8 add COLOR_VIEW checking to r6xx/r7xx checker, add evergreen cs
         checking, update safe reg for r600, evergreen and cayman.
         Evergreen checking need some work around for stencil alignment
         issues
      v9 fix tile split value range, fix compressed texture handling and
         mipmap calculation, allow evergreen check to be silencious in
         front of current broken userspace (depth/stencil alignment issue)
      v10 fix eg 3d texture and compressed texture, fix r600 depth array,
          fix r600 color view computation, add support for evergreen stencil
          split
      v11 more verbose debugging in some case
      Signed-off-by: default avatarJerome Glisse <jglisse@redhat.com>
      Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
      285484e2
    • Marek Olšák's avatar
      drm/radeon/kms: add support for streamout v7 · dd220a00
      Marek Olšák authored
      v2: agd5f: add strmout CS checking, copy_dw register checking
      
      v3: agd5f: don't use cs_check_reg() for copy_dw checking as it
      will incorrectly patch the command stream for certain regs.
      
      v4: agd5f: add warning if safe reg check fails for copy_dw
      
      v5: agd5f: add stricter checking for 6xx/7xx
      
      v6: agd5f: add range checking for copy_dw on eg+,
      add sx_surface_sync to safe reg list for 7xx.
      
      v7: agd5f: add stricter checking for eg+
      Signed-off-by: default avatarMarek Olšák <maraeo@gmail.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
      dd220a00