- 03 Apr, 2023 5 commits
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Marek Vasut authored
The VS signal change is synchronized to HS signal change, start the info graphics with that event, instead of having that event occur in the middle of it. Scope trace of DPI bus with HS/VS active HIGH looks as follows: ________________...__ VS...___/__ __ \______... HS...___/ \_______/ \__...__/ \___... ^ ^ | | | Used to start here -' | '--- Start info graphics here Signed-off-by:Marek Vasut <marex@denx.de> Reviewed-by:
Sam Ravnborg <sam@ravnborg.org> Acked-by:
Rob Herring <robh@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230221200407.16531-1-marex@denx.de
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Marek Vasut authored
The TC358767/TC358867/TC9595 are capable of DSI burst mode, which is more energy efficient than the non-burst modes. Make use of it. The TC358767/TC358867/TC9595 are capable of DSI non-continuous clock, since it sources the internal PLL clock from external clock source. The DSI non-continuous clock further reduces power utilization. The TC358767/TC358867/TC9595 may use DSI LPM for command transmissions, make sure this is configured correctly in the DSI mode flags. Signed-off-by:
Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20221016003632.406468-1-marex@denx.de
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Simon Ser authored
We don't populate drm_driver.gem_prime_import_sg_table so only DMA-BUFs exported from our own device can be imported. We don't populate drm_gem_object_funcs.get_sg_table so DMA-BUFs cannot be imported into another device. Still, this is useful to user-space to share buffers between processes and between API boundaries (e.g. wlroots hard-requires PRIME import/export support). v2: expand commit message Signed-off-by:
Simon Ser <contact@emersion.fr> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Tian Tao <tiantao6@hisilicon.com> Cc: Maxime Ripard <maxime@cerno.tech> Cc: Hans de Goede <hdegoede@redhat.com> Acked-by:
Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by:
Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230302143502.500661-2-contact@emersion.fr
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Simon Ser authored
drm_gem_map_dma_buf() requires drm_gem_object_funcs.get_sg_table to be implemented, or else WARNs. Allow drivers to leave this hook unimplemented to implement purely local DMA-BUFs (ie, DMA-BUFs which cannot be imported anywhere else but the device which allocated them). In that case, reject imports to other devices in drm_gem_map_attach(). v2: new patch v3: use ENOSYS Signed-off-by:
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Francesco Dolcini authored
LT8912 DSI port supports only Non-Burst mode video operation with Sync Events and continuous clock on clock lane, correct dsi mode flags according to that removing MIPI_DSI_MODE_VIDEO_BURST flag. Cc: <stable@vger.kernel.org> Fixes: 30e2ae94 ("drm/bridge: Introduce LT8912B DSI to HDMI bridge") Signed-off-by:
Francesco Dolcini <francesco.dolcini@toradex.com> Reviewed-by:
Robert Foss <rfoss@kernel.org> Signed-off-by:
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- 02 Apr, 2023 4 commits
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Erico Nunes authored
This exposes an accumulated active time per client via the fdinfo infrastructure per execution engine, following Documentation/gpu/drm-usage-stats.rst. In lima, the exposed execution engines are gp and pp. Signed-off-by:
Erico Nunes <nunes.erico@gmail.com> Signed-off-by:
Qiang Yu <yuq825@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230312233052.21095-4-nunes.erico@gmail.com
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Erico Nunes authored
To track if fds are pointing to the same execution context and export the expected information to fdinfo, similar to what is done in other drivers. Signed-off-by:
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Erico Nunes authored
lima maintains a context manager per drm_file, similar to amdgpu. In order to account for the complete usage per drm_file, all of the associated contexts need to be considered. Previously released contexts also need to be accounted for but their drm_sched_entity info is gone once they get released, so account for it in the ctx_mgr. Signed-off-by:
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Harshit Mogalapalli authored
Smatch reports: drivers/gpu/drm/lima/lima_drv.c:396 lima_pdev_probe() warn: missing unwind goto? Store return value in err and goto 'err_out0' which has lima_sched_slab_fini() before returning. Fixes: a1d2a633 ("drm/lima: driver for ARM Mali4xx GPUs") Signed-off-by:
Harshit Mogalapalli <harshit.m.mogalapalli@oracle.com> Signed-off-by:
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- 31 Mar, 2023 7 commits
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Krzysztof Kozlowski authored
Panels are supposed to have one port (defined in panel-common.yaml binding) and can have also rotation: rk3326-odroid-go3.dtb: panel@0: 'port', 'rotation' do not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by:
Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by:
Jagan Teki <jagan@amarulasolutions.com> Link: https://lore.kernel.org/r/20230326204224.80181-4-krzysztof.kozlowski@linaro.orgSigned-off-by:
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Krzysztof Kozlowski authored
Panels are supposed to have one port (defined in panel-common.yaml binding) and can have also rotation: rk3326-odroid-go2.dtb: panel@0: 'port', 'rotation' do not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by:
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Krzysztof Kozlowski authored
Panels are supposed to have one port (defined in panel-common.yaml binding): rk3399-rockpro64.dtb: panel@0: 'port' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by:
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Krzysztof Kozlowski authored
Panels are supposed to have one port (defined in panel-common.yaml binding): px30-evb.dtb: panel@0: 'port' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by:
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Krzysztof Kozlowski authored
The device comes with DCX pin which is already used in canaan/sipeed_maixduino.dts (although not in Linux driver). Signed-off-by:
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AngeloGioacchino Del Regno authored
Some SoCs implementing ARM Mali GPUs are subject to speed binning: this means that some versions of the same SoC model may need to be limited to a slower frequency compared to the other: this is being addressed by reading nvmem (usually, an eFuse array) containing a number that identifies the speed binning of the chip, which is usually related to silicon quality. To address such situation, add basic support for reading the speed-bin through nvmem, as to make it possible to specify the supported hardware in the OPP table for GPUs. This commit also keeps compatibility with any platform that does not specify (and does not even support) speed-binning. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by:
Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by:
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AngeloGioacchino Del Regno authored
Some SoCs implementing ARM Mali GPUs may be subject to speed binning and the usable bin is read from nvmem: document the addition of nvmem and nvmem-cells for 'speed-bin'. Signed-off-by:
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- 30 Mar, 2023 3 commits
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Rob Herring authored
It is preferred to use typed property access functions (i.e. of_property_read_<type> functions) rather than low-level of_get_property/of_find_property functions for reading properties. Convert reading boolean properties to of_property_read_bool(). Reviewed-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20230310144706.1542295-1-robh@kernel.orgSigned-off-by:
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Fabio Estevam authored
Marco's NXP email is no longer valid. Marco told me offline that he has no interest to be listed as the maintainer contact for this binding, so add my contact. Signed-off-by:
Fabio Estevam <festevam@denx.de> Acked-by:
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Maarten Lankhorst authored
Backmerge to get rc4. Signed-off-by:Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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- 29 Mar, 2023 8 commits
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Krzysztof Kozlowski authored
Allow 'rotation' property (coming from panel-common.yaml) already used in DTS: sc7180-trogdor-quackingstick-r0.dtb: panel@0: 'rotation' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by:
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Krzysztof Kozlowski authored
Panels are supposed to have one reg. This fixes dtbs_check warnings like: sc7180-idp.dtb: panel@0: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by:
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Krzysztof Kozlowski authored
Panels are supposed to have one port (coming from panel-common.yaml binding): msm8916-samsung-a3u-eur.dtb: panel@0: 'port' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by:
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Krzysztof Kozlowski authored
Few panels like Samsung s6e3fc2x01 and sofef00 use vddio-supply instead of power-supply (in DTS and Linux driver), so allow it to fix: sdm845-oneplus-enchilada.dtb: panel@0: 'power-supply' is a required property Signed-off-by:
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Krzysztof Kozlowski authored
The nt36672a bindings were added with a mistake on VDDIO supply calling it in one place vddio and in other vddi0. Typical name is rather vddio which is also now used by DTS (sdm845-xiaomi-beryllium-common.dtsi) and Linux driver. Fixes: c2abcf30 ("dt-bindings: display: novatek,nt36672a: Fix unevaluated properties warning") Fixes: 9528a024 ("dt-bindings: display: panel: Add bindings for Novatek nt36672a") Signed-off-by:
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Krzysztof Kozlowski authored
There is nothing special in Innolux p120zdg-bf1 panel, so just like other Innolux panels it can be made part of panel-simple. Signed-off-by:
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Daniel Vetter authored
I just landed the fence deadline PR from Rob that a bunch of drivers want/need to apply driver-specific patches. Backmerge -rc4 so that they don't have to be stuck on -rc2 for no reason at all. Signed-off-by:Daniel Vetter <daniel.vetter@ffwll.ch>
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https://gitlab.freedesktop.org/drm/msmDaniel Vetter authored
This series adds a deadline hint to fences, so realtime deadlines such as vblank can be communicated to the fence signaller for power/ frequency management decisions. This is partially inspired by a trick i915 does, but implemented via dma-fence for a couple of reasons: 1) To continue to be able to use the atomic helpers 2) To support cases where display and gpu are different drivers See https://patchwork.freedesktop.org/series/93035/ This does not yet add any UAPI, although this will be needed in a number of cases: 1) Workloads "ping-ponging" between CPU and GPU, where we don't want the GPU freq governor to interpret time stalled waiting for GPU as "idle" time 2) Cases where the compositor is waiting for fences to be signaled before issuing the atomic ioctl, for example to maintain 60fps cursor updates even when the GPU is not able to maintain that framerate. Signed-off-by:
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- 28 Mar, 2023 13 commits
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Rob Clark authored
For an atomic commit updating a single CRTC (ie. a pageflip) calculate the next vblank time, and inform the fence(s) of that deadline. v2: Comment typo fix (danvet) v3: If there are multiple CRTCs, consider the time of the soonest vblank Signed-off-by:
Rob Clark <robdclark@chromium.org> Reviewed-by:
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Rob Clark authored
Will be used in the next commit to set a deadline on fences that an atomic update is waiting on. v2: Calculate time at *start* of vblank period, not end v3: Fix kbuild complaints Signed-off-by:
Mario Kleiner <mario.kleiner.de@gmail.com>
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Rob Clark authored
As the finished fence is the one that is exposed to userspace, and therefore the one that other operations, like atomic update, would block on, we need to propagate the deadline from from the finished fence to the actual hw fence. v2: Split into drm_sched_fence_set_parent() (ckoenig) v3: Ensure a thread calling drm_sched_fence_set_deadline_finished() sees fence->parent set before drm_sched_fence_set_parent() does this test_bit(DMA_FENCE_FLAG_HAS_DEADLINE_BIT). Signed-off-by:Luben Tuikov <luben.tuikov@amd.com>
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Rob Clark authored
We had all of the internal driver APIs, but not the all important userspace uABI, in the dma-buf doc. Fix that. And re-arrange the comments slightly as otherwise the comments for the ioctl nr defines would not show up. v2: Fix docs build warning coming from newly including the uabi header in the docs build Signed-off-by:Pekka Paalanen <pekka.paalanen@collabora.com>
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Rob Clark authored
Add a way to set a deadline on remaining resv fences according to the requested usage. Signed-off-by:
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Rob Clark authored
Propagate the deadline to all the fences in the chain. v2: Use dma_fence_chain_contained [Tvrtko] Signed-off-by:
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Rob Herring authored
It is preferred to use typed property access functions (i.e. of_property_read_<type> functions) rather than low-level of_get_property/of_find_property functions for reading properties. As part of this, convert of_get_property/of_find_property calls to the recently added of_property_present() helper when we just want to test for presence of a property and nothing more. Reviewed-by:
Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Liu Ying <victor.liu@nxp.com> # i.MX bridge Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
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Daniel Vetter authored
Merge tag 'exynos-drm-next-for-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next A patch series for moving MIPI-DSI driver for Exynos DRM to drm/bridge directory so that I.MX SoC family can also share the same device driver. Samsung MIPI DSIM device is a common IP that can be used by Exynos and I.MX8M Mini/Nano/Plus SoC. Regarding this, this patch series has added several things below to existing MIPI DSI driver, - Add exynos_dsi_type enum type to provide controller data from different platforms. - Add two pipeline detection ways support - existing Exynos DSI child node and I.MX family of-graph port or ports. - Consider component and bridged based DRM drivers. - Add device tree binding support of I.MX family. Signed-off-by:
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Marek Vasut authored
Add extras to support i.MX8M Plus. The main change is the removal of HS/VS/DE signal inversion in the LCDIFv3-DSIM glue logic, otherwise the implementation of this IP in i.MX8M Plus is very much compatible with the i.MX8M Mini/Nano one. Reviewed-by:
Frieder Schrempf <frieder.schrempf@kontron.de> Acked-by:
Robert Foss <robert.foss@linaro.org> Signed-off-by:
Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by:
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Jagan Teki authored
Samsung MIPI DSIM bridge can also be found in i.MX8M Plus SoC. Add dt-bingings for it. Reviewed-by:
Inki Dae <inki.dae@samsung.com>
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Jagan Teki authored
Samsung MIPI DSIM master can also be found in i.MX8M Mini/Nano SoC. Add compatible and associated driver_data for it. Reviewed-by:
Adam Ford <aford173@gmail.com> Tested-by:
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Jagan Teki authored
Samsung MIPI DSIM bridge can also be found in i.MX8M Mini/Nano SoC. Add dt-bingings for it. Reviewed-by:
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Jagan Teki authored
Samsung MIPI DSIM controller is common DSI IP that can be used in various SoCs like Exynos, i.MX8M Mini/Nano. In order to access this DSI controller between various platform SoCs, the ideal way to incorporate this in the drm stack is via the drm bridge driver. We already have a consolidated code for supporting component and bridge based DRM drivers, so keep the exynos component based code in existing exynos_drm_dsi.c and move generic bridge code as part of samsung-dsim.c Tested-by:
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