- 26 Sep, 2017 40 commits
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Leon Elazar authored
Signed-off-by:
Leon Elazar <leon.elazar@amd.com> Reviewed-by:
Tony Cheng <Tony.Cheng@amd.com> Acked-by:
Harry Wentland <Harry.Wentland@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Dmytro Laktyushkin authored
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Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by:
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Anthony Koo authored
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Anthony Koo <anthony.koo@amd.com> Reviewed-by:
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Anthony Koo authored
Fix problem with loading IRAM Signed-off-by:
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Dmytro Laktyushkin authored
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Anthony Koo authored
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Aric Cyr <Aric.Cyr@amd.com> Acked-by:
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Anthony Koo authored
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Yongqiang Sun authored
Power off plane clear all the reg values includes cursor. When OS call set cursor position, cursor address reg is cleared, results in system hard hang. Signed-off-by:
Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by:
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Leon Elazar authored
Fixes: 1. Removing pending flag since we are executing teh entire flow without context switches 2. Adding stream enablment - connection between DIG BE to DIG FE during test link training Signed-off-by:
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Yongqiang Sun authored
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Anthony Koo authored
1. Fix init of integer 2. Fix mixed declarations Signed-off-by:
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Andrey Grodzovsky authored
This parameter name is misleading. It's previous meaning confuses with ASYNC (immidiate flip) which is totatlly different thing then nonblocking commit. Signed-off-by:
Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by:
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Harry Wentland authored
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Dmytro Laktyushkin authored
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Amy Zhang authored
- Remove mixed declarations and unused variables Signed-off-by:
Amy Zhang <Amy.Zhang@amd.com> Reviewed-by:
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Tony Cheng authored
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Yongqiang Sun authored
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Hersen Wu authored
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Hersen Wu <hersenxs.wu@amd.com> Reviewed-by:
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Tony Cheng authored
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Tony Cheng authored
- reuse existing helper functions - helper function to make it more obvious which cases we can do optimize programming Signed-off-by:
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Tony Cheng authored
- make failure status obvious Signed-off-by:
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Dmytro Laktyushkin authored
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Yongqiang Sun authored
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Joshua Aberback authored
- refactor opp_destroy functions to dce common file - fixes memory leak, dce specific variations didn't free regamma_params - remove unused dce110_regamma structure Signed-off-by:
Joshua Aberback <Joshua.Aberback@amd.com> Reviewed-by:
Jun Lei <Jun.Lei@amd.com> Acked-by:
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Leon Elazar authored
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Harry Wentland authored
They're not used anywhere Signed-off-by:
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Harry Wentland authored
Signed-off-by:
Jordan Lazare <Jordan.Lazare@amd.com> Reviewed-by:
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Dmytro Laktyushkin authored
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Andrey Grodzovsky authored
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Andrey Grodzovsky authored
Switch from VUPDATE to VBLANK. Signed-off-by:
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Andrey Grodzovsky authored
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Leon Elazar authored
This will fix the memory Input programing with MST tiled display. This Fix should fix connectivity problems with MST tiled Display Signed-off-by:
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Zeyu Fan authored
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Zeyu Fan <Zeyu.Fan@amd.com> Acked-by:
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Tony Cheng authored
DC actually support ABGR8888 instead of BGRA8888 (R/B swap rather than endian swap) , rename to avoid confusion Signed-off-by:
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Dmytro Laktyushkin authored
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Tony Cheng authored
- not all DCE has PHYPLLA_PIXCLK_DOUBLE_RATE_ENABLE bit defined. Signed-off-by:
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Amy Zhang authored
- Made sure dest color space is updated in stream and info frame - Optimized segment distribution algorithm for regamma mapping Signed-off-by:
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Amy Zhang authored
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Tony Cheng authored
also refactor to clean reduce loc to achieve same logic Signed-off-by:
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Tony Cheng authored
- these are moved to color module Signed-off-by:
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