- 02 Oct, 2015 36 commits
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Ludovic Desroches authored
Use irq_set_handler_locked() as it avoids a redundant lookup of the irq descriptor. Signed-off-by:
Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Adrian Alonso authored
Add iomuxc-lpsr devicetree bindings documentation Provide documentation context as well an example on pheriperals that could use pad from either iomuxc controller supported by iMX7D SoC Signed-off-by:
Adrian Alonso <aalonso@freescale.com> Acked-by:
Shawn Guo <shawnguo@kernel.org> Signed-off-by:
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Adrian Alonso authored
iMX7D has two iomuxc controllers, iomuxc controller similar as previous iMX SoC generation and iomuxc-lpsr which provides low power state rentetion capabilities on gpios that are part of iomuxc-lpsr Add iomuxc-lpsr gpio group id's Signed-off-by:
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Adrian Alonso authored
- Add shared input select register support - imx7d has two iomux controllers iomuxc and iomuxc-lpsr which share select_input register for daisy chain settings Signed-off-by:
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Adrian Alonso authored
Allow mux_reg offset zero to be a valid pin_id, on imx7d mux_conf reg offset is zero for iomuxc-lspr controller Signed-off-by:
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Robin Gong authored
Fix system chrash caused by groups whose number is smaller than the number of groups of the last pinctl instance which is not initialized. iMX7D supports two iomux controllers (iomuxc-lpsr and iomuxc) on probing the second instance (iomuxc) the chrash below occurs. Uncompressing Linux... done, booting the kernel. [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Linux version 4.2.0-next-20150901-00006-gebfa43c (aalonso@bluefly) [ 0.000000] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7) [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasin instruction cache [ 0.000000] Machine model: Freescale i.MX7 SabreSD Board [ 0.661012] [<802a6cb0>] (strcmp) from [<802cc80c>] (imx_dt_node_to_map+0x58/0x208) [ 0.668879] [<802cc80c>] (imx_dt_node_to_map) from [<802cbe24>] (pinctrl_dt_to_map+0x174/0x2b0) [ 0.677654] [<802cbe24>] (pinctrl_dt_to_map) from [<802c8f18>] (pinctrl_get+0x100/0x424) [ 0.685878] [<802c8f18>] (pinctrl_get) from [<802c9510>] (pinctrl_register+0x26c/0x480) [ 0.694104] [<802c9510>] (pinctrl_register) from [<802ccf3c>] (imx_pinctrl_probe+0x580/0x6e8) [ 0.702706] [<802ccf3c>] (imx_pinctrl_probe) from [<80351b58>] (platform_drv_probe+0x44/0xa4) [ 0.711455] [<80351b58>] (platform_drv_probe) from [<803503ec>] (driver_probe_device+0x174/0x2b4) [ 0.720405] [<803503ec>] (driver_probe_device) from [<803505fc>] (__driver_attach+0x8c/0x90) [ 0.728982] [<803505fc>] (__driver_attach) from [<8034e930>] (bus_for_each_dev+0x6c/0xa0) [ 0.737381] [<8034e930>] (bus_for_each_dev) from [<8034fb88>] (bus_add_driver+0x148/0x1f0) [ 0.745804] [<8034fb88>] (bus_add_driver) from [<80350c00>] (driver_register+0x78/0xf8) [ 0.753880] [<80350c00>] (driver_register) from [<800097d0>] (do_one_initcall+0x8c/0x1d4) [ 0.762282] [<800097d0>] (do_one_initcall) from [<80987dac>] (kernel_init_freeable+0x144/0x1e4) [ 0.771061] [<80987dac>] (kernel_init_freeable) from [<806d9c7c>] (kernel_init+0x8/0xe8) [ 0.779285] [<806d9c7c>] (kernel_init) from [<8000f628>] (ret_from_fork+0x14/0x2c) [ 0.786981] Code: e3520000 e5e32001 1afffffb e12fff1e (e4d03001) Signed-off-by:
Robin Gong <b38343@freescale.com> Signed-off-by:
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Ludovic Desroches authored
Allow GPIOs to be configured as wakeup sources. When going to suspend, disable all GPIO irqs excepting the one configured as wakeup sources. Signed-off-by:
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Vishnu Patekar authored
Allwinner A83T soc port controller has 8 ports. It has 3 IRQ banks namely PB, PG, PH. Pinmuxing are different for some pins as compared to sun8i A23 and A33. Signed-off-by:
Vishnu Patekar <vishnupatekar0510@gmail.com> Acked-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by:
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Masahiro Yamada authored
Add SD card pinmux settings for PH1-LD4, PH1-Pro4, PH1-sLD8, PH1-Pro5, ProXstream2, and PH1-LD6b SoCs. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by:
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Javier Martinez Canillas authored
It's not needed an is just creating a null statement, so remove it. Signed-off-by:
Javier Martinez Canillas <javier@osg.samsung.com> Reviewed-by:
Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by:
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Javier Martinez Canillas authored
It's not needed an is just creating a null statement, so remove it. Signed-off-by:
Hongzhou Yang <hongzhou.yang@mediatek.com> Signed-off-by:
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Javier Martinez Canillas authored
It's not needed an is just creating a null statement, so remove it. Signed-off-by:
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Javier Martinez Canillas authored
It's not needed an is just creating a null statement, so remove it. Signed-off-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by:
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Javier Martinez Canillas authored
They aren't needed and are just creating null statements so remove it. Signed-off-by:
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Javier Martinez Canillas authored
They aren't needed and are just creating null statements so remove it. Signed-off-by:
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Linus Walleij authored
Merge branch 'sh-pfc-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
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Takeshi Kihara authored
This patch adds EthernetAVB Based on a much lager patch by Takeshi Kihara which was originally posted by Kuninori Morimoto. Signed-off-by:
Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by:
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> [horms: extracted from a larger patch; corrected swapped {MATCH,CAPTURE_A} pins] Signed-off-by:
Simon Horman <horms+renesas@verge.net.au> Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by:
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Kuninori Morimoto authored
Signed-off-by:
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Kuninori Morimoto authored
Signed-off-by:
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Kuninori Morimoto authored
Signed-off-by:
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Geert Uytterhoeven authored
This patch adds SCIF0/1/2/3/4/5 Signed-off-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by:
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Takeshi Kihara authored
Add PFC base support for the R8A7795 SoC. Signed-off-by:
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Kuninori Morimoto authored
Now, all PINMUX_IPSR_MODSEL_DATA() are replased to PINMUX_IPSR_MSEL() Let's remove unused PINMUX_IPSR_MODSEL_DATA() Signed-off-by:
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Kuninori Morimoto authored
Now, PINMUX_IPSR_MSEL() and PINMUX_IPSR_MODSEL_DATA() are same. Current PFC driver is very difficult to read, because macro names are using different length. PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) PINMUX_IPSR_MODSEL_DATA(ipsr, ...) It can be readable if we can use PINMUX_IPSR_MSEL() instead of PINMUX_IPSR_MODSEL_DATA() PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) Signed-off-by:
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Kuninori Morimoto authored
Now, PINMUX_IPSR_MSEL() and PINMUX_IPSR_MODSEL_DATA() are same. Current PFC driver is very difficult to read, because macro names are using different length. PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) PINMUX_IPSR_MODSEL_DATA(ipsr, ...) It can be readable if we can use PINMUX_IPSR_MSEL() instead of PINMUX_IPSR_MODSEL_DATA() PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) Signed-off-by:
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Kuninori Morimoto authored
Now, PINMUX_IPSR_MSEL() and PINMUX_IPSR_MODSEL_DATA() are same. Current PFC driver is very difficult to read, because macro names are using different length. PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) PINMUX_IPSR_MODSEL_DATA(ipsr, ...) It can be readable if we can use PINMUX_IPSR_MSEL() instead of PINMUX_IPSR_MODSEL_DATA() PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) Signed-off-by:
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Kuninori Morimoto authored
Now, PINMUX_IPSR_MSEL() and PINMUX_IPSR_MODSEL_DATA() are same. Current PFC driver is very difficult to read, because macro names are using different length. PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) PINMUX_IPSR_MODSEL_DATA(ipsr, ...) It can be readable if we can use PINMUX_IPSR_MSEL() instead of PINMUX_IPSR_MODSEL_DATA() PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) Signed-off-by:
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Kuninori Morimoto authored
Now, PINMUX_IPSR_MSEL() and PINMUX_IPSR_MODSEL_DATA() are same. Current PFC driver is very difficult to read, because macro names are using different length. PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) PINMUX_IPSR_MODSEL_DATA(ipsr, ...) It can be readable if we can use PINMUX_IPSR_MSEL() instead of PINMUX_IPSR_MODSEL_DATA() PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) Signed-off-by:
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Kuninori Morimoto authored
The difference between PINMUX_IPSR_MSEL() and PINMUX_IPSR_MODSEL_DATA() are FN_xxx order, and PINMUX_IPSR_MSEL() is used only from r8a7778. Now it r8a7778 works correctly with PINMUX_IPSR_MODSEL_DATA() order. This means we can merge PINMUX_IPSR_MSEL() and PINMUX_IPSR_MODSEL_DATA(). Current PFC driver is very difficult to read, because macro names are using different length. Especially PINMUX_IPSR_MODSEL_DATA() is well used macro PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) PINMUX_IPSR_MODSEL_DATA(ipsr, ...) It can be readable if we can merge PINMUX_IPSR_MSEL() and PINMUX_IPSR_MODSEL_DATA() PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) Signed-off-by:
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Laurent Pinchart authored
Now that all ARM-based Renesas SoCs use multiplatform kernels only the hardcoded IRQ numbers can be dropped as they're dynamically allocated. Signed-off-by:
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by:
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Geert Uytterhoeven authored
Shmobile is all multiplatform these days, so get rid of the reference to CONFIG_ARCH_SHMOBILE_LEGACY. Move the legacy code to do the non-DT mapping between GPIOs and pins inside the existing #ifdef CONFIG_SUPERH section. Signed-off-by:
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Geert Uytterhoeven authored
When using serial port SCIFB1_B, transmit works, but nothing is received. Receive fails because the SCIFB1_SCK_B settings configure the wrong value for the sel_scifb1 field in the Module Select Register (MOD_SEL), due to an ambiguity in the R-Car M2-W and M2-N datasheets. Tested on r8a7791/koelsch using pins 53 (TXD) and 72 (RXD) on EXIO Connector A. Signed-off-by:
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Geert Uytterhoeven authored
SCIF0 on R-Car E2 does not have an SCK pin. "SCIF_CLK" is the (H)SCIF baud rate generation clock pin, which is not yet supported. Signed-off-by:
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Geert Uytterhoeven authored
Legacy function GPIOs are no longer used on ARM since commit a27c5cd1 ("sh-pfc: sh73a0: Remove function GPIOs"). Extract its setup code into a separate function, and make all function GPIO related code and data depend on CONFIG_SUPERH. Signed-off-by:
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Geert Uytterhoeven authored
gpio_chip.free() is optional, and can just be left unimplemented. Signed-off-by:
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Geert Uytterhoeven authored
On platforms where the PFC/GPIO controller is instantiated from DT, the mapping between GPIOs and pins is set up using the "gpio-ranges" property in DT. Hence stop setting up the mapping from C code on DT platforms. This code is still used for SH or ARM-legacy platforms. Signed-off-by:
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- 25 Sep, 2015 2 commits
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Javier Martinez Canillas authored
The mediatek pinctrl driver uses the BIT() macro instead of open coding 1 << n in all but one place. Replace this occurrence with the BIT() macro for consistency. Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by:
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Xing Zheng authored
Many parts of pinctrl rk3036 are similar to rk2928's. Signed-off-by:
Xing Zheng <zhengxing@rock-chips.com> Reviewed-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
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- 21 Sep, 2015 2 commits
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Ludovic Desroches authored
Add pio4 controller node to enable pinmux and gpio. Signed-off-by:
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Ludovic Desroches authored
Add an entry for the Atmel PIO4 controller driver. Signed-off-by:
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