- 17 Dec, 2023 33 commits
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Luca Weiss authored
The bindings for sc7280-mpss-pas neither expects a second reg nor a reg-names property, which is only required by the sc7280-mss-pil bindings. Move it to sc7280-herobrine-lte-sku.dtsi, the only place where that other compatible is used. Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20231208-sc7280-remoteprocs-v3-2-6aa394d33edf@fairphone.comSigned-off-by:
Bjorn Andersson <andersson@kernel.org>
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Richard Acayan authored
The Snapdragon 670 has a display subsystem for controlling and outputting to the display. Add support for it in the device tree. Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
Richard Acayan <mailingradian@gmail.com> Link: https://lore.kernel.org/r/20231017021805.1083350-15-mailingradian@gmail.comSigned-off-by:
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Dmitry Baryshkov authored
Enable the USB-C related functionality for the USB-C port on this board. This includes OTG, PowerDelivery and DP AltMode. Also enable the DisplayPort itself. Signed-off-by:
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Dmitry Baryshkov authored
Expand first USB host controller device node with the OF ports required to support USB-C / DisplayPort switching. Signed-off-by:
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Dmitry Baryshkov authored
Expand Combo USB+DP QMP PHY device node with the OF ports required to support USB-C / DisplayPort switching. Signed-off-by:
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Dmitry Baryshkov authored
Add device tree node for the DisplayPort controller and link it to the display controller interface. Signed-off-by:
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Dmitry Baryshkov authored
The SM8150-HDK uses two different regulators to power up SuperSpeed USB PHYs. The L5A regulator is used for the second USB host, while the first (OTG) USB host uses different regulator, L18A. Fix the regulator for the usb_1 QMPPHY and (to remove possible confusion) drop the usb_ss_dp_core_1/_2 labels. Fixes: 0ab1b2d1 ("arm64: dts: qcom: add sm8150 hdk dts") Reviewed-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by:
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Dmitry Baryshkov authored
Add DSI outputs and link them to the onboard Lontium LT9611 DSI-to-HDMI bridge, enabling HDMI output on this board. While adding the display resources, also drop the headless ("amd,imageon") compat string from the GPU node, since the board now has output. Signed-off-by: -
Dmitry Baryshkov authored
Add required-opps property to the display clock controller. This makes it cast minimal vote on the MMCX lane and prevents further 'clock stuck' errors when enabling the display. Fixes: 2ef3bb17 ("arm64: dts: qcom: sm8150: Add DISPCC node") Acked-by:
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Neil Armstrong authored
Add the missing aDSP and cDSP fastrpc compute-cb nodes for the SM8650 SoC. Fixes: 10e02467 ("arm64: dts: qcom: sm8650: add interconnect dependent device nodes") Signed-off-by:
Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by:
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Fenglin Wu authored
Add PM8010 regulator device nodes for sm8550-qrd board. Reviewed-by:
Fenglin Wu <quic_fenglinw@quicinc.com> Link: https://lore.kernel.org/r/20231215-pm8010-regulator-v3-2-1bfc4b7ee5ab@quicinc.comSigned-off-by:
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Fenglin Wu authored
Add PM8010 regulator device nodes for sm8550-mtp board. Reviewed-by:
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Konrad Dybcio authored
Wire up MPM and the interrupts it provides. Signed-off-by:
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Konrad Dybcio authored
Wire up MPM and the interrupts it provides. Signed-off-by:
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Konrad Dybcio authored
Add a node for MPM and wire it up on consumers that use it. This also fixes a very bad and sad assumption I made when initially porting this SoC that the downstream MPM-TLMM mappings were 1-1. That apparently changed some time ago, so with this patch the MPM consumers will actually be hooked up to the correct interrupt lines. Fixes: 59d34ca9 ("arm64: dts: qcom: Add initial device tree for SM6375") Signed-off-by:
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André Apitzsch authored
Document the compatible for the MSM8926-based Motorola Moto G 4G smartphone released in 2013. Acked-by:
André Apitzsch <git@apitzsch.eu> Link: https://lore.kernel.org/r/20231214-peregrine-v2-1-a35102268442@apitzsch.euSigned-off-by:
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Abel Vesa authored
The LDOs 1, 4 and 10 from PM8550 share the same supply, the SMPS 4 from PM8550ve. This needs to be done through shared supply approach otherwise the bindings check fails. Fixes: bd50b1f5 ("arm64: dts: qcom: x1e80100: Add Compute Reference Device") Signed-off-by:
Abel Vesa <abel.vesa@linaro.org> Reviewed-by:
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Om Prakash Singh authored
Add the QCE and Crypto BAM DMA nodes. Signed-off-by:
Om Prakash Singh <quic_omprsing@quicinc.com> Link: https://lore.kernel.org/r/20231214103600.2613988-3-quic_omprsing@quicinc.comSigned-off-by:
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Douglas Anderson authored
Pompom has several sources for its panel. Let's switch it to the generic edp-panel compatible string to account for this. This fixes a problem where the panel wouldn't come up on some pompon devices after commit fb3f43d5 ("drm/panel-edp: Avoid adding multiple preferred modes"). Specifically, some models of pompom have a 1920x1080 panel which is _very_ different than the 1366x768 panel specified in the dts. Before the recent panel-edp fix on Linux things kinda/sorta worked because the panel-edp driver would include both the hardcoded and probed mode, AKA: * #0 1920x1080 60.00 1920 1944 1960 2000 1080 1083 1088 1111 133320 flags: nhsync, nvsync; type: preferred, driver * #1 1366x768 60.00 1366 1406 1438 1500 768 773 778 900 81000 flags: nhsync, nvsync; type: preferred, driver ...and, at least on ChromeOS, the userspace was consistently picking the first mode even though both were marked as "preferred". Now that the Linux driver is fixed we only get the hardcoded mode. That means we end up trying to drive a 1920x1080 panel at 1366x768 and it doesn't work so well. Let's switch over to the generic panel-edp. Fixes: fb3f43d5 ("drm/panel-edp: Avoid adding multiple preferred modes") Signed-off-by:
Douglas Anderson <dianders@chromium.org> Reviewed-by:
Stephen Boyd <swboyd@chromium.org> Acked-by:
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Johan Hovold authored
The USB SS PHY interrupts need to be provided by the PDC interrupt controller in order to be able to wake the system up from low-power states. Fixes: 0c9dde0d ("arm64: dts: qcom: sm8150: Add secondary USB and PHY nodes") Fixes: b33d2868 ("arm64: dts: qcom: sm8150: Add USB and PHY device nodes") Cc: stable@vger.kernel.org # 5.10 Cc: Jack Pham <quic_jackp@quicinc.com> Cc: Jonathan Marek <jonathan@marek.ca> Signed-off-by:
Johan Hovold <johan+linaro@kernel.org> Reviewed-by:
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Johan Hovold authored
The USB DP/DM HS PHY interrupts need to be provided by the PDC interrupt controller in order to be able to wake the system up from low-power states and to be able to detect disconnect events, which requires triggering on falling edges. A recent commit updated the trigger type but failed to change the interrupt provider as required. This leads to the current Linux driver failing to probe instead of printing an error during suspend and USB wakeup not working as intended. Fixes: 54524b69 ("arm64: dts: qcom: sm8150: fix USB wakeup interrupt types") Fixes: 0c9dde0d ("arm64: dts: qcom: sm8150: Add secondary USB and PHY nodes") Fixes: b33d2868 ("arm64: dts: qcom: sm8150: Add USB and PHY device nodes") Cc: stable@vger.kernel.org # 5.10 Cc: Jack Pham <quic_jackp@quicinc.com> Cc: Jonathan Marek <jonathan@marek.ca> Signed-off-by:
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Johan Hovold authored
The USB SS PHY interrupts need to be provided by the PDC interrupt controller in order to be able to wake the system up from low-power states. Fixes: ca4db2b5 ("arm64: dts: qcom: sdm845: Add USB-related nodes") Cc: stable@vger.kernel.org # 4.20 Signed-off-by:
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Johan Hovold authored
The USB DP/DM HS PHY interrupts need to be provided by the PDC interrupt controller in order to be able to wake the system up from low-power states and to be able to detect disconnect events, which requires triggering on falling edges. A recent commit updated the trigger type but failed to change the interrupt provider as required. This leads to the current Linux driver failing to probe instead of printing an error during suspend and USB wakeup not working as intended. Fixes: 84ad9ac8 ("arm64: dts: qcom: sdm845: fix USB wakeup interrupt types") Fixes: ca4db2b5 ("arm64: dts: qcom: sdm845: Add USB-related nodes") Cc: stable@vger.kernel.org # 4.20 Signed-off-by:
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Johan Hovold authored
The USB DP/DM HS PHY interrupts need to be provided by the PDC interrupt controller in order to be able to wake the system up from low-power states and to be able to detect disconnect events, which requires triggering on falling edges. A recent commit updated the trigger type but failed to change the interrupt provider as required. This leads to the current Linux driver failing to probe instead of printing an error during suspend and USB wakeup not working as intended. Fixes: 0dc0f6da ("arm64: dts: qcom: sc8180x: fix USB wakeup interrupt types") Fixes: b080f53a ("arm64: dts: qcom: sc8180x: Add remoteprocs, wifi and usb nodes") Cc: stable@vger.kernel.org # 6.5 Cc: Vinod Koul <vkoul@kernel.org> Reported-by:
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Krzysztof Kozlowski authored
The MCLK clocks of codec macros have fixed 19.2 MHz frequency and assigning clock rates is redundant. Signed-off-by:
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Krzysztof Kozlowski authored
Pin configuration for Soundwire bus should be set in Soundwire controller nodes, not in the associated macro codec node. This placement change should not have big impact in general, because macro codec is a clock provider for Soundwire controller, thus its devices is probed first. However it will have impact for disabled Soundwire buses, e.g. WSA2, because after this change the pins will be left in default state. We also follow similar approach in newer SoCs, like Qualcomm SM8650. Signed-off-by:
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Krzysztof Kozlowski authored
The MCLK clocks of codec macros have fixed 19.2 MHz frequency and assigning clock rates is redundant. Signed-off-by:
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Krzysztof Kozlowski authored
Pin configuration for Soundwire bus should be set in Soundwire controller nodes, not in the associated macro codec node. This placement change should not have big impact in general, because macro codec is a clock provider for Soundwire controller, thus its devices is probed first. However it will have impact for disabled Soundwire buses, e.g. WSA2, because after this change the pins will be left in default state. We also follow similar approach in newer SoCs, like Qualcomm SM8650. Signed-off-by:
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Krzysztof Kozlowski authored
The Qualcomm SM8550 RX Soundwire port configuration was taken from downstream sources ("rx_frame_params_default"), but without two ports. Correct the DTS, even though no practical impact was observed. Signed-off-by: -
Krzysztof Kozlowski authored
Review of v1 patch resulting in commit 58872a54 ("arm64: dts: qcom: sm8650: add ADSP audio codec macros") pointed to remove unneeded assigned-clock-rates from macro codecs. One assignment was left in WSA macro codec, so drop it now as it is redundant: these clocks have fixed 19.2 MHz frequency. Signed-off-by:
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Luca Weiss authored
While applying the original patch, some things got messed up and it didn't apply to the correct section. Move the compatible to the correct location to fix that. Fixes: bfccc195 ("dt-bindings: arm: qcom: Add HTC One Mini 2") Signed-off-by:
Luca Weiss <luca@z3ntu.xyz> Reviewed-by:
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Konrad Dybcio authored
Add interconnect provider nodes and hook up interconnects to consumer devices, including bwmon. Signed-off-by:
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https://git.kernel.org/pub/scm/linux/kernel/git/djakov/iccBjorn Andersson authored
Merge the SM6115 interconnect binding to allow referecing the interconnect header files and the ports defined in these.
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- 16 Dec, 2023 7 commits
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Krzysztof Kozlowski authored
Add dedicated compatible for the SDHCI MMC controller, because usage of generic qcom,sdhci-msm-v4 compatible alone is deprecated. Cc: Chukun Pan <amadeus@jmu.edu.cn> Signed-off-by:
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Mao Jinlong authored
When a node is only one in port or one out port, address-cells and size-cells are not required in in-ports and out-ports. And the number and reg of the port need to be removed. Reviewed-by:
Mao Jinlong <quic_jinlmao@quicinc.com> Link: https://lore.kernel.org/r/20231210072633.4243-5-quic_jinlmao@quicinc.comSigned-off-by:
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Mao Jinlong authored
out-ports is a required property for coresight ETM. Add out-ports for ETM nodes to fix the warning. Reviewed-by:
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Mao Jinlong authored
Add the inport of funnel@3023000 to fix 'in-ports' is a required property warning. Reviewed-by:
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Bartosz Golaszewski authored
Add the Bluetooth node for RB5 as well as its dependencies in the form of the uart6 -> serial1 alias and the pin function for the Bluetooth enable GPIO. Signed-off-by:
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by:
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Manivannan Sadhasivam authored
Add missing space between node name and braces to match the style. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20231206135540.17068-4-manivannan.sadhasivam@linaro.orgSigned-off-by:
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Manivannan Sadhasivam authored
Qcom SoCs doesn't support the legacy PCI, but only PCIe. So use the correct node name for the controller instances. Signed-off-by:
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