- 29 Feb, 2016 40 commits
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Helin Zhang authored
BugLink: http://bugs.launchpad.net/bugs/1536474 Add a comment to the #endif to more easily match it with its #if. Change-ID: I47eb0a60a17dc6d2f01a930e45006d2dc82e044f Signed-off-by:
Helin Zhang <helin.zhang@intel.com> Tested-by:
Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by:
Jeff Kirsher <jeffrey.t.kirsher@intel.com> (cherry picked from commit 2f175f55) Signed-off-by:
Tim Gardner <tim.gardner@canonical.com>
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Catherine Sullivan authored
BugLink: http://bugs.launchpad.net/bugs/1536474 The watchdog only calls link_event not handle_link_event which means that we need to save the old information in link_event. Previously when polling we were comparing current data to the old data saved the last time we actually received a link event. This means that the polling would only fix link status changes in one direction depending on what the last old data saved off was. Change-ID: Ie590f30fdbcb133d0ddad4e07e3eb1aad58255b3 Signed-off-by:
Catherine Sullivan <catherine.sullivan@intel.com> Tested-by:
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Anjali Singhai Jain authored
BugLink: http://bugs.launchpad.net/bugs/1536474 When in NAPI with interrupts disabled, the HW needs to be forced to do a write back on TX if the number of descriptors pending are less than a cache line. This stat helps keep track of how many times we get into this situation. Change-ID: I76c1bcc7ebccd6bffcc5aa33bfe05f2fa1c9a984 Signed-off-by:
Anjali Singhai Jain <anjali.singhai@intel.com> Tested-by:
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Anjali Singhai Jain authored
BugLink: http://bugs.launchpad.net/bugs/1536474 HW/NVM sets a limit of no less than 256 bytes for MSS. Stack can send as low as 76 bytes MSS. This patch lowers the HW limit to 64 bytes to avoid MDDs from firing and causing a reset when the MSS is lower than 256. Change-ID: I36b500a6bb227d283c3e321a7718e0672b11fab0 Signed-off-by:
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Shannon Nelson authored
BugLink: http://bugs.launchpad.net/bugs/1536474 There's no need to kill the kernel thread here. If this condition was true, the probe() would have died long before we got here. In any case, we'll get the same result when this code tries to use the VSI pointer being checked. Prompted by a recent Linus diatribe. Change-ID: I62f531cac34d4fc28ff9657d5b2d9523ae5e33a4 Signed-off-by:
Shannon Nelson <shannon.nelson@intel.com> Tested-by:
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Shannon Nelson authored
BugLink: http://bugs.launchpad.net/bugs/1536474 There's really no reason to kill the kernel thread just because of a little info string. This reworks the code to use snprintf's limiting to assure that the string is never too long, and WARN_ON to still put out a warning that we might want to look at the feature list length. Prompted by a recent Linus diatribe. Change-ID: If52ba5ca1c2344d8bf454a31bbb805eb5d2c5802 Signed-off-by:
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Shannon Nelson authored
BugLink: http://bugs.launchpad.net/bugs/1536474 There's no need to kill the thread and eventually the kernel in this case. In fact, the remainder of the code won't hurt anything anyway, so just complain that we're here and move along. Prompted by a recent Linus diatribe. Change-ID: Iec020d8bcfedffc1cd2553cc6905fd915bb3e670 Signed-off-by:
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Shannon Nelson authored
BugLink: http://bugs.launchpad.net/bugs/1536474 Code was moved into a separate function some time ago. Change-ID: Icabbe71ce05cf5d716d3e1152cdd9cd41d11bcb5 Signed-off-by:
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Rasmus Villemoes authored
BugLink: http://bugs.launchpad.net/bugs/1536474 This code is pretty confused. The variable name 'bytes_not_copied' clearly indicates that the programmer knew the semantics of copy_{to,from}_user, but then the return value is checked for being negative and used as a -Exxx return value. I'm not sure this is the proper fix, but at least we get rid of the dead code which pretended to check for access faults. Signed-off-by:
Rasmus Villemoes <linux@rasmusvillemoes.dk> Acked-by:
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Jesse Brandeburg authored
BugLink: http://bugs.launchpad.net/bugs/1536474 Compiler complained of an unused variable, which the driver was just using to store the result of a rd32 which is used to clear a register unconditionally. Just drop the unused variable and re-use one. Signed-off-by:
Jesse Brandeburg <jesse.brandeburg@intel.com> Tested-by:
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Tim Gardner authored
Signed-off-by: -
Tim Gardner authored
BugLink: http://bugs.launchpad.net/bugs/1536719Signed-off-by:
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Colin Ian King authored
UBUNTU: SAUCE: ACPI / tables: Add acpi_force_32bit_fadt_addr option to force 32 bit FADT addresses (LP: #1529381) BugLink: https://bugs.launchpad.net/bugs/1529381 Some HP laptops seem to have invalid 64 bit FADT X_PM* addresses which are causing various boot issues. In these cases, it would be useful to force ACPI to use the valid legacy 32 bit equivalent PM addresses. Add a acpi_force_32bit_fadt_addr to set the ACPICA acpi_gbl_use32_bit_fadt_addresses to TRUE to force this override. Signed-off-by:
Colin Ian King <colin.king@canonical.com> Signed-off-by:
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Tim Gardner authored
Ignore: yes Signed-off-by: -
Tim Gardner authored
Signed-off-by: -
Tim Gardner authored
BugLink: http://bugs.launchpad.net/bugs/1517142 This reverts commit 659743b0. Signed-off-by:
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Tim Gardner authored
Ignore: yes Signed-off-by: -
Tim Gardner authored
Signed-off-by: -
Alistair Popple authored
BugLink: http://bugs.launchpad.net/bugs/1522415 Move __raw_rm_writeq() from platforms/powernv/pci-ioda.c to include/asm/io.h so that it can be used by other code. Signed-off-by:
Alistair Popple <alistair@popple.id.au> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au> (cherry picked from commit a84bf321) Signed-off-by:
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Alistair Popple authored
BugLink: http://bugs.launchpad.net/bugs/1522415 This commit removed the pcidev field from struct pci_dn as it was no longer in use by the kernel. However to support finding the association of Nvlink devices to GPU devices from the device-tree this field is required. This reverts commit 250c7b27 ("powerpc/pci: Remove unused struct pci_dn.pcidev field"). Signed-off-by:
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Tim Gardner authored
Ignore: yes Signed-off-by: -
Tim Gardner authored
Signed-off-by: -
Andy Whitcroft authored
We wish to use the arm64 buildds to build armhf binaries in 32bit chroots. To make this work we need uname to return armv7l machine type. To achieve this add a kernel command line override for the 32bit machine type. Add compat_uts_machine=<type> to allow the LINUX32 personality to return that type for uname. Signed-off-by:Andy Whitcroft <apw@canonical.com>
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Andy Whitcroft authored
Signed-off-by: -
Tim Gardner authored
BugLink: http://bugs.launchpad.net/bugs/1533382Signed-off-by:
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Alistair Popple authored
BugLink: http://bugs.launchpad.net/bugs/1522415 P8+ hardware reports all errors on PE#0. This patch ensures PE#0 is not assigned to NPU devices so that it can be used for EEH. Signed-off-by:
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Alistair Popple authored
BugLink: http://bugs.launchpad.net/bugs/1522415 The P8+ hardware supports four partitionable endpoints (PEs) however the hardware reports all errors as occurring on PE#0. This means we need to reserve this PE for error handling (EEH) and not assign it to a NPU device, implying that some devices will need to share PEs. This patch changes the PE assignment for NPU devices such that NPU devices which connect to the same GPU are assigned to the same PE#. Signed-off-by:
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Alistair Popple authored
BugLink: http://bugs.launchpad.net/bugs/1522415 The emulated NVLink PCI devices share the same IODA2 TCE tables but only support a single TVT (instead of the normal two for PCI devices). This requires the kernel to manually replace windows with either the bypass or non-bypass window depending on what the driver has requested. Unfortunately an incorrect optimisation was made in pnv_pci_ioda_dma_set_mask() which caused updating of some NPU device PEs to be skipped in certain configurations due to an incorrect assumption that a NULL peer PE in the array indicated there were no more peers present. This patch fixes the problem by ensuring all peer PEs are updated. Fixes: 5d2aa710 ("powerpc/powernv: Add support for Nvlink NPUs") Signed-off-by:
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Tim Gardner authored
Ignore: yes Signed-off-by: -
Alistair Popple authored
BugLink: http://bugs.launchpad.net/bugs/1522415 NVLink is a high speed interconnect that is used in conjunction with a PCI-E connection to create an interface between CPU and GPU that provides very high data bandwidth. A PCI-E connection to a GPU is used as the control path to initiate and report status of large data transfers sent via the NVLink. On IBM Power systems the NVLink processing unit (NPU) is similar to the existing PHB3. This patch adds support for a new NPU PHB type. DMA operations on the NPU are not supported as this patch sets the TCE translation tables to be the same as the related GPU PCIe device for each NVLink. Therefore all DMA operations are setup and controlled via the PCIe device. EEH is not presently supported for the NPU devices, although it may be added in future. Signed-off-by:
Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by:
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Tim Gardner authored
Signed-off-by: -
Tim Gardner authored
Signed-off-by: -
Tim Gardner authored
BugLink: http://bugs.launchpad.net/bugs/1532886Signed-off-by:
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Tim Gardner authored
BugLink: http://bugs.launchpad.net/bugs/1514711Signed-off-by:
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Thomas Falcon authored
BugLink: http://bugs.launchpad.net/bugs/1532303 This is a new device driver for a high performance SR-IOV assisted virtual network for IBM System p and IBM System i systems. The SR-IOV VF will be attached to the VIOS partition and mapped to the Linux client via the hypervisor's VNIC protocol that this driver implements. This driver is able to perform basic tx and rx, new features and improvements will be added as they are being developed and tested. Signed-off-by:
Thomas Falcon <tlfalcon@linux.vnet.ibm.com> Signed-off-by:
John Allen <jallen@linux.vnet.ibm.com> Signed-off-by:
David S. Miller <davem@davemloft.net> (cherry picked from commit 032c5e82) Signed-off-by:
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Tim Gardner authored
Signed-off-by: -
Tim Gardner authored
Signed-off-by: -
Tim Gardner authored
Signed-off-by: -
Jim Snow authored
BugLink: http://bugs.launchpad.net/bugs/1519631 Knights Landing is the next generation architecture for HPC market. KNL introduces concept of a tile and CHA - Cache/Home Agent for memory accesses. Some things are fixed in KNL: () There's single DIMM slot per channel () There's 2 memory controllers with 3 channels each, however, from EDAC standpoint, it is presented as single memory controller with 6 channels. In order to represent 2 MCs w/ 3 CH, it would require major redesign of EDAC core driver. Basically, two functionalities are added/extended: () during driver initialization KNL topology is being recognized, i.e. which channels are populated with what DIMM sizes (knl_get_dimm_capacity function) () handle MCE errors - channel swizzling Reviewed-by:
Tony Luck <tony.luck@intel.com> Signed-off-by:
Jim Snow <jim.m.snow@intel.com> Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: linux-edac <linux-edac@vger.kernel.org> Cc: lukasz.anaczkowski@intel.com Link: http://lkml.kernel.org/r/1449136134-23706-5-git-send-email-hubert.chrzaniuk@intel.com [ Rebase to 4.4-rc3. ] Signed-off-by:
Hubert Chrzaniuk <hubert.chrzaniuk@intel.com> Signed-off-by:
Borislav Petkov <bp@suse.de> (cherry picked from commit d0cdf900) Signed-off-by:
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Jim Snow authored
BugLink: http://bugs.launchpad.net/bugs/1519631 Add options to sbridge_get_all_devices() to allow for duplicate device IDs and devices that are scattered across mulitple PCI buses. Signed-off-by:
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