sh_clk_init_parent() are using clk->mapped_reg
which is mapped in clk_register()
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

Convert the CPG DIV6 helper code to use the new mapped_reg
together with ioread32() and iowrite32().
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

Convert the CPG DIV4 helper code to use the new mapped_reg
together with ioread32() and iowrite32().
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

Convert the CPG MSTP32 helper code to use the new mapped_reg
together with ioread32() and iowrite32().
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

Some clocks can select its parent clock by CPG register.
But it might have been modified by boot-loader or something.
This patch removed fixed initial parent clock,
and setup it from their current register settings.
It works on div6 reparent clocks for now.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

div6 clock should not use arch_flags for clk_rate_table_build,
because SH_CLK_DIV6_EXT doesn't care .arch_flags.
clk->freq_table[] will be all CPUFREQ_ENTRY_INVALID without this patch.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Cc: stable@kernel.org
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

The disabling of the init op for non-legacy clocks neglected to do the
same in the core clock framework, resulting in a build failure. Fix it
up.
Reported-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

Now that clk_set_rate_ex() is gone, there is also no way to get at rate
setting algo id, which is now also completely unused. Kill it off before
new clock ops start using it.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

This shuffles the clock framework code around to a drivers/sh/clk subdir,
to follow the intc split up. This will make it easier to subsequently
break things out as well as plug in different helpers for non-CPG users.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

Remove "name" and "id" from drivers/sh/ struct clk.

The struct clk members "name" and "id" are not used
now when matching is done through clkdev.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

Add support for reparenting of div6 clocks on SuperH and SH-Mobile SoCs.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

Move the CPG helpers to drivers/sh/clk-cpg.c V2.

This to allow SH-Mobile ARM to share the code with
SH. All functions except the legacy CPG stuff is moved.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

This patch converts the legacy clocks to register
using clkdev. Also the clock name is removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

Update the div4 set_parent() callback to use the
flags instead of name to determine parent index.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

For the CPUs that have not yet been converted off of legacy CPG we
provide some pclk aliases in order to make driver migration easier.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

This patch adds a ->kick() callback to clk_div4_table
and ties it into sh_clk_div4_set_rate(). A sh7724
specific kick function is also added that updates the
KICK bit whenever div4 clocks in FRQCRA and FRQCRB
have been set. Allows us to set the VPU clock.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

This patch introduces struct clk_div4_table. The structure
will be used to keep div4 specific data, and is with this
patch replacing the struct clk_div_mult_table pointer arg
used by the sh_clk_div4_register() functions.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

Make sure the div4 bitfield is shifted according
to the enable_bit value in sh_clk_div4_set_rate().
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

Implement .set_rate() for all SH "div4 clocks," .enable(), .disable(), and
.set_parent() for those, that support them. This allows, among other uses,
reparenting of SIU clocks to the external source, and enabling and
disabling of the IrDA clock on sh7722.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

Convert the shared clock cpg code from bootmem to slab.
Without this patch the current bootmem code triggers
WARN_ON() because the slab is available.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

This patch updates the div6 clock helper code to add support
for enable(), disable() and set_rate() callbacks.

Needed by the camera clock enabling board code on Migo-R.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

This patch adds div6 clock helper code. The div6 clocks
are simply 6-bit divide-by-n modules where n is 1 to 64.

Needed for vclk on sh7722, sh7723, sh7343 and sh7366.
sh7724 needs this even more for vclk, fclka, fclkb,
irdaclk and spuclk.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

This patch fixes the per clock offset calculation in
sh_clk_div4_register(). Without this patch the offset
to the frequency table for each clock is incorrect.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

Add shared code for 4-bit divisor clocks.

Processor specific code can use SH_CLK_DIV4()
to initialize div4 clocks, and then use
sh_clk_div4_register() for registration.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

Add shared 32-bit module stop bit clock support.

Processor specific code can use SH_CLK_MSTP32()
to initialize module stop bit clocks, and then
use sh_clk_mstp32() for registration.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

This adds a new SH_CLK_CPG for parts that have CPG support.
SH_CLK_CPG_LEGACY is made to depend on this, and still needs to be set
for platforms that want clock-cpg to register the legacy clocks. With
this new config item in place, it is now possible to start layering more
generic CPG code in place while other platforms transition off of the
legacy clocks.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

This moves out the old legacy CPG clocks to their own file, and converts
over the existing users. With these clocks going away and each CPU
dealing with them on their own, CPUs can gradually move over to the new
interface.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>