1. 26 Apr, 2021 31 commits
    • Vitaly Wool's avatar
      RISC-V: enable XIP · 44c92257
      Vitaly Wool authored
      Introduce XIP (eXecute In Place) support for RISC-V platforms.
      It allows code to be executed directly from non-volatile storage
      directly addressable by the CPU, such as QSPI NOR flash which can
      be found on many RISC-V platforms. This makes way for significant
      optimization of RAM footprint. The XIP kernel is not compressed
      since it has to run directly from flash, so it will occupy more
      space on the non-volatile storage. The physical flash address used
      to link the kernel object files and for storing it has to be known
      at compile time and is represented by a Kconfig option.
      
      XIP on RISC-V will for the time being only work on MMU-enabled
      kernels.
      Signed-off-by: default avatarVitaly Wool <vitaly.wool@konsulko.com>
      [Alex: Rebase on top of "Move kernel mapping outside the linear mapping" ]
      Signed-off-by: default avatarAlexandre Ghiti <alex@ghiti.fr>
      [Palmer: disable XIP for allyesconfig]
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      44c92257
    • Nick Kossifidis's avatar
      RISC-V: Add crash kernel support · 56409750
      Nick Kossifidis authored
      This patch allows Linux to act as a crash kernel for use with
      kdump. Userspace will let the crash kernel know about the
      memory region it can use through linux,usable-memory property
      on the /memory node (overriding its reg property), and about the
      memory region where the elf core header of the previous kernel
      is saved, through a reserved-memory node with a compatible string
      of "linux,elfcorehdr". This approach is the least invasive and
      re-uses functionality already present.
      
      I tested this on riscv64 qemu and it works as expected, you
      may test it by retrieving the dmesg of the previous kernel
      through /proc/vmcore, using the vmcore-dmesg utility from
      kexec-tools.
      Signed-off-by: default avatarNick Kossifidis <mick@ics.forth.gr>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      56409750
    • Nick Kossifidis's avatar
      RISC-V: Add kdump support · e53d2818
      Nick Kossifidis authored
      This patch adds support for kdump, the kernel will reserve a
      region for the crash kernel and jump there on panic. In order
      for userspace tools (kexec-tools) to prepare the crash kernel
      kexec image, we also need to expose some information on
      /proc/iomem for the memory regions used by the kernel and for
      the region reserved for crash kernel. Note that on userspace
      the device tree is used to determine the system's memory
      layout so the "System RAM" on /proc/iomem is ignored.
      
      I tested this on riscv64 qemu and works as expected, you may
      test it by triggering a crash through /proc/sysrq_trigger:
      
      echo c > /proc/sysrq_trigger
      Signed-off-by: default avatarNick Kossifidis <mick@ics.forth.gr>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      e53d2818
    • Nick Kossifidis's avatar
      RISC-V: Improve init_resources() · ffe0e526
      Nick Kossifidis authored
      The kernel region is always present and we know where it is, no need to
      look for it inside the loop, just ignore it like the rest of the
      reserved regions within system's memory.
      
      Additionally, we don't need to call memblock_free inside the loop, as if
      called it'll split the region of pre-allocated resources in two parts,
      messing things up, just re-use the previous pre-allocated resource and
      free any unused resources after both loops finish.
      Signed-off-by: default avatarNick Kossifidis <mick@ics.forth.gr>
      [Palmer: commit text]
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      ffe0e526
    • Nick Kossifidis's avatar
      RISC-V: Add kexec support · fba8a867
      Nick Kossifidis authored
      This patch adds support for kexec on RISC-V. On SMP systems it depends
      on HOTPLUG_CPU in order to be able to bring up all harts after kexec.
      It also needs a recent OpenSBI version that supports the HSM extension.
      I tested it on riscv64 QEMU on both an smp and a non-smp system.
      Signed-off-by: default avatarNick Kossifidis <mick@ics.forth.gr>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      fba8a867
    • Nick Kossifidis's avatar
      RISC-V: Add EM_RISCV to kexec UAPI header · d83e682e
      Nick Kossifidis authored
      Add RISC-V to the list of supported kexec architectures, we need to
      add the definition early-on so that later patches can use it.
      
      EM_RISCV is 243 as per ELF psABI specification here:
      https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.mdSigned-off-by: default avatarNick Kossifidis <mick@ics.forth.gr>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      d83e682e
    • Jisheng Zhang's avatar
      riscv: vdso: fix and clean-up Makefile · 772d7891
      Jisheng Zhang authored
      Running "make" on an already compiled kernel tree will rebuild the
      kernel even without any modifications:
      
        CALL    linux/scripts/checksyscalls.sh
        CALL    linux/scripts/atomic/check-atomics.sh
        CHK     include/generated/compile.h
        SO2S    arch/riscv/kernel/vdso/vdso-syms.S
        AS      arch/riscv/kernel/vdso/vdso-syms.o
        AR      arch/riscv/kernel/vdso/built-in.a
        AR      arch/riscv/kernel/built-in.a
        AR      arch/riscv/built-in.a
        GEN     .version
        CHK     include/generated/compile.h
        UPD     include/generated/compile.h
        CC      init/version.o
        AR      init/built-in.a
        LD      vmlinux.o
      
      The reason is "Any target that utilizes if_changed must be listed in
      $(targets), otherwise the command line check will fail, and the target
      will always be built" as explained by Documentation/kbuild/makefiles.rst
      
      Fix this build bug by adding vdso-syms.S to $(targets)
      
      At the same time, there are two trivial clean up modifications:
      
      - the vdso-dummy.o is not needed any more after so remove it.
      
      - vdso.lds is a generated file, so it should be prefixed with
        $(obj)/ instead of $(src)/
      
      Fixes: c2c81bb2 ("RISC-V: Fix the VDSO symbol generaton for binutils-2.35+")
      Cc: stable@vger.kernel.org
      Signed-off-by: default avatarJisheng Zhang <jszhang@kernel.org>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      772d7891
    • zhouchuangao's avatar
      riscv/mm: Use BUG_ON instead of if condition followed by BUG. · e75e6bf4
      zhouchuangao authored
      BUG_ON() uses unlikely in if(), which can be optimized at compile time.
      Signed-off-by: default avatarzhouchuangao <zhouchuangao@vivo.com>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      e75e6bf4
    • Liao Chang's avatar
      riscv/kprobe: fix kernel panic when invoking sys_read traced by kprobe · b1ebaa0e
      Liao Chang authored
      The execution of sys_read end up hitting a BUG_ON() in __find_get_block
      after installing kprobe at sys_read, the BUG message like the following:
      
      [   65.708663] ------------[ cut here ]------------
      [   65.709987] kernel BUG at fs/buffer.c:1251!
      [   65.711283] Kernel BUG [#1]
      [   65.712032] Modules linked in:
      [   65.712925] CPU: 0 PID: 51 Comm: sh Not tainted 5.12.0-rc4 #1
      [   65.714407] Hardware name: riscv-virtio,qemu (DT)
      [   65.715696] epc : __find_get_block+0x218/0x2c8
      [   65.716835]  ra : __getblk_gfp+0x1c/0x4a
      [   65.717831] epc : ffffffe00019f11e ra : ffffffe00019f56a sp : ffffffe002437930
      [   65.719553]  gp : ffffffe000f06030 tp : ffffffe0015abc00 t0 : ffffffe00191e038
      [   65.721290]  t1 : ffffffe00191e038 t2 : 000000000000000a s0 : ffffffe002437960
      [   65.723051]  s1 : ffffffe00160ad00 a0 : ffffffe00160ad00 a1 : 000000000000012a
      [   65.724772]  a2 : 0000000000000400 a3 : 0000000000000008 a4 : 0000000000000040
      [   65.726545]  a5 : 0000000000000000 a6 : ffffffe00191e000 a7 : 0000000000000000
      [   65.728308]  s2 : 000000000000012a s3 : 0000000000000400 s4 : 0000000000000008
      [   65.730049]  s5 : 000000000000006c s6 : ffffffe00240f800 s7 : ffffffe000f080a8
      [   65.731802]  s8 : 0000000000000001 s9 : 000000000000012a s10: 0000000000000008
      [   65.733516]  s11: 0000000000000008 t3 : 00000000000003ff t4 : 000000000000000f
      [   65.734434]  t5 : 00000000000003ff t6 : 0000000000040000
      [   65.734613] status: 0000000000000100 badaddr: 0000000000000000 cause: 0000000000000003
      [   65.734901] Call Trace:
      [   65.735076] [<ffffffe00019f11e>] __find_get_block+0x218/0x2c8
      [   65.735417] [<ffffffe00020017a>] __ext4_get_inode_loc+0xb2/0x2f6
      [   65.735618] [<ffffffe000201b6c>] ext4_get_inode_loc+0x3a/0x8a
      [   65.735802] [<ffffffe000203380>] ext4_reserve_inode_write+0x2e/0x8c
      [   65.735999] [<ffffffe00020357a>] __ext4_mark_inode_dirty+0x4c/0x18e
      [   65.736208] [<ffffffe000206bb0>] ext4_dirty_inode+0x46/0x66
      [   65.736387] [<ffffffe000192914>] __mark_inode_dirty+0x12c/0x3da
      [   65.736576] [<ffffffe000180dd2>] touch_atime+0x146/0x150
      [   65.736748] [<ffffffe00010d762>] filemap_read+0x234/0x246
      [   65.736920] [<ffffffe00010d834>] generic_file_read_iter+0xc0/0x114
      [   65.737114] [<ffffffe0001f5d7a>] ext4_file_read_iter+0x42/0xea
      [   65.737310] [<ffffffe000163f2c>] new_sync_read+0xe2/0x15a
      [   65.737483] [<ffffffe000165814>] vfs_read+0xca/0xf2
      [   65.737641] [<ffffffe000165bae>] ksys_read+0x5e/0xc8
      [   65.737816] [<ffffffe000165c26>] sys_read+0xe/0x16
      [   65.737973] [<ffffffe000003972>] ret_from_syscall+0x0/0x2
      [   65.738858] ---[ end trace fe93f985456c935d ]---
      
      A simple reproducer looks like:
      	echo 'p:myprobe sys_read fd=%a0 buf=%a1 count=%a2' > /sys/kernel/debug/tracing/kprobe_events
      	echo 1 > /sys/kernel/debug/tracing/events/kprobes/myprobe/enable
      	cat /sys/kernel/debug/tracing/trace
      
      Here's what happens to hit that BUG_ON():
      
      1) After installing kprobe at entry of sys_read, the first instruction
         is replaced by 'ebreak' instruction on riscv64 platform.
      
      2) Once kernel reach the 'ebreak' instruction at the entry of sys_read,
         it trap into the riscv breakpoint handler, where it do something to
         setup for coming single-step of origin instruction, including backup
         the 'sstatus' in pt_regs, followed by disable interrupt during single
         stepping via clear 'SIE' bit of 'sstatus' in pt_regs.
      
      3) Then kernel restore to the instruction slot contains two instructions,
         one is original instruction at entry of sys_read, the other is 'ebreak'.
         Here it trigger a 'Instruction page fault' exception (value at 'scause'
         is '0xc'), if PF is not filled into PageTabe for that slot yet.
      
      4) Again kernel trap into page fault exception handler, where it choose
         different policy according to the state of running kprobe. Because
         afte 2) the state is KPROBE_HIT_SS, so kernel reset the current kprobe
         and 'pc' points back to the probe address.
      
      5) Because 'epc' point back to 'ebreak' instrution at sys_read probe,
         kernel trap into breakpoint handler again, and repeat the operations
         at 2), however 'sstatus' without 'SIE' is keep at 4), it cause the
         real 'sstatus' saved at 2) is overwritten by the one withou 'SIE'.
      
      6) When kernel cross the probe the 'sstatus' CSR restore with value
         without 'SIE', and reach __find_get_block where it requires the
         interrupt must be enabled.
      
      Fix this is very trivial, just restore the value of 'sstatus' in pt_regs
      with backup one at 2) when the instruction being single stepped cause a
      page fault.
      
      Fixes: c22b0bcb ("riscv: Add kprobes supported")
      Signed-off-by: default avatarLiao Chang <liaochang1@huawei.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      b1ebaa0e
    • Jisheng Zhang's avatar
      riscv: Set ARCH_HAS_STRICT_MODULE_RWX if MMU · a9451b8e
      Jisheng Zhang authored
      Now we can set ARCH_HAS_STRICT_MODULE_RWX for MMU riscv platforms, this
      is good from security perspective.
      Signed-off-by: default avatarJisheng Zhang <jszhang@kernel.org>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      a9451b8e
    • Jisheng Zhang's avatar
      riscv: module: Create module allocations without exec permissions · 5387054b
      Jisheng Zhang authored
      The core code manages the executable permissions of code regions of
      modules explicitly, it is not necessary to create the module vmalloc
      regions with RWX permissions. Create them with RW- permissions instead.
      Signed-off-by: default avatarJisheng Zhang <jszhang@kernel.org>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      5387054b
    • Jisheng Zhang's avatar
      riscv: bpf: Avoid breaking W^X · fc850476
      Jisheng Zhang authored
      We allocate Non-executable pages, then call bpf_jit_binary_lock_ro()
      to enable executable permission after mapping them read-only. This is
      to prepare for STRICT_MODULE_RWX in following patch.
      Signed-off-by: default avatarJisheng Zhang <jszhang@kernel.org>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      fc850476
    • Jisheng Zhang's avatar
      riscv: bpf: Move bpf_jit_alloc_exec() and bpf_jit_free_exec() to core · 1d27d854
      Jisheng Zhang authored
      We will drop the executable permissions of the code pages from the
      mapping at allocation time soon. Move bpf_jit_alloc_exec() and
      bpf_jit_free_exec() to bpf_jit_core.c so that they can be shared by
      both RV64I and RV32I.
      Signed-off-by: default avatarJisheng Zhang <jszhang@kernel.org>
      Acked-by: default avatarLuke Nelson <luke.r.nels@gmail.com>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      1d27d854
    • Jisheng Zhang's avatar
      riscv: kprobes: Implement alloc_insn_page() · cdd1b2bd
      Jisheng Zhang authored
      Allocate PAGE_KERNEL_READ_EXEC(read only, executable) page for kprobes
      insn page. This is to prepare for STRICT_MODULE_RWX.
      Signed-off-by: default avatarJisheng Zhang <jszhang@kernel.org>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      cdd1b2bd
    • Jisheng Zhang's avatar
      riscv: Constify sbi_ipi_ops · 300f62c3
      Jisheng Zhang authored
      Constify the sbi_ipi_ops so that it will be placed in the .rodata
      section. This will cause attempts to modify it to fail when strict
      page permissions are in place.
      Signed-off-by: default avatarJisheng Zhang <jszhang@kernel.org>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      300f62c3
    • Jisheng Zhang's avatar
      riscv: Constify sys_call_table · e6a30224
      Jisheng Zhang authored
      Constify the sys_call_table so that it will be placed in the .rodata
      section. This will cause attempts to modify the table to fail when
      strict page permissions are in place.
      Signed-off-by: default avatarJisheng Zhang <jszhang@kernel.org>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      e6a30224
    • Jisheng Zhang's avatar
      riscv: Mark some global variables __ro_after_init · de31ea4a
      Jisheng Zhang authored
      All of these are never modified after init, so they can be
      __ro_after_init.
      Signed-off-by: default avatarJisheng Zhang <jszhang@kernel.org>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      de31ea4a
    • Jisheng Zhang's avatar
      riscv: add __init section marker to some functions · 1987501b
      Jisheng Zhang authored
      They are not needed after booting, so mark them as __init to move them
      to the __init section.
      Signed-off-by: default avatarJisheng Zhang <jszhang@kernel.org>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      1987501b
    • Alexandre Ghiti's avatar
      riscv: Prepare ptdump for vm layout dynamic addresses · 0df68ce4
      Alexandre Ghiti authored
      This is a preparatory patch for sv48 support that will introduce
      dynamic PAGE_OFFSET.
      
      Dynamic PAGE_OFFSET implies that all zones (vmalloc, vmemmap, fixaddr...)
      whose addresses depend on PAGE_OFFSET become dynamic and can't be used
      to statically initialize the array used by ptdump to identify the
      different zones of the vm layout.
      Signed-off-by: default avatarAlexandre Ghiti <alex@ghiti.fr>
      Reviewed-by: default avatarAnup Patel <anup@brainfault.org>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      0df68ce4
    • Alexandre Ghiti's avatar
      Documentation: riscv: Add documentation that describes the VM layout · 2a433cf8
      Alexandre Ghiti authored
      This new document presents the RISC-V virtual memory layout and is based
      one the x86 one: it describes the different limits of the different regions
      of the virtual address space.
      Signed-off-by: default avatarAlexandre Ghiti <alex@ghiti.fr>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      2a433cf8
    • Alexandre Ghiti's avatar
      riscv: Move kernel mapping outside of linear mapping · 2bfc6cd8
      Alexandre Ghiti authored
      This is a preparatory patch for relocatable kernel and sv48 support.
      
      The kernel used to be linked at PAGE_OFFSET address therefore we could use
      the linear mapping for the kernel mapping. But the relocated kernel base
      address will be different from PAGE_OFFSET and since in the linear mapping,
      two different virtual addresses cannot point to the same physical address,
      the kernel mapping needs to lie outside the linear mapping so that we don't
      have to copy it at the same physical offset.
      
      The kernel mapping is moved to the last 2GB of the address space, BPF
      is now always after the kernel and modules use the 2GB memory range right
      before the kernel, so BPF and modules regions do not overlap. KASLR
      implementation will simply have to move the kernel in the last 2GB range
      and just take care of leaving enough space for BPF.
      
      In addition, by moving the kernel to the end of the address space, both
      sv39 and sv48 kernels will be exactly the same without needing to be
      relocated at runtime.
      Suggested-by: default avatarArnd Bergmann <arnd@arndb.de>
      Signed-off-by: default avatarAlexandre Ghiti <alex@ghiti.fr>
      [Palmer: Squash the STRICT_RWX fix, and a !MMU fix]
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      2bfc6cd8
    • Jisheng Zhang's avatar
      samples/kprobes: Add riscv support · 8a07ac39
      Jisheng Zhang authored
      Add riscv specific info dump in both handler_pre() and handler_post().
      Signed-off-by: default avatarJisheng Zhang <jszhang@kernel.org>
      Acked-by: default avatarMasami Hiramatsu <mhiramat@kernel.org>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      8a07ac39
    • Nathan Chancellor's avatar
      riscv: Select HAVE_DYNAMIC_FTRACE when -fpatchable-function-entry is available · adebc881
      Nathan Chancellor authored
      clang prior to 13.0.0 does not support -fpatchable-function-entry for
      RISC-V.
      
      clang: error: unsupported option '-fpatchable-function-entry=8' for target 'riscv64-unknown-linux-gnu'
      
      To avoid this error, only select HAVE_DYNAMIC_FTRACE when this option is
      not available.
      
      Fixes: afc76b8b ("riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT")
      Link: https://github.com/ClangBuiltLinux/linux/issues/1268Reported-by: default avatarkernel test robot <lkp@intel.com>
      Signed-off-by: default avatarNathan Chancellor <nathan@kernel.org>
      Reviewed-by: default avatarFangrui Song <maskray@google.com>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      adebc881
    • Nathan Chancellor's avatar
      riscv: Workaround mcount name prior to clang-13 · 7ce04771
      Nathan Chancellor authored
      Prior to clang 13.0.0, the RISC-V name for the mcount symbol was
      "mcount", which differs from the GCC version of "_mcount", which results
      in the following errors:
      
      riscv64-linux-gnu-ld: init/main.o: in function `__traceiter_initcall_level':
      main.c:(.text+0xe): undefined reference to `mcount'
      riscv64-linux-gnu-ld: init/main.o: in function `__traceiter_initcall_start':
      main.c:(.text+0x4e): undefined reference to `mcount'
      riscv64-linux-gnu-ld: init/main.o: in function `__traceiter_initcall_finish':
      main.c:(.text+0x92): undefined reference to `mcount'
      riscv64-linux-gnu-ld: init/main.o: in function `.LBB32_28':
      main.c:(.text+0x30c): undefined reference to `mcount'
      riscv64-linux-gnu-ld: init/main.o: in function `free_initmem':
      main.c:(.text+0x54c): undefined reference to `mcount'
      
      This has been corrected in https://reviews.llvm.org/D98881 but the
      minimum supported clang version is 10.0.1. To avoid build errors and to
      gain a working function tracer, adjust the name of the mcount symbol for
      older versions of clang in mount.S and recordmcount.pl.
      
      Link: https://github.com/ClangBuiltLinux/linux/issues/1331Signed-off-by: default avatarNathan Chancellor <nathan@kernel.org>
      Reviewed-by: default avatarNick Desaulniers <ndesaulniers@google.com>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      7ce04771
    • Nathan Chancellor's avatar
      scripts/recordmcount.pl: Fix RISC-V regex for clang · 2f095504
      Nathan Chancellor authored
      Clang can generate R_RISCV_CALL_PLT relocations to _mcount:
      
      $ llvm-objdump -dr build/riscv/init/main.o | rg mcount
                      000000000000000e:  R_RISCV_CALL_PLT     _mcount
                      000000000000004e:  R_RISCV_CALL_PLT     _mcount
      
      After this, the __start_mcount_loc section is properly generated and
      function tracing still works.
      
      Link: https://github.com/ClangBuiltLinux/linux/issues/1331Signed-off-by: default avatarNathan Chancellor <nathan@kernel.org>
      Reviewed-by: default avatarFangrui Song <maskray@google.com>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      2f095504
    • Nathan Chancellor's avatar
      riscv: Use $(LD) instead of $(CC) to link vDSO · 7f3d3490
      Nathan Chancellor authored
      Currently, the VDSO is being linked through $(CC). This does not match
      how the rest of the kernel links objects, which is through the $(LD)
      variable.
      
      When linking with clang, there are a couple of warnings about flags that
      will not be used during the link:
      
      clang-12: warning: argument unused during compilation: '-no-pie' [-Wunused-command-line-argument]
      clang-12: warning: argument unused during compilation: '-pg' [-Wunused-command-line-argument]
      
      '-no-pie' was added in commit 85602bea ("RISC-V: build vdso-dummy.o
      with -no-pie") to override '-pie' getting added to the ld command from
      distribution versions of GCC that enable PIE by default. It is
      technically no longer needed after commit c2c81bb2 ("RISC-V: Fix the
      VDSO symbol generaton for binutils-2.35+"), which removed vdso-dummy.o
      in favor of generating vdso-syms.S from vdso.so with $(NM) but this also
      resolves the issue in case it ever comes back due to having full control
      over the $(LD) command. '-pg' is for function tracing, it is not used
      during linking as clang states.
      
      These flags could be removed/filtered to fix the warnings but it is
      easier to just match the rest of the kernel and use $(LD) directly for
      linking. See commits
      
        fe00e50b ("ARM: 8858/1: vdso: use $(LD) instead of $(CC) to link VDSO")
        691efbed ("arm64: vdso: use $(LD) instead of $(CC) to link VDSO")
        2ff90699 ("MIPS: VDSO: Use $(LD) instead of $(CC) to link VDSO")
        2b2a2584 ("s390/vdso: Use $(LD) instead of $(CC) to link vDSO")
      
      for more information.
      
      The flags are converted to linker flags and '--eh-frame-hdr' is added to
      match what is added by GCC implicitly, which can be seen by adding '-v'
      to GCC's invocation.
      
      Additionally, since this area is being modified, use the $(OBJCOPY)
      variable instead of an open coded $(CROSS_COMPILE)objcopy so that the
      user's choice of objcopy binary is respected.
      
      Link: https://github.com/ClangBuiltLinux/linux/issues/803
      Link: https://github.com/ClangBuiltLinux/linux/issues/970Signed-off-by: default avatarNathan Chancellor <nathan@kernel.org>
      Reviewed-by: default avatarFangrui Song <maskray@google.com>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      7f3d3490
    • Vincent Chen's avatar
      riscv: sifive: Apply errata "cip-1200" patch · bff3ff52
      Vincent Chen authored
      For certain SiFive CPUs, "sfence.vma addr" cannot exactly flush addr
      from TLB in the particular cases. The details could be found here:
      https://sifive.cdn.prismic.io/sifive/167a1a56-03f4-4615-a79e-b2a86153148f_FU740_errata_20210205.pdf
      In order to ensure the functionality, this patch uses the Alternative
      scheme to replace all "sfence.vma addr" with "sfence.vma" at runtime.
      Signed-off-by: default avatarVincent Chen <vincent.chen@sifive.com>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      bff3ff52
    • Vincent Chen's avatar
      riscv: sifive: Apply errata "cip-453" patch · 800149a7
      Vincent Chen authored
      Add sign extension to the $badaddr before addressing the instruction page
      fault and instruction access fault to workaround the issue "cip-453".
      
      To avoid affecting the existing code sequence, this patch will creates two
      trampolines to add sign extension to the $badaddr. By the "alternative"
      mechanism, these two trampolines will replace the original exception
      handler of instruction page fault and instruction access fault in the
      excp_vect_table. In this case, only the specific SiFive CPU core jumps to
      the do_page_fault and do_trap_insn_fault through these two trampolines.
      Other CPUs are not affected.
      Signed-off-by: default avatarVincent Chen <vincent.chen@sifive.com>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      800149a7
    • Vincent Chen's avatar
      riscv: sifive: Add SiFive alternative ports · 1a0e5dbd
      Vincent Chen authored
      Add required ports of the Alternative scheme for SiFive.
      Signed-off-by: default avatarVincent Chen <vincent.chen@sifive.com>
      Reviewed-by: default avatarAnup Patel <anup@brainfault.org>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      1a0e5dbd
    • Vincent Chen's avatar
      riscv: Introduce alternative mechanism to apply errata solution · 6f4eea90
      Vincent Chen authored
      Introduce the "alternative" mechanism from ARM64 and x86 to apply the CPU
      vendors' errata solution at runtime. The main purpose of this patch is
      to provide a framework. Therefore, the implementation is quite basic for
      now so that some scenarios could not use this schemei, such as patching
      code to a module, relocating the patching code and heterogeneous CPU
      topology.
      
      Users could use the macro ALTERNATIVE to apply an errata to the existing
      code flow. In the macro ALTERNATIVE, users need to specify the manufacturer
      information(vendorid, archid, and impid) for this errata. Therefore, kernel
      will know this errata is suitable for which CPU core. During the booting
      procedure, kernel will select the errata required by the CPU core and then
      patch it. It means that the kernel only applies the errata to the specified
      CPU core. In this case, the vendor's errata does not affect each other at
      runtime. The above patching procedure only occurs during the booting phase,
      so we only take the overhead of the "alternative" mechanism once.
      
      This "alternative" mechanism is enabled by default to ensure that all
      required errata will be applied. However, users can disable this feature by
      the Kconfig "CONFIG_RISCV_ERRATA_ALTERNATIVE".
      Signed-off-by: default avatarVincent Chen <vincent.chen@sifive.com>
      Reviewed-by: default avatarAnup Patel <anup@brainfault.org>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      6f4eea90
    • Vincent Chen's avatar
      riscv: Add 3 SBI wrapper functions to get cpu manufacturer information · 183787c6
      Vincent Chen authored
      Add 3 wrapper functions to get vendor id, architecture id and implement id
      from M-mode
      Signed-off-by: default avatarVincent Chen <vincent.chen@sifive.com>
      Reviewed-by: default avatarAnup Patel <anup@brainfault.org>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      183787c6
  2. 30 Mar, 2021 3 commits
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  4. 10 Mar, 2021 2 commits
  5. 06 Mar, 2021 3 commits