- 05 Jun, 2024 5 commits
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Hawking Zhang authored
Add estimate of how much vram we need to reserve for RAS when caculating the total available vram. v2: apply the change to MP0 v13_0_2 and v13_0_14 Signed-off-by:
Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by:
Tao Zhou <tao.zhou1@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Tao Zhou authored
And also make sure the value of msg[1].len should be in the range of u16. Signed-off-by:
Yang Wang <kevinyang.wang@amd.com> Reviewed-by:
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Jay Cornwall authored
Fix LDS size interpretation: 512 bytes (>= gfx12) vs 256 (< gfx12). Ensure STATE_PRIV.BARRIER_COMPLETE cannot change after reading or before writing. Other waves in the threadgroup may cause this field to assert if they complete the barrier. Do not overwrite EXCP_FLAG_PRIV.{SAVE_CONTEXT,HOST_TRAP} when restoring this register. Both of these fields can assert while the wavefront is running the trap handler. Signed-off-by:Jay Cornwall <jay.cornwall@amd.com> Reviewed-by:
Lancelot Six <lancelot.six@amd.com> Acked-by:
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David (Ming Qiang) Wu authored
We have messages when the VCN fails to initialize and there is no need to report on success. Also PSP loading FWs is the default for production. Acked-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Sonny Jiang <sonjiang@amd.com> Signed-off-by:
David (Ming Qiang) Wu <David.Wu3@amd.com> Signed-off-by:
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Shane Xiao authored
This patch changes the implementation of AMDGPU_PTE_MTYPE_GFX12, clear the bits before setting the new one. This fixed the potential issue that GFX12 setting memory to NC. v2: Clear mtype field before setting the new one (Alex) v3: Fix typo (Felix) Suggested-by:
longlyao <Longlong.Yao@amd.com> Signed-off-by:
Shane Xiao <shane.xiao@amd.com> Reviewed-by:
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- 29 May, 2024 35 commits
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Arnd Bergmann authored
The scaler_data structure is implicitly copied onto the stack twice by being returned from a function. This is usually a bad idea, but it was not flagged by the compiler until a recent addition that pushed it over the 1024 byte function stack limit: drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml2_translation_helper.c: In function 'populate_dml_plane_cfg_from_plane_state': drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml2_translation_helper.c:1075:1: error: the frame size of 1032 bytes is larger than 1024 bytes [-Werror=frame-larger-than=] Use an explicit kzalloc() and memcpy() instead here to keep it off the stack. Fixes: 00c39110 ("drm/amd/display: Add misc DC changes for DCN401") Fixes: 7966f319 ("drm/amd/display: Introduce DML2") Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
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Arnd Bergmann authored
Putting excessively large objects on a function stack causes a warning about possibly overflowing the 8KiB of kernel stack: drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn401/dcn401_resource.c: In function 'dcn401_update_bw_bounding_box': drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn401/dcn401_resource.c:1599:1: error: the frame size of 1196 bytes is larger than 1024 bytes [-Werror=frame-larger-than=] 1599 | } | ^ drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_state.c: In function 'dc_state_create': drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_state.c:221:1: error: the frame size of 1196 bytes is larger than 1024 bytes [-Werror=frame-larger-than=] 221 | } | ^ Use dynamic allocation instead. Fixes: e779f458 ("drm/amd/display: Add handling for DC power mode") Signed-off-by: -
Arnd Bergmann authored
The graphics_object_id structure is meant to fit into 32 bits, as it's passed by value in and out of functions. A recent change increased the size to 128 bits, so it's now always passed by reference, which is clearly not intended and ends up producing a compile-time warning: drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_factory.c: In function 'construct_phy': drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_factory.c:743:1: error: the frame size of 1040 bytes is larger than 1024 bytes [-Werror=frame-larger-than=] Add back the bitfields to revert to the original size, while keeping the 'enum' type change. Fixes: fec85f99 ("drm/amd/display: Fix compiler redefinition warnings for certain configs") Signed-off-by:
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Arnd Bergmann authored
This structure is too large to fit on a stack, as shown by the newly introduced warnings from a recent code change: drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn32/dcn32_resource.c: In function 'dcn32_update_bw_bounding_box': drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn32/dcn32_resource.c:2019:1: error: the frame size of 1180 bytes is larger than 1024 bytes [-Werror=frame-larger-than=] drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn321/dcn321_resource.c: In function 'dcn321_update_bw_bounding_box': drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn321/dcn321_resource.c:1597:1: error: the frame size of 1180 bytes is larger than 1024 bytes [-Werror=frame-larger-than=] drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_state.c: In function 'dc_state_create': drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_state.c:219:1: error: the frame size of 1184 bytes is larger than 1024 bytes [-Werror=frame-larger-than=] Instead of open-coding the assignment of a large structure to a stack variable, use an explicit kmemdup() in each case to move it off the stack. Fixes: e779f458 ("drm/amd/display: Add handling for DC power mode") Signed-off-by:
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Bruno Rocha Levi authored
This patch fixes a warning from checkpatch by ensuring the trailing */ is aligned with the rest of the *, improving readability. Co-developed-by:
Lucas Antonio <lucasantonio.santos@usp.br> Signed-off-by:
Bruno Rocha Levi <brunolevilevi@usp.br> Signed-off-by:
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Jay Cornwall authored
Newer assemblers reject S_WAITCNT. All instances of S_WAITCNT can be replaced by S_WAITCNT 0 (< gfx12) or S_WAIT_IDLE (>= gfx12) since there is no concurrency of different memory instruction classes. Signed-off-by:
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Jay Cornwall authored
Source and binary have become mismatched during branch activity. Signed-off-by:
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Mario Limonciello authored
commit cd94d1b1 ("dm/amd/pm: Fix problems with reboot/shutdown for some SMU 13.0.4/13.0.11 users") attempted to fix shutdown issues that were reported since commit 31729e8c ("drm/amd/pm: fixes a random hang in S4 for SMU v13.0.4/11") but caused issues for some people. Adjust the workaround flow to properly only apply in the S4 case: -> For shutdown go through SMU_MSG_PrepareMp1ForUnload -> For S4 go through SMU_MSG_GfxDeviceDriverReset and SMU_MSG_PrepareMp1ForUnload Reported-and-tested-by:
lectrode <electrodexsnet@gmail.com> Closes: https://github.com/void-linux/void-packages/issues/50417 Cc: stable@vger.kernel.org Fixes: cd94d1b1 ("dm/amd/pm: Fix problems with reboot/shutdown for some SMU 13.0.4/13.0.11 users") Reviewed-by:
Tim Huang <Tim.Huang@amd.com> Signed-off-by:
Mario Limonciello <mario.limonciello@amd.com> Signed-off-by:
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Alex Deucher authored
Enable gfx pipe1 hardware support. Reviewed-by:
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Rajneesh Bhardwaj authored
On GFXIP9.4.3, make CPX mode as the default compute mode if the node is setup in NPS4 memory partition mode. This change is only applicable for dGPU, for APU, continue to use TPX mode. Reviewed-by:
Felix Kuehling <felix.kuehling@amd.com> Signed-off-by:
Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Signed-off-by:
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Alex Deucher authored
Set up pipe1 as a high priority queue. Reviewed-by:
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Alex Deucher authored
Use correct ref/mask for differnent gfx ring pipe. Ported from ZhenGuo's patch for gfx10. Reviewed-by:
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Victor Skvortsov authored
flush_gpu_tlb may be called from another thread while device_gpu_recover is running. Both of these threads access registers through the VF RLCG interface during VF Full Access. Add a lock around this interface to prevent race conditions between these threads. Signed-off-by:
Victor Skvortsov <victor.skvortsov@amd.com> Reviewed-by:
Zhigang Luo <zhigang.luo@amd.com> Signed-off-by:
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Alex Deucher authored
With commit 89773b85 ("drm/amdkfd: Let VRAM allocations go to GTT domain on small APUs") big and small APU "VRAM" handling in KFD was unified. Since AMD_IS_APU is set for both big and small APUs, we can simplify the checks in the code. v2: clean up a few more places (Lang) Acked-by:
Lang Yu <Lang.Yu@amd.com> Signed-off-by:
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Alex Deucher authored
This reverts commit 28ebbb49. Revert this commit as apparently the LLVM code to take advantage of this never landed. Reviewed-by:
Feifei Xu <Feifei.Xu@amd.com> Signed-off-by:
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Aurabindo Pillai authored
Allocate some memory, send the address in chunks to dmub, and finally ask it to copy the bounding box data into the newly allocated memory. Signed-off-by:
Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by:
Harry Wentland <harry.wentland@amd.com> Signed-off-by:
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Aurabindo Pillai authored
New commands for enabling copy of DC bounding box values from VBIOS DMUB Signed-off-by:
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Aurabindo Pillai authored
Move creation of CGS device node and the DAL allocation list from amdgpu_dm_init() to dm_sw_init() which runs before dmub's sw init hook. This is required for communicating with the VBIOS DMUB image from the VBIOS that was loaded for early pre-os boot. Signed-off-by:
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Rodrigo Siqueira authored
Add some additional registers. Signed-off-by:
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by:
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Aurabindo Pillai authored
When ODM slice happens on DCN401, there is a null pointer exception caused by that. This commit address this issue by checking if the required data structures are initialized. Reviewed-by:
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Aurabindo Pillai authored
All the DC_FP_START/END should be used before call anything from DML2, for this reason, the use of those guards inside DML it is not correct. This commit removes two unnecessary DC_FP_START/END from a dml2 function. Reviewed-by:
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Aurabindo Pillai authored
DCN401 is using DCN 320 headers, which does not have all the right registers for DCN401. This commit just replace DCN320 includes with the one from DCN410. Reviewed-by:
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Aurabindo Pillai authored
Drop the extra HPD irq entry for DCN401. Reviewed-by:
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Rodrigo Siqueira authored
Most of the DML code is generated, and it is necessary to update some parts of it from time to time. This commit brings the latest generated code for DML 2.1. Signed-off-by:
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Pinninti authored
[why] cleaning up the code refactor requires hubp to be in its own component. [how] move all files under newly created hubp folder and fixing the makefiles. Reviewed-by:
Pinninti <bpinnint@amd.com> Acked-by:
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Rodrigo Siqueira authored
This commit removes some unused code with the required adjustments. Signed-off-by:
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Samson Tam authored
[Why] Enable sharpener support for DCN401 [How] - Removed memcmp check that was preventing ISHARP from being enabled. - Add missing ISHARP register defines, masks, and writes. - Add programming of Blur and Scale coefficients. - Program FMT_MODE and NLDELTA registers based on LLS_PREF and pixel - format - Only enable ISHARP for YUV420 - Add disabling of ISHARP - Add debug flags and registry keys for debugging ISHARP. - Set default to medium level Acked-by:
Samson Tam <Samson.Tam@amd.com> Acked-by:
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Sridevi authored
[Why] Incorrect cursor position calculation in some scenarios. Also for mirror and rotation cases. [How] Fix for incorrect cursor position. Added new test scenarios for diags cursor test. Updated CRC for few of the diags cursor test scenarios. Reviewed-by:
Sridevi <sarvinde@amd.com> Acked-by:
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Yang Wang authored
fix typo "info.ue_count" in amdgpu_ras_aca_sysfs_read() function. Fixes: 865d3397 ("drm/amdgpu: add aca deferred error type support") Signed-off-by:
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Jesse Zhang authored
The pointer parent may be NULLed by the function amdgpu_vm_pt_parent. To make the code more robust, check the pointer parent. Signed-off-by:
Jesse Zhang <Jesse.Zhang@amd.com> Suggested-by:
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David (Ming Qiang) Wu authored
AMD_PG_SUPPORT_VCN_DPG is needed for secure parts and should/can be enabled by now. Signed-off-by:
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Alex Deucher authored
It was an enablement vehicle for MES 11 and was never productized. Remove it. v2: drop additional checks in the GFX10 code. v3: drop mes_api_def.h Acked-by:
Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by:
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Jiapeng Chong authored
No functional modification involved. drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:5200 dc_power_down_on_boot() warn: inconsistent indenting. Reported-by:
Abaci Robot <abaci@linux.alibaba.com> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=9166Signed-off-by:
Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by:
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Alex Deucher authored
Convert a variable sized array from [1] to []. Reviewed-by:
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Alex Deucher authored
Use current speed/width on devices which don't support dynamic PCIe switching. Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3289Acked-by:
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