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  1. 17 Sep, 2022 8 commits
  2. 05 Jul, 2022 1 commit
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  5. 31 Mar, 2022 1 commit
  6. 12 Jun, 2021 1 commit
  7. 15 Mar, 2021 1 commit
  8. 11 Jan, 2021 1 commit
  9. 05 Jan, 2021 1 commit
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  15. 11 Jul, 2020 1 commit
  16. 20 May, 2020 1 commit
  17. 22 Aug, 2019 1 commit
    • Hou Zhiqiang's avatar
      arm64: dts: fsl: Remove num-lanes property from PCIe nodes · 4035ff36
      Hou Zhiqiang authored
      Remove the num-lanes property to avoid the driver setting the
      link width.
      
      On FSL Layerscape SoCs, the number of lanes assigned to PCIe
      controller is not fixed, it is determined by the selected SerDes
      protocol in the RCW (Reset Configuration Word).
      
      The PCIe link training is completed automatically through the selected
      SerDes protocol - the link width set-up is updated by hardware after
      power on reset, so the num-lanes property is not needed for Layerscape
      PCIe.
      
      The current num-lanes property was added erroneously, which actually
      indicates the maximum lanes the PCIe controller can support up to,
      instead of the lanes assigned to the PCIe controller. The link width set
      by SerDes protocol will be overridden by the num-lanes property, hence
      the subsequent re-training will fail when the assigned lanes do not
      match the value in the num-lanes property.
      
      Remove the property to fix the issue
      Signed-off-by: default avatarHou Zhiqiang <Zhiqiang.Hou@nxp.com>
      Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
      Reviewed-by: default avatarAndrew Murray <andrew.murray@arm.com>
      4035ff36
  18. 22 Mar, 2019 2 commits
  19. 12 Jan, 2019 1 commit
  20. 11 Jan, 2019 1 commit
  21. 08 Dec, 2018 4 commits
  22. 26 Sep, 2018 1 commit
    • Rob Herring's avatar
      arm64: dts: fsl: Fix I2C and SPI bus warnings · b739c177
      Rob Herring authored
      dtc has new checks for I2C and SPI buses. Fix the SPI bus node names
      and warnings in unit-addresses.
      
      arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dtb: Warning (i2c_bus_reg): /soc/i2c@2180000/eeprom@57: I2C bus unit address format error, expected "53"
      arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dtb: Warning (i2c_bus_reg): /soc/i2c@2180000/eeprom@56: I2C bus unit address format error, expected "52"
      
      Cc: Shawn Guo <shawnguo@kernel.org>
      Cc: Li Yang <leoyang.li@nxp.com>
      Signed-off-by: default avatarRob Herring <robh@kernel.org>
      Acked-by: default avatarLi Yang <leoyang.li@nxp.com>
      Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
      b739c177
  23. 03 Sep, 2018 1 commit
  24. 24 Aug, 2018 1 commit
  25. 03 Jul, 2018 1 commit
    • Viresh Kumar's avatar
      arm64: dts: freescale: Add missing cooling device properties for CPUs · 346f5976
      Viresh Kumar authored
      The cooling device properties, like "#cooling-cells" and
      "dynamic-power-coefficient", should either be present for all the CPUs
      of a cluster or none. If these are present only for a subset of CPUs of
      a cluster then things will start falling apart as soon as the CPUs are
      brought online in a different order. For example, this will happen
      because the operating system looks for such properties in the CPU node
      it is trying to bring up, so that it can register a cooling device.
      
      Add such missing properties.
      
      Do minor rearrangement as well to keep ordering consistent.
      Signed-off-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
      Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
      346f5976