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  1. 30 Nov, 2018 19 commits
  3. 29 Nov, 2018 4 commits
    • Linus Walleij's avatar
      ARM: dts: Modernize the Vexpress PL111 integration · f1fe12c8
      Linus Walleij authored 
      The Versatile Express was submitted with the actual display
bridges unconnected (but defined in the device tree) and
mock "panels" encoded in the device tree node of the PL111
controller.

This doesn't even remotely describe the actual Versatile
Express hardware. Exploit the SiI9022 bridge by connecting
the PL111 pads to it, making it use EDID or fallback values
to drive the monitor.

The  also has to use the reserved memory through the
CMA pool rather than by open coding a memory region and
remapping it explicitly in the driver. To achieve this,
a reserved-memory node must exist in the root of the
device tree, so we need to pull that out of the
motherboard .dtsi include files, and push it into each
top-level device tree instead.

We do the same manouver for all the Versatile Express
boards, taking into account the different location of the
video RAM depending on which chip select is used on
each platform.

This plays nicely with the new PL111 DRM driver and
follows the standard ways of assigning bridges and
memory pools for graphics.

Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Mali DP Maintainers <malidp@foss.arm.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Tested-by: default avatarLiviu Dudau <liviu.dudau@arm.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      f1fe12c8
    • Martin Blumenstingl's avatar
      ARM: dts: meson: add the clock inputs for the Meson timer · 7b141abe
      Martin Blumenstingl authored 
      The Meson Timer IP block has two clock inputs:
- clk81 for using the system clock as timebase
- xtal for a timebase with 1us, 10us, 100us and 1ms resolution

The clocksource driver does not use these yet, but it's still a good
idea to add them as this describes how the hardware actually works
internally.
Signed-off-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: default avatarKevin Hilman <khilman@baylibre.com>
      7b141abe
    • Martin Blumenstingl's avatar
      ARM: dts: meson: add the TIMER B/C/D interrupts · 523b8b31
      Martin Blumenstingl authored 
      The timer on Meson6/Meson8/Meson8b SoCs has four internal timer events.
For each of these a separate interrupt exists.
Pass these interrupts to allow using the timers other than TIMER A.
Signed-off-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: default avatarKevin Hilman <khilman@baylibre.com>
      523b8b31
    • Jerome Brunet's avatar
      ARM: dts: meson: consistently disable pin bias · 7e26335b
      Jerome Brunet authored 
      On Amlogic chipsets, the bias set through pinconf applies to the pad
itself, not only the GPIO function. This means that even when we change
the function of the pad from GPIO to anything else, the bias previously
set still applies.

As we have seen with the eMMC, depending on the bias type and the function,
it may trigger problems.

The underlying issue is that we inherit whatever was left by previous user
of the pad (pinconf, u-boot or the ROM code). As a consequence, the actual
setup we will get is undefined.

There is nothing mentioned in the documentation about pad bias and pinmux
function, however leaving it undefined is not an option.

This change consistently disable the pad bias for every pinmux functions.
It seems to work well, we can only assume that the necessary bias (if any)
is already provided by the pin function itself.
Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
Acked-by: Martin Blumenstingl<martin.blumenstingl@googlemail.com>
Signed-off-by: default avatarKevin Hilman <khilman@baylibre.com>
      7e26335b
  5. 28 Nov, 2018 17 commits
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