- 07 Feb, 2018 10 commits
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Felix Kuehling authored
This can be used for flushing caches when not using the HWS. Signed-off-by:
Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by:
Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by:
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Felix Kuehling authored
v2: * Removed unused flags from struct kgd_mem * Updated some comments * Added a check to unmap_memory_from_gpu whether BO was mapped v3: add mutex_destroy in relevant places Signed-off-by:
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Felix Kuehling authored
Cloning a sync object is useful for waiting for a sync object without locking the original structure indefinitely, blocking other threads. Signed-off-by:
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Felix Kuehling authored
Add GPUVM size and DRM render node. Also add function to query the VMID mask to avoid hard-coding it in multiple places later. v2: cut off GPUVM size at the VA hole Signed-off-by:
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Felix Kuehling authored
This fence is used by KFD to keep memory resident while user mode queues are enabled. Trying to evict memory will trigger the enable_signaling callback, which starts a KFD eviction, which involves preempting user mode queues before signaling the fence. There is one such fence per process. v2: * Grab a reference to mm_struct * Dereference fence after NULL check * Simplify fence release, no need to signal without anyone waiting * Added signed-off-by Harish, who is the original author of this code v3: * update MAINTAINERS file * change amd_kfd_ prefix to amdkfd_ * remove useless initialization of variable to NULL v4: * set amdkfd_fence_ops to be static * Suggested by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by:
Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by:
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Felix Kuehling authored
Signed-off-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Felix Kuehling authored
Signed-off-by:
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Felix Kuehling authored
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Yong Zhao authored
The extra fields in struct kgd_mem aren't actually needed. This struct will be used for GPUVM allocations later. Signed-off-by:
Yong Zhao <yong.zhao@amd.com> Signed-off-by:
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Felix Kuehling authored
Dereferencing NULL pointers will cause a BUG anyway. No need to do an explicit check. Signed-off-by:
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- 04 Jan, 2018 7 commits
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Felix Kuehling authored
Signed-off-by:
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Felix Kuehling authored
v2: remove needs_iommu field as it doesn't exists CC: linux-pci@vger.kernel.org Signed-off-by:
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Felix Kuehling authored
Recognize dGPU ASIC families. Signed-off-by:
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Felix Kuehling authored
On dGPUs don't set ATC addressing bits and use MTYPE_UC for coherent memory. Signed-off-by:
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Felix Kuehling authored
GFXv7 and v8 dGPUs use a different addressing mode for KFD compared to APUs (GPUVM64 vs HSA64). And dGPUs don't support MTYPE_CC. They use MTYPE_UC instead for memory that requires coherency. Signed-off-by:
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Felix Kuehling authored
Some dGPUs don't support HWS. Allow them to use a per-device sched_policy that may be different from the global default. Signed-off-by:
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Felix Kuehling authored
This will be needed for most dGPUs. CC: linux-pci@vger.kernel.org Signed-off-by:
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- 19 Jan, 2018 1 commit
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Gustavo A. R. Silva authored
Use ARRAY_SIZE instead of dividing sizeof array with sizeof an element. This issue was detected with the help of Coccinelle. Signed-off-by:
Gustavo A. R. Silva <garsilva@embeddedor.com> Reviewed-by: Felix Kuehling<Felix.Kuehling@amd.com> Signed-off-by:
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- 29 Jan, 2018 1 commit
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Oded Gabbay authored
In dma_fence_release() there is a WARN_ON which could be triggered by several cases of wrong dma-fence usage. This patch adds a comment to explain two use-cases to help driver developers that use dma-fence and trigger that WARN_ON to better understand the reasons for it. v2: change to a more generic, one-liner comment Reviewed-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by:
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- 09 Mar, 2018 2 commits
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
More stuff for 4.17. Highlights: - More fixes for "wattman" like functionality (fine grained clk/voltage control) - Add more power profile infrastucture (context based dpm) - SR-IOV fixes - Add iomem debugging interface for use with umr - Powerplay and cgs cleanups - DC fixes and cleanups - ttm improvements - Misc cleanups all over * 'drm-next-4.17' of git://people.freedesktop.org/~agd5f/linux: (143 commits) drm/amdgpu:Always save uvd vcpu_bo in VM Mode drm/amdgpu:Correct max uvd handles drm/amdgpu: replace iova debugfs file with iomem (v3) drm/amd/display: validate plane format on primary plane drm/amdgpu: Clean sdma wptr register when only enable wptr polling drm/amd/amdgpu: re-add missing GC 9.1 and SDMA0 4.1 sh_mask header files drm/amdgpu: give warning before sleep in kiq_r/wreg drm/amdgpu: further mitigate workaround for i915 drm/amdgpu: drop gtt->adev drm/amdgpu: add amdgpu_evict_gtt debugfs entry drm/amd/pp: Add #ifdef checks for CONFIG_ACPI drm/amd/pp: fix "Delete the wrapper layer of smu_allocate/free_memory" drm/amd/pp: Drop wrapper functions for upper/lower_32_bits drm/amdgpu: Delete cgs wrapper functions for gpu memory manager drm/amd/pp: Delete the wrapper layer of smu_allocate/free_memory drm/amd/pp: Remove cgs wrapper function for temperature update Revert "drm/amd/pp: Add a pp feature mask bit for AutoWattman feature" drm/amd/pp: Add auto power profilng switch based on workloads (v2) drm/amd/pp: Revert gfx/compute profile switch sysfs drm/amd/pp: Fix sclk in highest two levels when compute on smu7 ...
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git://linuxtv.org/pinchartl/mediaDave Airlie authored
- Convert LVDS support to a drm_bridge driver - Add DT bindings for the R8A77995 SoC - Add DT bindings and driver support for the R8A77970 SoC Note that the LVDS conversion depends on a patch series from Frank Rowand that will make it upstream through Rob Herring's tree. Frank has provided a stable branch based on v4.16-rc1 with the patches, and both Rob and I have merged it into our trees. This should thus generate no conflict when reaching -next. * 'drm/next/du' of git://linuxtv.org/pinchartl/media: dt-bindings: display: renesas: lvds: Document r8a77995 bindings dt-bindings: display: renesas: du: Document r8a77995 bindings drm: rcar-du: lvds: Add R8A77970 support drm: rcar-du: Add R8A77970 support dt-bindings: display: renesas: lvds: Document R8A77970 bindings dt-bindings: display: renesas: du: Document R8A77970 bindings drm: rcar-du: Convert LVDS encoder code to bridge driver drm: rcar-du: Fix legacy DT to create LVDS encoder nodes dt-bindings: display: renesas: Deprecate LVDS support in the DU bindings dt-bindings: display: renesas: Add R-Car LVDS encoder DT bindings of: improve reporting invalid overlay target path of: convert unittest overlay devicetree source to sugar syntax of: Documentation: of_overlay_apply() replaced by of_overlay_fdt_apply() of: change overlay apply input data from unflattened to FDT x86: devicetree: fix config option around x86_flattree_get_config()
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- 07 Mar, 2018 19 commits
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James Zhu authored
When UVD is in VM mode, there is not uvd handle exchanged, uvd.handles are always 0. So vcpu_bo always need save, Otherwise amdgpu driver will fail during suspend/resume. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105021Signed-off-by:
James Zhu <James.Zhu@amd.com> Reviewed-by:
Leo Liu <leo.liu@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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James Zhu authored
Max uvd handles should use adev->uvd.max_handles instead of AMDGPU_MAX_UVD_HANDLES here. Signed-off-by:
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Tom St Denis authored
This allows access to pages allocated through the driver with optional IOMMU mapping. v2: Fix number of bytes copied and add write method v3: drop check for kmap return Original-by:
Tom St Denis <tom.stdenis@amd.com> Reviewed-by:
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Shirish S authored
In dce110, the plane configuration is such that plane 0 or the primary plane should be rendered with only RGB data. This patch adds the validation to ensure that no video data is rendered on plane 0. Signed-off-by:
Shirish S <shirish.s@amd.com> Reviewed-by:
Tony Cheng <Tony.Cheng@amd.com> Signed-off-by:
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Emily Deng authored
The sdma wptr polling memory is not fast enough, then the sdma wptr register will be random, and not equal to sdma rptr, which will cause sdma engine hang when load driver, so clean up the sdma wptr directly to fix this issue. v2:add comment above the code and correct coding style Reviewed-by:
Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by:
Emily Deng <Emily.Deng@amd.com> Signed-off-by:
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Tom St Denis authored
These are required by umr to properly parse bitfield offsets. Signed-off-by:
Alex Deucher <alexdeucher@amd.com> Signed-off-by:
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Monk Liu authored
to catch error that may schedule in atomic context early on Signed-off-by:
Monk Liu <Monk.Liu@amd.com> Reviewed-by:
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Christian König authored
Disable the workaround on imported BOs as well. Signed-off-by:
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Christian König authored
We can use ttm->bdev instead. Signed-off-by:
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Christian König authored
Allow evicting all BOs from the GTT domain. Signed-off-by:
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Rex Zhu authored
Fix compiling error when CONFIG_ACPI not enabled. Change-Id: I5f901adbc799c10b30e5ea79f8f44760e749fae1 Reviewed-by:
Rex Zhu <Rex.Zhu@amd.com>
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Christian König authored
For amdgpu_bo_create_kernel to work the handle must be NULL initialized, otherwise we only try to pin and map the BO. Signed-off-by:
Rex Zhu <rezhu@amd.com> Signed-off-by:
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Rex Zhu authored
replace smu_upper_32_bits/smu_lower_32_bits with the standard kernel macros Reviewed-by:
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Rex Zhu authored
delete those cgs interfaces: amdgpu_cgs_alloc_gpu_mem amdgpu_cgs_free_gpu_mem amdgpu_cgs_gmap_gpu_mem amdgpu_cgs_gunmap_gpu_mem amdgpu_cgs_kmap_gpu_mem amdgpu_cgs_kunmap_gpu_mem Reviewed-by:
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Rex Zhu authored
use amdgpu_bo_create/free_kernel instand. Reviewed-by:
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Rex Zhu authored
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Rex Zhu authored
This reverts commit e429ea87b2939c4cce1b439baf6d76535a0767f2. Implement Workload Aware Dynamic power management instand of AutoWattman feature in linux. Reviewed-by:
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Rex Zhu authored
Add power profiling mode dynamic switch based on the workloads. Currently, support Cumpute, VR, Video, 3D,power saving with Cumpute have highest prority, power saving have lowest prority. in manual dpm mode, driver will stop auto switch, just save the client's requests. user can set power profiling mode through sysfs. when exit manual dpm mode, driver will response the client's requests. switch based on the client's prority. v2: squash in fixes from Rex Reviewed-by:
Evan Quan <evan.quan@amd.com> Signed-off-by:
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Kieran Bingham authored
The D3 (r8a77995) supports two LVDS channels. Extend the binding to support them. Signed-off-by:
Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> [Fixed compatible string] Reviewed-by:
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by:
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