- 24 Sep, 2021 13 commits
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AngeloGioacchino Del Regno authored
All smartphones in the Sony Yoshino platforms have got a simple vibrator hooked to a GPIO: add support for that and add its own pin configuration. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Reviewed-by:
Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210909123733.367248-4-angelogioacchino.delregno@somainline.org
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AngeloGioacchino Del Regno authored
This platform uses the WCN3990 Bluetooth chip, reachable on UART-3. Signed-off-by:
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AngeloGioacchino Del Regno authored
All of the devices in the Sony Yoshino platform are using a Synaptics RMI4-compatible touch IC with identical pins and supplies: enable the I2C-5 bus and add the rmi4-i2c node along with the required pin configurations. Signed-off-by:
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AngeloGioacchino Del Regno authored
This commit introduces support for the Sony Yoshino platform, using the MSM8998 SoC, including: - Sony Xperia XZ1 (codename Poplar), - Sony Xperia XZ1 Compact (codename Lilac), - Sony Xperia XZ Premium (codename Maple). All of the three aforementioned smartphones are sharing a 99% equal board configuration, with very small differences between each other, which is the reason for the introduction of a common msm8998-sony-xperia-yoshino DT. This base configuration includes regulators and project-wide pin configurations and it's made to boot to a serial console. Signed-off-by:
Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by:
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Shawn Guo authored
It turns out that the pm660 PON is a GEN2 device. Update the compatible to "qcom,pm8998-pon" and add reboot mode support, so that devices can be rebooted into bootloader and recovery mode. Tested on Xiaomi Redmi Note 7 phone. While at it, drop the unnecessary newline between 'compatible' and 'reg' property. Signed-off-by:
Shawn Guo <shawn.guo@linaro.org> Reviewed-by:
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Rajesh Patil authored
Add aliases for i2c and spi for sc7280 soc. Signed-off-by:
Rajesh Patil <rajpat@codeaurora.org> Reviewed-by:
Stephen Boyd <swboyd@chromium.org> Signed-off-by:
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Roja Rani Yarubandi authored
Add QUPv3 wrapper_1 DT nodes for SC7280 SoC. Signed-off-by:
Roja Rani Yarubandi <rojay@codeaurora.org> Signed-off-by:
Matthias Kaehlcke <mka@chromium.org> Reviewed-by:
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Rajesh Patil authored
Add bluetooth uart pin configuration for sc7280-idp. Signed-off-by:
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Roja Rani Yarubandi authored
Uart5 is treated as dedicated debug uart.Change the compatible as "qcom,geni-uart" in SoC DT to make it generic and later update it as "qcom,geni-debug-uart" in sc7280-idp Add interconnects and power-domains. Split the pinctrl functions and correct the gpio pins. Signed-off-by:
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Roja Rani Yarubandi authored
Add QUPv3 wrapper_0 DT nodes for SC7280 SoC. Signed-off-by:
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Rajesh Patil authored
Add spi-nor flash node and pinctrl configurations for the SC7280 IDP. Signed-off-by:
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Roja Rani Yarubandi authored
Add QSPI DT node and qspi_opp_table for SC7280 SoC. Move qspi_opp_table to / because SPI nodes assume any child node is a spi device and so we can't put the table underneath the spi controller. Signed-off-by:
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Fabio Estevam authored
dtc complains about the leading zeroes: arch/arm64/boot/dts/qcom/sm6125.dtsi:497.19-503.6: Warning (unit_address_format): /soc/timer@f120000/frame@0f121000: unit name should not have leading 0s arch/arm64/boot/dts/qcom/sm6125.dtsi:505.19-510.6: Warning (unit_address_format): /soc/timer@f120000/frame@0f123000: unit name should not have leading 0s arch/arm64/boot/dts/qcom/sm6125.dtsi:512.19-517.6: Warning (unit_address_format): /soc/timer@f120000/frame@0f124000: unit name should not have leading 0 Remove them. Signed-off-by:
Fabio Estevam <festevam@gmail.com> Reviewed-by:
Martin Botka <martin.botka@somainline.org> Signed-off-by:
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- 23 Sep, 2021 1 commit
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Shaik Sajida Bhanu authored
The current drive strength values are not sufficient on non discrete boards and this leads to CRC errors during switching to HS400 enhanced strobe mode. Hardware simulation results on non discrete boards shows up that use the maximum drive strength values for data and command lines could helps in avoiding these CRC errors. So, update data and command line drive strength values to maximum. Signed-off-by:
Shaik Sajida Bhanu <sbhanu@codeaurora.org> Reviewed-by:
Douglas Anderson <dianders@chromium.org> Signed-off-by:
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- 21 Sep, 2021 26 commits
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Sujit Kautkar authored
Enable the IPA node for LTE and skip for wifi-only SKUs Signed-off-by:
Sujit Kautkar <sujitka@chromium.org> Reviewed-by:
Alex Elder <elder@linaro.org> Signed-off-by:
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Stephan Gerhold authored
According to Documentation/devicetree/bindings/mmc/sdhci-msm.txt a SoC specific compatible should be used in addition to the IP version compatible, but for some reason it was never added for MSM8916. Add the "qcom,msm8916-sdhci" compatible additionally to make the device tree match the documented bindings. Signed-off-by:
Stephan Gerhold <stephan@gerhold.net> Reviewed-by:
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Stephan Gerhold authored
This fixes the following warning when building with W=1: Warning (unit_address_vs_reg): /soc: node has a reg or ranges property, but no unit name Signed-off-by:
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Stephen Boyd authored
Let's use the GIC_SPI macro instead of a plain 0 here to match other uses of the primary interrupt controller on sc7280. Suggested-by:
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Manaf Meethalavalappu Pallikunhi authored
Add cooling-cells property and the cooling maps for the gpu thermal zones to support GPU thermal cooling. Signed-off-by:
Manaf Meethalavalappu Pallikunhi <manafm@codeaurora.org> Signed-off-by:
Akhil P Oommen <akhilpo@codeaurora.org> Reviewed-by:
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Akhil P Oommen authored
Add the necessary dt nodes for gpu support in sc7280. Signed-off-by:
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Taniya Das authored
Add the GPUCC, DISPCC and VIDEOCC clock headers which were dropped earlier. Signed-off-by:
Taniya Das <tdas@codeaurora.org> Reviewed-by:
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satya priya authored
Add pm7325 PMIC gpio support for vol+ on sc7280-idp. Signed-off-by:
satya priya <skakit@codeaurora.org> Reviewed-by:
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Dmitry Baryshkov authored
Enable powerkey and resin nodes to let the board handle POWER and Volume- keys properly. Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
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Dmitry Baryshkov authored
Specify recovery and bootloader magic values to be programmed by the qcom-pon driver. This allows the bootloader to handle reboot-to-bootloader functionality. Signed-off-by:
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Dmitry Baryshkov authored
Change pm8150 to use the qcom,pm8998-pon compatible string for the pon in order to pass reboot mode properly. Fixes: 5101f22a ("arm64: dts: qcom: pm8150: Add base dts file") Signed-off-by:
Amit Pundir <amit.pundir@linaro.org> Signed-off-by:
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Kathiravan T authored
Based on downstream codeaurora code. Tested (USB2 only) on IPQ6010 based hardware. Signed-off-by:
Kathiravan T <kathirav@codeaurora.org> Signed-off-by:
Baruch Siach <baruch@tkos.co.il> [bjorn: Changed dwc3 node name to usb, per binding] Signed-off-by:
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Shawn Guo authored
Follow dma-controller.yaml schema to use `dma-controller` as node name of BAM DMA devices. Signed-off-by:
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Douglas Anderson authored
There's nothing magical about GPIO91 and boards could use different GPIOs for card detect. Move the pin out of the dtsi file and to the only existing board file. Signed-off-by:
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Shawn Guo authored
Property qcom,controlled-remotely should be boolean. Fix it. Signed-off-by:
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Shawn Guo authored
Property qcom,controlled-remotely should be boolean. Fix it. Signed-off-by:
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Shawn Guo authored
Property qcom,controlled-remotely should be boolean. Fix it. Signed-off-by:
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Rajendra Nayak authored
sc7280 has 8 big.LITTLE CPUs setup with DynamIQ, so all cores are within the same CPU cluster. Add cpu-map to define the CPU topology. Signed-off-by:
Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by:
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Bjorn Andersson authored
The firmware for the modem and WiFi subsystems platform specific and is signed with a OEM specific key (or a test key). In order to support more than a single device it is therefor not possible to rely on the default path and stash these files directly in the firmware directory. This has already been addressed for other platforms, but the APQ8016 SBC (aka db410c) was never finished upstream. Signed-off-by:
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Steev Klimaszewski authored
On the Lenovo Yoga C630, the WiFi/BT chip can use both RF channels/antennas, so add the regulator for it. Signed-off-by:
Steev Klimaszewski <steev@kali.org> Signed-off-by:
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Kuogee Hsieh authored
Existing display port phy reg property is derived from usb phy which map display port phy pcs to wrong address which cause aux init with wrong address and prevent both dpcd read and write from working. Fix this problem by assigning correct pcs address to display port phy reg property. Fixes: bb9efa59 ("arm64: dts: qcom: sc7280: Add USB related nodes") Signed-off-by:
Kuogee Hsieh <khsieh@codeaurora.org> Reviewed-by:
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Matthias Kaehlcke authored
Homestar is a trogdor variant. The DT bits are essentially the same as in the downstream tree, except for: - skip -rev0 and rev1 which were early builds and have their issues, it's not very useful to support them upstream - don't include the .dtsi for the MIPI cameras, which doesn't exist upstream Signed-off-by:
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Robert Marko authored
IPQ8074 uses SPMI for communication with the PMIC, so since its already supported add the DT node for it. Signed-off-by:
Robert Marko <robimarko@gmail.com> Signed-off-by:
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AngeloGioacchino Del Regno authored
The PMI8998 PMIC has a WLED backlight controller, which is used on most MSM8998 and SDM845 based devices: add a base configuration for it and keep it disabled. This contains only the PMIC specific configuration that does not change across boards; parameters like number of strings, OVP and current limits are product specific and shall be specified in the product DT in order to achieve functionality. Signed-off-by:
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Matthias Kaehlcke authored
The charger thermistor on Lazor, CoachZ rev1 and Pompom rev1+2 is either the wrong part or not stuffed at all, the same is true for the skin temperature thermistor on CoachZ rev1. The corresponding thermal zones are already disabled for these devices, in addition delete the ADC nodes of the thermistors. For Lazor and CoachZ rev1 also disable the PM6150 ADC and thermal monitor since none of the ADC channels is used. Signed-off-by:
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Robert Marko authored
tx-fifo-resize is now added by default by the dwc3-qcom driver to the SNPS DWC3 child node. So, lets drop the tx-fifo-resize property from dwc3-qcom nodes as having it there will cause the dwc3-qcom driver to error and abort probe with: [ 1.362938] dwc3-qcom 8af8800.usb: unable to add property [ 1.368405] dwc3-qcom 8af8800.usb: failed to register DWC3 Core, err=-17 Fixes: cefdd52f ("usb: dwc3: dwc3-qcom: Enable tx-fifo-resize property by default") Signed-off-by:
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