- 03 Sep, 2019 7 commits
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Alex Vesker authored
Domain is the frame for all of the dr (direct rule) objects. There are different domain types which also affect the object under that domain. Each domain can hold multiple tables which can hold multiple matchers and so on, this means that all of the dr (direct rule) objects exist under a specific domain. The domain object also holds the resources needed for other objects such as memory management and communication with the device. Signed-off-by: Alex Vesker <valex@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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Alex Vesker authored
Steering Entry (STE) object is the basic building block of the steering map. There are several types of STEs. Each rule can be constructed of multiple STEs. Each STE dictates which fields of the packet's header are being matched as well as the information about the next step in map (hit and miss pointers). The hardware gets a packet and tries to match it against the STEs, going to either the hit pointer or the miss pointer. This file handles the STE operations. Signed-off-by: Alex Vesker <valex@mellanox.com> Signed-off-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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Alex Vesker authored
Inserting or deleting a rule is done by RDMA read/write operation to SW ICM device memory. This file provides the support for executing these operations. It includes allocating the needed resources and providing an API for writing steering entries to the memory. Signed-off-by: Alex Vesker <valex@mellanox.com> Signed-off-by: Mark Bloch <markb@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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Alex Vesker authored
ICM device memory is used for writing steering rules (STEs) to the NIC. An ICM memory pool allocator was implemented to manage the required memory. The pool consists of buckets, a bucket per chunk size. Once a bucket is empty we will cut a row of memory from the latest allocated MR, if the MR size is not sufficient we will allocate a new MR. HW design requires that chunks memory address should be aligned to the chunk size, this is the reason for managing the MR with row size that insures memory alignment. Current design is greedy in memory but provides quick allocation times in steady state. Signed-off-by: Alex Vesker <valex@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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Alex Vesker authored
Add direct rule command utilities which consists of all the FW commands that are executed to provide the SW steering functionality. Signed-off-by: Alex Vesker <valex@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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Alex Vesker authored
Add the internal header file that contains various types definition that will be used in coming patches as well as the internal functions decelerations. Signed-off-by: Alex Vesker <valex@mellanox.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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Maor Gottlieb authored
Add flow steering actions: modify header and packet reformat to the fs_cmd shim layer. This allows each namespace to define possibly different functionality for alloc/dealloc action commands. Signed-off-by: Maor Gottlieb <maorg@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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- 02 Sep, 2019 6 commits
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git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linuxSaeed Mahameed authored
Merge mlx5-next patches needed for upcoming mlx5 software steering. 1) Alex adds HW bits and definitions required for SW steering 2) Ariel moves device memory management to mlx5_core (From mlx5_ib) 3) Maor, Cleanups and fixups for eswitch mode and RoCE 4) Mark, Set only stag for match untagged packets Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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Mark Bloch authored
cvlan_tag enabled in match criteria and disabled in match value means both S & C tags don't exist (untagged of both). Signed-off-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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Maor Gottlieb authored
Return MLX5_ESWITCH_NONE when CONFIG_MLX5_ESWITCH is not selected. Signed-off-by: Maor Gottlieb <maorg@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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Maor Gottlieb authored
Move the check if RoCE steering is initialized to the disable RoCE function, it will ensure that we disable RoCE only if we succeeded in enabling it before. Fixes: 80f09dfc ("net/mlx5: Eswitch, enable RoCE loopback traffic") Signed-off-by: Maor Gottlieb <maorg@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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Alex Vesker authored
Add the required Software Steering hardware definitions and bits to mlx5_ifc. Signed-off-by: Alex Vesker <valex@mellanox.com> Signed-off-by: Yevgeny Klitenik <kliten@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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Ariel Levkovich authored
Move the device memory allocation and deallocation commands SW ICM memory to mlx5_core to expose this API for all mlx5_core users. This comes as preparation for supporting SW steering in kernel where it will be required to allocate and register device memory for direct rule insertion. In addition, an API to register this device memory for future remote access operations is introduced using the create_mkey commands. Signed-off-by: Ariel Levkovich <lariel@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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- 01 Sep, 2019 23 commits
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David S. Miller authored
Vivien Didelot says: ==================== net: dsa: mv88e6xxx: centralize SERDES IRQ handling Following Marek's work on the abstraction of the SERDES lanes mapping, this series trades the .serdes_irq_setup and .serdes_irq_free callbacks for new .serdes_irq_mapping, .serdes_irq_enable and .serdes_irq_status operations. This has the benefit to limit the various SERDES implementations to simple register accesses only; centralize the IRQ handling and mutex locking logic; as well as reducing boilerplate in the driver. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
The .serdes_irq_setup are all following the same steps: get the SERDES lane, get the IRQ mapping, request the IRQ, then enable it. So do the .serdes_irq_free implementations: get the SERDES lane, disable the IRQ, then free it. This patch removes these operations in favor of generic functions. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
Introduce a new .serdes_irq_status operation to prepare the abstraction of IRQ thread from the SERDES IRQ setup code. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
Introduce a new .serdes_irq_enable operation to prepare the abstraction of IRQ enabling from the SERDES IRQ setup code. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
Now the first step of all .serdes_power implementations is getting the lane mapping. Since we have an operation for that, call it in the wrapper and pass the lane down to the .serdes_power operation. This also allows to avoid querying the SERDES lane twice in mv88e6xxx_port_set_cmode. At the same time provide mv88e6xxx_serdes_power_{up,down} helpers and prefer up/down instead of on/off as in the documentation. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
The mv88e6352_serdes_power_set helper is only used at one place, in mv88e6352_serdes_power. Keep it simple and merge the two functions together. Use mv88e6xxx_serdes_get_lane instead of mv88e6352_port_has_serdes to avoid moving code. No functional changes. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
Even though 88E6352 has no dedicated lane for SERDES interfaces, it uses a similar code as the other .serdes_get_lane implementations to check the port's CMODE and ensure that SERDES operations are doable. For consistency, implement mv88e6352_serdes_get_lane for the 88E6352 and similar switches which simply returns an unused 0xff lane address. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
Because the mapping between a SERDES interface and its lane is static, we don't need to stick with negative error codes actually and we can simply return 0 if there is no lane, just like the IRQ mapping. This way we can keep a simple and intuitive API using unsigned lane numbers while simplifying the implementations with single return statements. Last but not least, fix the reverse chrismas tree in mv88e6390x_serdes_get_lane. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
Introduce a new .serdes_irq_mapping operation to prepare the abstraction of IRQ mapping from the SERDES IRQ setup code. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
The current mv88e6xxx SERDES code checks for negative error code from irq_find_mapping, while this function returns an unsigned integer. This patch removes this dead code and simply returns 0 is no IRQ is found. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
The mv88e6352_serdes_irq_link helper is not checking for any error that may occur during hardware accesses. Worst, the "up" boolean is set from the potentially unused "status" variable, if read operations failed. As done in mv88e6390_serdes_irq_link_sgmii, return right away and do not call dsa_port_phylink_mac_change if an error occurred. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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YueHaibing authored
Fixes gcc '-Wunused-but-set-variable' warning: drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c: In function 'hclge_restore_vlan_table': drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c:8016:18: warning: variable 'qos' set but not used [-Wunused-but-set-variable] Reported-by: Hulk Robot <hulkci@huawei.com> Fixes: 70a21490 ("net: hns3: reduce the parameters of some functions") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Colin Ian King authored
Pointer reg_info is being initialized with a value that is never read and is being re-assigned a little later on. The assignment is redundant and hence can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Colin Ian King authored
Pointer iter is being initialized with a value that is never read and is being re-assigned a little later on. The assignment is redundant and hence can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Paul Moore <paul@paul-moore.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Heiner Kallweit authored
RTL8125 uses a different register for VLAN offloading config, therefore don't set bit RxVlan. Fixes: f1bce4ad ("r8169: add support for RTL8125") Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ben Wei authored
This patch adds handlers for PLDM over NC-SI command response. This enables NC-SI driver recognizes the packet type so the responses don't get dropped as unknown packet type. PLDM over NC-SI are not handled in kernel driver for now, but can be passed back to user space via Netlink for further handling. Signed-off-by: Ben Wei <benwei@fb.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Parav Pandit says: ==================== Minor cleanup in devlink Two minor cleanup in devlink. Patch-1 Explicitly defines devlink port index as unsigned int Patch-2 Uses switch-case to handle different port flavours attributes ==================== Acked-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Parav Pandit authored
Make core more readable with switch-case for various port flavours. Acked-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Parav Pandit <parav@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Parav Pandit authored
Devlink port index attribute is returned to users as u32 through netlink response. Change index data type from 'unsigned' to 'unsigned int' to avoid below checkpatch.pl warning. WARNING: Prefer 'unsigned int' to bare use of 'unsigned' 81: FILE: include/net/devlink.h:81: + unsigned index; Acked-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Parav Pandit <parav@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Davide Caratti says: ==================== net: tls: add socket diag The current kernel does not provide any diagnostic tool, except getsockopt(TCP_ULP), to know more about TCP sockets that have an upper layer protocol (ULP) on top of them. This series extends the set of information exported by INET_DIAG_INFO, to include data that are specific to the ULP (and that might be meaningful for debug/testing purposes). patch 1/3 ensures that the control plane reads/updates ULP specific data using RCU. patch 2/3 extends INET_DIAG_INFO and allows knowing the ULP name for each TCP socket that has done setsockopt(TCP_ULP) successfully. patch 3/3 extends kTLS to let programs like 'ss' know the protocol version and the cipher in use. Changes since v2: - remove unneeded #ifdef and fix reverse christmas tree in tls_get_info(), thanks to Jakub Kicinski Changes since v1: - don't worry about grace period when accessing ulp_ops, thanks to Jakub Kicinski and Eric Dumazet - use rcu_dereference() to access ULP data in tls get_info(), and test against NULL value, thanks to Jakub Kicinski - move RCU protected section inside tls get_info(), thanks to Jakub Kicinski Changes since RFC: - some coding style fixes, thanks to Jakub Kicinski - add X_UNSPEC as lowest value of uAPI enums, thanks to Jakub Kicinski - fix assignment of struct nlattr *start, thanks to Jakub Kicinski - let tls dump RXCONF and TXCONF, suggested by Jakub Kicinski - don't dump anything if TLS version or cipher are 0 (but still return a constant size in get_aux_size()), thanks to Boris Pismenny - constify first argument of get_info() and get_size() - use RCU to access access ulp_ops, like it's done for ca_ops - add patch 1/3, from Jakub Kicinski ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Davide Caratti authored
When an application configures kernel TLS on top of a TCP socket, it's now possible for inet_diag_handler() to collect information regarding the protocol version, the cipher type and TX / RX configuration, in case INET_DIAG_INFO is requested. Signed-off-by: Davide Caratti <dcaratti@redhat.com> Reviewed-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Davide Caratti authored
currently, only getsockopt(TCP_ULP) can be invoked to know if a ULP is on top of a TCP socket. Extend idiag_get_aux() and idiag_get_aux_size(), introduced by commit b37e8840 ("inet_diag: allow protocols to provide additional data"), to report the ULP name and other information that can be made available by the ULP through optional functions. Users having CAP_NET_ADMIN privileges will then be able to retrieve this information through inet_diag_handler, if they specify INET_DIAG_INFO in the request. Signed-off-by: Davide Caratti <dcaratti@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jakub Kicinski authored
We need to make sure context does not get freed while diag code is interrogating it. Free struct tls_context with kfree_rcu(). We add the __rcu annotation directly in icsk, and cast it away in the datapath accessor. Presumably all ULPs will do a similar thing. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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- 31 Aug, 2019 4 commits
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David S. Miller authored
Sudarsana Reddy Kalluru says: ==================== qed*: Enhancements. The patch series adds couple of enhancements to qed/qede drivers. - Support for dumping the config id attributes via ethtool -w/W. - Support for dumping the GRC data of required memory regions using ethtool -w/W interfaces. Patch (1) adds driver APIs for reading the config id attributes. Patch (2) adds ethtool support for dumping the config id attributes. Patch (3) adds support for configuring the GRC dump config flags. Patch (4) adds ethtool support for dumping the grc dump. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Sudarsana Reddy Kalluru authored
This patch adds driver support for configuring grc dump config flags, and dumping the grc data via ethtool get/set-dump interfaces. Signed-off-by: Sudarsana Reddy Kalluru <skalluru@marvell.com> Signed-off-by: Ariel Elior <aelior@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Sudarsana Reddy Kalluru authored
The patch adds driver support for configuring the grc dump config flags. Signed-off-by: Sudarsana Reddy Kalluru <skalluru@marvell.com> Signed-off-by: Ariel Elior <aelior@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Sudarsana Reddy Kalluru authored
Add driver support for dumping the config id attributes via ethtool dump interfaces. Signed-off-by: Sudarsana Reddy Kalluru <skalluru@marvell.com> Signed-off-by: Ariel Elior <aelior@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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