1. 19 Nov, 2012 1 commit
  2. 16 Nov, 2012 3 commits
  3. 13 Nov, 2012 5 commits
  4. 12 Nov, 2012 6 commits
    • Archit Taneja's avatar
      OMAPDSS: APPLY: Remove unnecessary call to mg_clear_shadow_dirty · c9092902
      Archit Taneja authored
      When doing a manual update in dss_mgr_start_update, we clear the shadow dirty
      flags. Although there isn't any harm in clearing them. The need to clear them
      out here should never arrive.
      
      When applying configurations for a manual update manager, we never do any
      register writes, i.e, calls to dss_mgr_write_regs and dss_mgr_write_regs_extra
      never happen while applying. We do all these writes only when we call
      dss_mgr_start_update. Hence, there is never a time when the shadow registers
      are dirty.
      
      Remove the call to mg_clear_shadow_dirty.
      Signed-off-by: default avatarArchit Taneja <archit@ti.com>
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      c9092902
    • Archit Taneja's avatar
      OMAPDSS: APPLY: Remove unnecessary variable in dss_apply_irq_handler · ca8d4e8b
      Archit Taneja authored
      The bool was_updating is never really used for anything. It is set to the
      current value of mp->updating, but not used anywhere. Remove this variable.
      Signed-off-by: default avatarArchit Taneja <archit@ti.com>
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      ca8d4e8b
    • Archit Taneja's avatar
      OMAPDSS: APPLY: Don't treat an overlay's channel out as shadow bits · 02b5ff1a
      Archit Taneja authored
      An overlay's channel out field isn't a shadow register. The TRM says that it's
      taken into effect immediately. This understanding was missing and channel out
      was treated as a shadow parameter, and in overlay's private data as extra info.
      
      Program channel out bits directly in dss_ovl_set_manager(). In order to do this
      safely, we need to be totally sure that the overlay is disabled in hardware. For
      auto update managers, we can assume that the overlay was truly disabled at
      dss_ovl_unset_manager() through the wait_pending_extra_info_updates() call.
      However, when unsetting manager for an overlay that was previously connected to
      a manager in manual update, we can't be sure if the overlay is truly disabled.
      That is, op->enabled might not reflect the actual state of the overlay in
      hardware. The older manager may require a manual update transfer to truly
      disable the overlay. We expect the user of OMAPDSS to take care of this, in
      OMAPDSS, we make sure that an overlay's manager isn't unset if there if
      extra_info is still dirty for that overlay.
      
      The wrong understanding of channel out bits also explains the reason why we see
      sync lost when changing an overlay's manager which was previously connected to a
      manual update manager. The following sequence of events caused this:
      
      - When we disable the overlay, no register writes are actually done since the
        manager is manual update, op->enabled is set to false, and the
        extra_info_dirty flag is set. However, in hardware, the overlay is still
        enabled in both shadow and working registers.
      
      - When we unset the manager, the software just configures the overlay's manager
        to point to NULL.
      
      - When we set the overlay to a new manager(which is in auto update) through
        dss_ovl_set_manager, the check  for op->enabled passes, the channel field in
        extra info is set to the new manager. When we do an apply on this manager,
        the new channel out field is set in the hardware immediately, and since the
        overlay enable bit is still set in hardware, the new manager sees that the
        overlay is enabled, and tries to retrieve pixels from it, this leads to sync
        lost as it might be in the middle of processing a frame when we set the
        channel out bit.
      
      The solution to this was to ensure that user space does another update after
      disabling the overlay, this actually worked because the overlay was now truly
      disabled, and an immediate write to channel out didn't impact since the manager
      saw the new overlay as disabled, and doesn't try to retrieve pixels from it.
      
      Remove channel as an extra_info field. Make dss_ovl_unset_manager more strict
      about the overlay being disabled when detaching the manager. For overlays
      connected to a manual update manager, unset_manager fails if we need another
      update to disable the overlay.
      
      We still need to a manual update to ensure the overlay is disabled to get change
      the overlay's manager. We could work on doing a dummy update by using DISPC's
      capability to gate the different video port signals. This is left for later.
      
      Remove the comment about the sync lost issue.
      Signed-off-by: default avatarArchit Taneja <archit@ti.com>
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      02b5ff1a
    • Archit Taneja's avatar
      OMAPDSS: DISPC: Use output width and height to calculate row/pix inc for writeback · 6be0d73e
      Archit Taneja authored
      When calculating row and pixel increments for graphics and video pipes, we need
      to consider the dimensions of the input frame to know how to read from the
      buffer. Hence, we need to calculate these parameters from the input to the
      pipeline.
      
      For writeback, the row and pixel increments need to be calculated based on the
      output of the writeback pipeline, i.e, the dimensions of the frame after
      scaling. Ensure that dispc driver uses values of out_width and out_height when
      calling calc_dma/calc_tiler_rotation_offset.
      
      For graphics and video pipes, the original code passed the original height as
      frame_height to calc_dma_rotation_offset, and not the predecimated height. This
      is left as it is for now. We need to figure out why pre decimated height isn't
      needed.
      Signed-off-by: default avatarArchit Taneja <archit@ti.com>
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      6be0d73e
    • Archit Taneja's avatar
      OMAPDSS: DISPC: Don't allow predecimation for writeback · 1c031441
      Archit Taneja authored
      Since writeback writes to a buffer instead of reading from one, predecimation
      doesn't make sense for it. Configure the width and height predecimation limits
      to 1 if the plane is writeback.
      Signed-off-by: default avatarArchit Taneja <archit@ti.com>
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      1c031441
    • Archit Taneja's avatar
      OMAPDSS: DISPC: Fix calc_scaling_44xx() bugs for writeback pipeline · 5d501085
      Archit Taneja authored
      dispc_ovl_calc_scaling_44xx() doesn't work correctly for writeback. There are
      two issues with it:
      
      - the function tries to calculate pixel clock for the input plane using
        dispc_plane_pclk_rate(), calling this with writeback as input plane results in
        a BUG(), this function shouldn't be called for writeback at all. Fix this by
        calculating pixel clock only when we are not in mem to mem mode.
      
      - the maximum input_width is the product of the downscale ratio supported and
        the and the given output_width. This was calculated incorrectly by dividing
        output_width with maxdownscale. Fix this.
      Signed-off-by: default avatarArchit Taneja <archit@ti.com>
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      5d501085
  5. 07 Nov, 2012 3 commits
  6. 06 Nov, 2012 9 commits
  7. 05 Nov, 2012 12 commits
    • Tomi Valkeinen's avatar
      OMAPDSS: DISPC: fix DS variable name · 230edc03
      Tomi Valkeinen authored
      check_horiz_timing_omap3() has a variable named 'DS'. i386 uses DS name
      for something else, causing a compilation error. As 'DS' is not a very
      good local variable name in the first place, let's change it to 'ds',
      fixing the issue.
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      230edc03
    • Tomi Valkeinen's avatar
      Merge branch '3.8/dsi-pll-work' · a4ae0ba8
      Tomi Valkeinen authored
      Merge omapdss patches to enable using DSI PLL for DPI output.
      a4ae0ba8
    • Tomi Valkeinen's avatar
      OMAPDSS: DPI: always use DSI PLL if available · 0e8276ef
      Tomi Valkeinen authored
      We currently get the decision whether to use PRCM or DSI PLL clock for
      DPI from the board file. This is not a good way to handle it, and it
      won't work with device tree.
      
      This patch changes DPI to always use DSI PLL if it's available.
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      0e8276ef
    • Tomi Valkeinen's avatar
      OMAPDSS: DPI: verify if DSI PLL is operational · 6061675b
      Tomi Valkeinen authored
      The SoCs that have DSI module should have a working DSI PLL. However,
      some rare boards have not connected the powers to the DSI PLL.
      
      This patch adds a function that tries to power up the DSI PLL, and
      reports if that doesn't succeed. DPI uses this function to fall back to
      PRCM clocks if DSI PLL doesn't work.
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      6061675b
    • Tomi Valkeinen's avatar
      OMAPDSS: DPI: use dpi.dsidev to see whether to use dsi pll · 8a3db406
      Tomi Valkeinen authored
      Instead of using dpi_use_dsi_pll() to check if dsi pll is to be used, we
      can just check if dpi.dsidev != NULL.
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      8a3db406
    • Tomi Valkeinen's avatar
      OMAPDSS: hide dss_select_dispc_clk_source() · a5b8399f
      Tomi Valkeinen authored
      dss.c currently exposes functions to configure the dispc source clock
      and lcd source clock. There are configured separately from the output
      drivers.
      
      However, there is no safe way for the output drivers to handle dispc
      clock, as it's shared between the outputs. Thus, if, say, the DSI driver
      sets up DSI PLL and configures both the dispc and lcd clock sources to
      that DSI PLL, the resulting dispc clock could be too low for, say, HDMI.
      
      Thus the output drivers should really only be concerned about the lcd
      clock, which is what the output drivers actually use. There's lot to do
      to clean up the dss clock handling, but this patch takes one step
      forward and removes the use of dss_select_dispc_clk_source() from the
      output drivers.
      
      After this patch, the output drivers only configure the lcd source
      clock. On omap4+ the dispc src clock is never changed from the default
      PRCM source. On omap3, where the dispc and lcd clocks are actually the
      same, setting the lcd clock source sets the dispc clock source.
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      a5b8399f
    • Tomi Valkeinen's avatar
      OMAPDSS: setup default dss fck · 13a1a2b2
      Tomi Valkeinen authored
      We don't currently set the dss fck when starting up. This is not a
      problem, as we setup the fck later when configuring the pixel clocks. Or
      this is how it was for omap2, for the rest of the omaps this may not be
      so.
      
      For DSI, HDMI and also for DPI when using DSI PLL, we don't need to
      change the dss fck, and thus it may be left unconfigured. Usually the
      dss fck is already setup fine by default, but we can't trust this.
      
      This patch sets the dss fck to maximum at probe time.
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      13a1a2b2
    • Tomi Valkeinen's avatar
      OMAPDSS: add dss_calc_clock_rates() back · 930b027e
      Tomi Valkeinen authored
      dss_calc_clock_rates() was removed earlier as it was not used, but it is
      needed for DSI PLL calculations, so this patch adds it back.
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      930b027e
    • Tomi Valkeinen's avatar
      OMAPDSS: DSI: workaround for HSDiv problem · 7a98786c
      Tomi Valkeinen authored
      It looks like on many OMAP versions powers for both HSClk and HSDiv to
      be enabled to have a functional HSDiv.
      
      This patch fixes the issue by forcing both powers on.
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      7a98786c
    • Tomi Valkeinen's avatar
      OMAPDSS: DSI: skip odd dividers when pck >= 100MHz · b7f1fe54
      Tomi Valkeinen authored
      The DSI PLL and HSDivider can be used to generate the pixel clock for
      LCD overlay manager, which then goes to DPI output. On the DPI output
      pin the voltage of the signal is shifted from the OMAP's internal
      minimal voltage to 1.8V range. The shifting is not instant, and the
      higher the clock frequency, the less time there is to shift the signal
      to nominal voltage.
      
      If the HSDivider's divider is greater than one and odd, the resulting
      pixel clock does not have 50% duty cycle. For example, with a divider of
      3, the duty cycle is 33%.
      
      When combining high frequency (in the area of 140MHz+) and non-50% duty
      cycle, it has been observed the the shifter does not have enough time to
      shift the voltage enough, and this leads to bad signal which is rejected
      by monitors.
      
      As a workaround this patch makes the divider calculation skip all odd
      dividers when the required pixel clock is over 100MHz. The limit of
      100MHz is a guesstimate.
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      b7f1fe54
    • Tomi Valkeinen's avatar
      OMAPDSS: fix DPI & DSI init order · 046bc575
      Tomi Valkeinen authored
      DPI may use DSI PLL, so it depends on DSI. However, currently DPI driver
      is added first, which causes DPI initialization to fail when it tries to
      get the DSI PLL.
      
      This patch changes the init order to fix this.
      
      A better solution would be to separate DSI PLL and DSI drivers. They
      have dependencies, though, but we could still have DSI PLL as an
      independent entity that we could initialize before any of the output
      drivers.
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      046bc575
    • Tomi Valkeinen's avatar
      Merge branch '3.8/misc-2' · 9296dbd7
      Tomi Valkeinen authored
      Merge omapdss miscellaneous patches.
      9296dbd7
  8. 04 Nov, 2012 1 commit