- 12 Jul, 2023 3 commits
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Jonas Gorski authored
The openwrt.org email address is long defunct, but still pop ups from time to time when asking get_maintainer.pl. So add an entry to my currently used address. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Link: https://lore.kernel.org/r/20230708195309.72767-2-jonas.gorski@gmail.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Jonas Gorski authored
I noticed the driver is unclaimed. Since I was the last one doing substantial work on it, add me as the maintainer. As it is only found in legacy products, mark it as "Odd Fixes" instead of "Maintained". Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://lore.kernel.org/r/20230708195309.72767-1-jonas.gorski@gmail.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Jaewon Kim authored
When SPI loopback transfer is performed, S3C64XX_SPI_MODE_SELF_LOOPBACK bit still remained. It works as loopback even if the next transfer is not spi loopback mode. If not SPI_LOOP, needs to clear S3C64XX_SPI_MODE_SELF_LOOPBACK bit. Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com> Fixes: ffb7bcd3 ("spi: s3c64xx: support loopback mode") Reviewed-by: Chanho Park <chanho61.park@samsung.com> Link: https://lore.kernel.org/r/20230711082020.138165-1-jaewon02.kim@samsung.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 10 Jul, 2023 2 commits
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Jonas Gorski authored
The command word is defined as following: /* Command */ #define SPI_CMD_COMMAND_SHIFT 0 #define SPI_CMD_DEVICE_ID_SHIFT 4 #define SPI_CMD_PREPEND_BYTE_CNT_SHIFT 8 #define SPI_CMD_ONE_BYTE_SHIFT 11 #define SPI_CMD_ONE_WIRE_SHIFT 12 If the prepend byte count field starts at bit 8, and the next defined bit is SPI_CMD_ONE_BYTE at bit 11, it can be at most 3 bits wide, and thus the max value is 7, not 15. Fixes: b17de076 ("spi/bcm63xx: work around inability to keep CS up") Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Link: https://lore.kernel.org/r/20230629071453.62024-1-jonas.gorski@gmail.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Ryan Wanner authored
Tudor is not with Microchip anymore. I have worked lately with Microchip SPI drivers replacing Tudor with myself as this maintainer. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20230630161700.448747-1-Ryan.Wanner@microchip.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 04 Jul, 2023 1 commit
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Jonas Gorski authored
Update my email address to a working one, as the openwrt.org one is broken since ages. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Acked-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20230630202257.8449-2-jonas.gorski@gmail.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 03 Jul, 2023 1 commit
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Geert Uytterhoeven authored
The SoC product name is "RZ/V2M". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> Link: https://lore.kernel.org/r/89e9870a2c510387e4d7a863025f4d3639d4a261.1688375020.git.geert+renesas@glider.beSigned-off-by: Mark Brown <broonie@kernel.org>
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- 30 Jun, 2023 1 commit
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Jonas Gorski authored
If neither a "hif_mspi" nor "mspi" resource is present, the driver will just early exit in probe but still return success. Apart from not doing anything meaningful, this would then also lead to a null pointer access on removal, as platform_get_drvdata() would return NULL, which it would then try to dereference when trying to unregister the spi master. Fix this by unconditionally calling devm_ioremap_resource(), as it can handle a NULL res and will then return a viable ERR_PTR() if we get one. The "return 0;" was previously a "goto qspi_resource_err;" where then ret was returned, but since ret was still initialized to 0 at this place this was a valid conversion in 63c5395b ("spi: bcm-qspi: Fix use-after-free on unbind"). The issue was not introduced by this commit, only made more obvious. Fixes: fa236a7e ("spi: bcm-qspi: Add Broadcom MSPI driver") Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Reviewed-by: Kamal Dasu <kamal.dasu@broadcom.com> Link: https://lore.kernel.org/r/20230629134306.95823-1-jonas.gorski@gmail.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 29 Jun, 2023 1 commit
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Dmitry Baryshkov authored
The GPI DMA mode requires for TX DMA to be prepared. Force SPI core to provide TX buffer even if the caller didn't provide one by setting the SPI_CONTROLLER_MUST_TX flag. Fixes: b59c1224 ("spi: spi-geni-qcom: Add support for GPI dma") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230629095847.3648597-1-dmitry.baryshkov@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>
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- 24 Jun, 2023 1 commit
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Krzysztof Kozlowski authored
Commit a3eb9548 ("spi: dt-bindings: atmel,at91rm9200-spi: add sam9x7 compatible") adding sam9x7 compatible did not make any sense as it added new compatible into middle of existing compatible list. The intention was probably to add new set of compatibles with sam9x7 as first one. Fixes: a3eb9548 ("spi: dt-bindings: atmel,at91rm9200-spi: add sam9x7 compatible") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/Message-Id: <20230624082054.37697-1-krzysztof.kozlowski@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 23 Jun, 2023 4 commits
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Varshini Rajendran authored
Add sam9x7 compatible to DT bindings documentation. Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com> Link: https://lore.kernel.org/r/Message-Id: <20230623203056.689705-33-varshini.rajendran@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Fabrizio Castro authored
The RZ/V2M SoC comes with the Clocked Serial Interface (CSI) IP, which is a master/slave SPI controller. This commit adds a driver to support CSI master mode. Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> Link: https://lore.kernel.org/r/Message-Id: <20230622113341.657842-4-fabrizio.castro.jz@renesas.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Fabrizio Castro authored
Add dt-bindings for the CSI IP found inside the RZ/V2M SoC. Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/Message-Id: <20230622113341.657842-2-fabrizio.castro.jz@renesas.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Mark Brown authored
Merge series from Miquel Raynal <miquel.raynal@bootlin.com>: I recently came across an issue with the Atmel spi controller driver which would stop my transfers after a too small timeout when performing big transfers (reading a 4MiB flash in one transfer). My initial idea was to derive a the maximum amount of time a transfer would take depending on its size and use that as value to avoid erroring-out when not relevant. Mark wanted to go further by creating a core helper doing that, based on the heuristics from the sun6i driver. Here is a small series of 3 patches doing exactly that.
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- 22 Jun, 2023 4 commits
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Miquel Raynal authored
A helper was recently added to the core to factorize common code between drivers, like the amount of time a driver should wait for a transfer to happen. It is of course possible to use a default value (like eg. 1s) but it is way stronger to adapt this amount of time to the transfer. Indeed, long transfers (eg. 4MiB) on a slow single-spi bus might take more than the usual second of timeout and prevent lengthy transfers. The core helper was heavily inspired by the logic applied in this driver, the only difference being the minimum amount of time which was enlarged from 0.1s to 0.5s. Use this helper instead of open-coding it. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jernej Škrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/Message-Id: <20230622090634.3411468-4-miquel.raynal@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Miquel Raynal authored
A slow SPI bus clocks at ~20MHz, which means it would transfer about 2500 bytes per second with a single data line. Big transfers, like when dealing with flashes can easily reach a few MiB. The current DMA timeout is set to 1 second, which means any working transfer of about 4MiB will always be cancelled. With the above derivations, on a slow bus, we can assume every byte will take at most 0.4ms. Said otherwise, we could add 4ms to the 1-second timeout delay every 10kiB. On a 4MiB transfer, it would bring the timeout delay up to 2.6s which still seems rather acceptable for a timeout. The consequence of this is that long transfers might be allowed, which hence requires the need to interrupt the transfer if wanted by the user. We can hence switch to the _interruptible variant of wait_for_completion. This leads to a little bit more handling to also handle the interrupted case but looks really acceptable overall. While at it, we drop the useless, noisy and redundant WARN_ON() call. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Ryan Wanner <ryan.wanner@microchip.com> Link: https://lore.kernel.org/r/Message-Id: <20230622090634.3411468-3-miquel.raynal@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Valentin Caron authored
STM32F4-F7 are, from hardware point of view, capable to handle device mode. So this property should not be forced at false in dt-bindings. Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/Message-Id: <20230621115523.923176-3-valentin.caron@foss.st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Miquel Raynal authored
Big transfers might take a bit of time, too constraining timeouts might lead to false positives. In order to simplify the drivers work and with the goal of factorizing code in mind, let's add a helper that can be used by any spi controller driver to derive a relevant per-transfer timeout value. The logic is simple: we know how much time it would take to transfer a byte, we can easily derive the total theoretical amount of time involved for each transfer. We multiply it by two to have a bit of margin and enforce a minimum of 500ms. Suggested-by: Mark Brown <broonie@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/Message-Id: <20230622090634.3411468-2-miquel.raynal@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 19 Jun, 2023 1 commit
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Neil Armstrong authored
Now spi_geni_grab_gpi_chan() errors are correctly reported, the -EPROBE_DEFER error should be returned from probe in case the GPI dma driver is built as module and/or not probed yet. Fixes: b59c1224 ("spi: spi-geni-qcom: Add support for GPI dma") Fixes: 6532582c ("spi: spi-geni-qcom: fix error handling in spi_geni_grab_gpi_chan()") Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230615-topic-sm8550-upstream-fix-spi-geni-qcom-probe-v2-1-670c3d9e8c9c@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>
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- 15 Jun, 2023 4 commits
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Alain Volmat authored
STM32F4 and STM32F7 can't switch to spi device mode. Forbid this property with compatible "st,stm32f4-spi". Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Link: https://lore.kernel.org/r/20230615075815.310261-4-valentin.caron@foss.st.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Valentin Caron authored
Add support for stm32h7 to use SPI controller in device role. In such case, the spi instance should have the spi-slave property defined. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Link: https://lore.kernel.org/r/20230615075815.310261-5-valentin.caron@foss.st.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Alain Volmat authored
Avoid usage of deprecated dmaengine_terminate_all and use dmaengine_terminate_sync and dmaengine_terminate_async instead. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Link: https://lore.kernel.org/r/20230615075815.310261-3-valentin.caron@foss.st.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Alain Volmat authored
Preparing introduction of SPI device, rename the spi_master structure into spi_controller. This doesn't have any functional impact since spi_master was already a macro for spi_controller. Referring now to ctrl instead of master since the spi_controller structure might not be used as a master controller only. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Link: https://lore.kernel.org/r/20230615075815.310261-2-valentin.caron@foss.st.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 07 Jun, 2023 2 commits
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Mark Brown authored
Merge series from Andi Shyti <andi.shyti@kernel.org>: Two small cleanups in the probe function. The first puts in use the managed spi master allocation while the second implements the dev_err_probe() function.
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Abe Kohandel authored
Remove a misleading comment about the DMA operations of the Intel Mount Evans SoC's SPI Controller as requested by Serge. Signed-off-by: Abe Kohandel <abe.kohandel@intel.com> Link: https://lore.kernel.org/linux-spi/20230606191333.247ucbf7h3tlooxf@mobilestation/ Fixes: 0760d5d0 ("spi: dw: Add compatible for Intel Mount Evans SoC") Reviewed-by: Serge Semin <fancer.lancer@gmail.com> Link: https://lore.kernel.org/r/20230606231844.726272-1-abe.kohandel@intel.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 06 Jun, 2023 4 commits
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Abe Kohandel authored
Document the DesignWare SSI controller compatible for Intel Mount Evans Integrated Management Complex SoC. Signed-off-by: Abe Kohandel <abe.kohandel@intel.com> Link: https://lore.kernel.org/r/20230606145402.474866-3-abe.kohandel@intel.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Abe Kohandel authored
The Intel Mount Evans SoC's Integrated Management Complex uses the SPI controller for access to a NOR SPI FLASH. However, the SoC doesn't provide a mechanism to override the native chip select signal. This driver doesn't use DMA for memory operations when a chip select override is not provided due to the native chip select timing behavior. As a result no DMA configuration is done for the controller and this configuration is not tested. The controller also has an errata where a full TX FIFO can result in data corruption. The suggested workaround is to never completely fill the FIFO. The TX FIFO has a size of 32 so the fifo_len is set to 31. Signed-off-by: Abe Kohandel <abe.kohandel@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20230606145402.474866-2-abe.kohandel@intel.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Andi Shyti authored
Simplify the code by using dev_err_probe() instead of dev_err() and 'return'. Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20230606012051.2139333-3-andi.shyti@kernel.orgSigned-off-by: Mark Brown <broonie@kernel.org>
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Andi Shyti authored
Use devm_spi_alloc_master() and get rid of one goto error path Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20230606012051.2139333-2-andi.shyti@kernel.orgSigned-off-by: Mark Brown <broonie@kernel.org>
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- 02 Jun, 2023 2 commits
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Mårten Lindahl authored
When the spi controller is registered and the cs_gpiods cannot be assigned, causing a defer of the probe, there is an error print saying: "probe - problem registering spi master" This should not be announced as an error. Print this message for all errors except for the probe defer. Signed-off-by: Mårten Lindahl <marten.lindahl@axis.com> Link: https://lore.kernel.org/r/20230602-pl022-defer-fix-v2-1-383f6bc2293a@axis.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Rasmus Villemoes authored
Commit 87c61417 (spi: spi-imx: fix MX51_ECSPI_* macros when cs > 3) ensured that the argument passed to the macros was masked with &3, so that we no longer write outside the intended fields in the various control registers. When all chip selects are gpios, this works just fine. However, when a mix of native and gpio chip selects are in use, that masking is too naive. Say, for example, that SS0 is muxed as native chip select, and there is also a chip at 4 (obviously with a gpio cs). In that case, when accessing the latter chip, both the SS0 pin and the gpio pin will be asserted low. The fix for this is to use the ->unused_native_cs value as channel number for any spi device which uses a gpio as chip select. Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Link: https://lore.kernel.org/r/20230602115731.708883-1-linux@rasmusvillemoes.dkSigned-off-by: Mark Brown <broonie@kernel.org>
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- 01 Jun, 2023 4 commits
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Andi Shyti authored
Replace the tuple devm_clk_get()/clk_prepare_enable() with the single function devm_clk_get_enabled(). Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20230531205550.568340-1-andi.shyti@kernel.orgSigned-off-by: Mark Brown <broonie@kernel.org>
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Krzysztof Kozlowski authored
Remove address/size-cells because they are already mentioned by common spi-controller.yaml. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230601095908.563865-3-krzysztof.kozlowski@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>
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Krzysztof Kozlowski authored
Remove cs-gpios because it is already mentioned by common spi-controller.yaml. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230601095908.563865-2-krzysztof.kozlowski@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>
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Krzysztof Kozlowski authored
Remove properties already mentioned by common spi-controller.yaml and switch to unevaluatedProperties:false to achieve same functional effect. This makes the binding a bit smaller. Similarly there is no need to allow additionalProperties for children, because spi-controller.yaml already does it. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230601095908.563865-1-krzysztof.kozlowski@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>
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- 31 May, 2023 2 commits
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Serge Semin authored
Just drop a redundant empty line from the dw_spi_debugfs_init() function left in the framework of the commit 0178f1e5 ("spi-dw-core.c: Fix error checking for debugfs_create_dir") after removing the last return statement. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Link: https://lore.kernel.org/r/20230530221725.26319-1-Sergey.Semin@baikalelectronics.ruSigned-off-by: Mark Brown <broonie@kernel.org>
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Alexander Stein authored
Having no DMA is not an error. The simplest reason is not having it configured. SPI will still be usable, so raise a warning instead to get still some attention. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Link: https://lore.kernel.org/r/20230531072850.739021-1-alexander.stein@ew.tq-group.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 30 May, 2023 3 commits
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Douglas Anderson authored
A warning added in commit b5762d95 ("spi: spi-qcom-qspi: Add DMA mode support") was missing a newline. Add it. Reported-by: Stephen Boyd <swboyd@chromium.org> Closes: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/4573857/comment/44331d65_79128099/ Fixes: b5762d95 ("spi: spi-qcom-qspi: Add DMA mode support") Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20230530111348.1.Ibd1f4827e18a26dc802cd6e5ac300d83dc1bc41c@changeidSigned-off-by: Mark Brown <broonie@kernel.org>
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Krzysztof Kozlowski authored
Make the pattern matching node names a bit stricter to improve DTS consistency. The pattern is restricted to: 1. Only one unit address or one -N suffix, 2. -N suffixes to decimal numbers. Suggested-by: Rob Herring <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230530144851.92059-6-krzysztof.kozlowski@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>
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Mark Brown authored
Get the fixes into CI for development.
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