1. 04 Apr, 2023 28 commits
  2. 21 Mar, 2023 5 commits
  3. 20 Mar, 2023 7 commits
    • German Gomez's avatar
      perf report: Add 'simd' sort field · ea15483e
      German Gomez authored
      Add 'simd' sort field to visualize SIMD ops in 'perf report'.
      
      Rows are labeled with the SIMD ISA, and the type of predicate (if any):
      
        - [p] partial predicate
        - [e] empty predicate (no elements in the vector being used)
      
      Example with Arm SPE and SVE (Scalable Vector Extension):
      
        #include <arm_sve.h>
      
        double src[1025], dst[1025];
      
        int main(void) {
          svfloat64_t vc = svdup_f64(1);
          for(;;)
            for(int i = 0; i < 1025; i += svcntd())
            {
              svbool_t pg = svwhilelt_b64(i, 1025);
              svfloat64_t vsrc = svld1(pg, &src[i]);
              svfloat64_t vdst = svadd_x(pg, vsrc, vc);
              svst1(pg, &dst[i], vdst);
            }
          return 0;
        }
      
        ... compiled using "gcc-11 -march=armv8-a+sve -O3"
      
      Profiling on a platform that implements FEAT_SVE and FEAT_SPEv1p1:
      
        $ perf record -e arm_spe_0// -- ./a.out
        $ perf report --itrace=i1i -s overhead,pid,simd,sym
      
        Overhead      Pid:Command   Simd     Symbol
        ........  ................  .......  ......................
      
          53.76%    10758:program            [.] main
          46.14%    10758:program   [.] SVE  [.] main
           0.09%    10758:program   [p] SVE  [.] main
      
      The report shows 0.09% of the sampled SVE operations use partial
      predicates due to src and dst arrays not being multiples of the vector
      register lengths.
      Signed-off-by: default avatarGerman Gomez <german.gomez@arm.com>
      Acked-by: default avatarIan Rogers <irogers@google.com>
      Cc: Adrian Hunter <adrian.hunter@intel.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Anshuman.Khandual@arm.com
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: John Garry <john.g.garry@oracle.com>
      Cc: Leo Yan <leo.yan@linaro.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Mike Leach <mike.leach@linaro.org>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Will Deacon <will@kernel.org>
      Cc: linux-arm-kernel@lists.infradead.org
      Link: https://lore.kernel.org/r/20230320151509.1137462-2-james.clark@arm.comSigned-off-by: default avatarJames Clark <james.clark@arm.com>
      Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
      ea15483e
    • German Gomez's avatar
      perf arm-spe: Add SVE flags to the SPE samples · 03a6c16e
      German Gomez authored
      Add flags from the Scalable Vector Extension (SVE) to the SPE samples
      which are available from Armv8.3 (FEAT_SPEv1p1).
      
      These will be displayed in a new SIMD sort field in a later commit.
      Signed-off-by: default avatarGerman Gomez <german.gomez@arm.com>
      Signed-off-by: default avatarJames Clark <james.clark@arm.com>
      Acked-by: default avatarIan Rogers <irogers@google.com>
      Link: https://lore.kernel.org/r/20230320151509.1137462-2-james.clark@arm.com
      Cc: Anshuman.Khandual@arm.com
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Adrian Hunter <adrian.hunter@intel.com>
      Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Will Deacon <will@kernel.org>
      Cc: Leo Yan <leo.yan@linaro.org>
      Cc: Mike Leach <mike.leach@linaro.org>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: John Garry <john.g.garry@oracle.com>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: linux-kernel@vger.kernel.org
      Cc: linux-perf-users@vger.kernel.org
      Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
      03a6c16e
    • German Gomez's avatar
      perf arm-spe: Refactor arm-spe to support operation packet type · 0066015a
      German Gomez authored
      Extend the decoder of Arm SPE records to support more fields from the
      operation packet type.
      
      Not all fields are being decoded by this commit. Only those needed to
      support the use-case SVE load/store/other operations.
      Suggested-by: default avatarLeo Yan <leo.yan@linaro.org>
      Signed-off-by: default avatarGerman Gomez <german.gomez@arm.com>
      Acked-by: default avatarIan Rogers <irogers@google.com>
      Cc: Adrian Hunter <adrian.hunter@intel.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Anshuman.Khandual@arm.com
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: John Garry <john.g.garry@oracle.com>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Mike Leach <mike.leach@linaro.org>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Will Deacon <will@kernel.org>
      Cc: linux-arm-kernel@lists.infradead.org
      Link: https://lore.kernel.org/r/20230320151509.1137462-2-james.clark@arm.comSigned-off-by: default avatarJames Clark <james.clark@arm.com>
      Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
      0066015a
    • German Gomez's avatar
      perf event: Add 'simd_flags' field to 'struct perf_sample' · f43cc1a9
      German Gomez authored
      Add new field to 'struct perf_sample' to store flags related to SIMD
      ops.
      
      It will be used to store SIMD information from SVE and NEON when
      profiling using ARM SPE.
      Signed-off-by: default avatarGerman Gomez <german.gomez@arm.com>
      Acked-by: default avatarIan Rogers <irogers@google.com>
      Cc: Adrian Hunter <adrian.hunter@intel.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Anshuman.Khandual@arm.com
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: John Garry <john.g.garry@oracle.com>
      Cc: Leo Yan <leo.yan@linaro.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Mike Leach <mike.leach@linaro.org>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Will Deacon <will@kernel.org>
      Cc: linux-arm-kernel@lists.infradead.org
      Link: https://lore.kernel.org/r/20230320151509.1137462-2-james.clark@arm.comSigned-off-by: default avatarJames Clark <james.clark@arm.com>
      Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
      f43cc1a9
    • Adrian Hunter's avatar
      perf intel-pt: Add support for new branch instructions ERETS and ERETU · 052072f6
      Adrian Hunter authored
      Intel Flexible Return and Event Delivery (FRED) adds instructions ERETS
      (return to supervisor) and ERETU (return to user). Intel PT instruction
      decoder needs to know about these instructions because they are
      branch instructions. Similar to IRET instructions, when the decoder
      encounters one of these instructions it will match it to a TIP (target
      instruction pointer) packet that informs what the branch destination is.
      
      The existing "x86 instruction decoder - new instructions" test can be
      used to test the result e.g.
      
        $ perf test -v ins |& grep eret
        Decoded ok: f2 0f 01 ca         erets
        Decoded ok: f3 0f 01 ca         eretu
      Signed-off-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
      Acked-by: default avatarIan Rogers <irogers@google.com>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Link: https://lore.kernel.org/r/20230320183517.15099-2-adrian.hunter@intel.comSigned-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
      052072f6
    • Adrian Hunter's avatar
      perf intel-pt: Add event type names UINTR and UIRET · 34f576c9
      Adrian Hunter authored
      UINTR and UIRET are listed in table 32-50 "CFE Packet Type and Vector
      Fields Details" in the Intel Processor Trace chapter of The Intel SDM
      Volume 3 version 078.
      
      The codes are for "User interrupt delivered" and "Exiting from user
      interrupt routine" respectively.
      Signed-off-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
      Acked-by: default avatarIan Rogers <irogers@google.com>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Link: https://lore.kernel.org/r/20230320183517.15099-2-adrian.hunter@intel.comSigned-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
      34f576c9
    • Ian Rogers's avatar
      perf symbol: Sort names under write lock · ec9640f7
      Ian Rogers authored
      If finding a name doesn't find the sorted names then they are
      allocated and sorted. This shouldn't be done under a read lock as
      another reader may access it. Release the read lock and acquire the
      write lock, then release the write lock and reacquire the read lock.
      Signed-off-by: default avatarIan Rogers <irogers@google.com>
      Cc: Adrian Hunter <adrian.hunter@intel.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Alexey Bayduraev <alexey.v.bayduraev@linux.intel.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: André Almeida <andrealmeid@collabora.com>
      Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
      Cc: Darren Hart <dvhart@infradead.org>
      Cc: Davidlohr Bueso <dave@stgolabs.net>
      Cc: Dmitriy Vyukov <dvyukov@google.com>
      Cc: Eric Dumazet <edumazet@google.com>
      Cc: German Gomez <german.gomez@arm.com>
      Cc: Hao Luo <haoluo@google.com>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: James Clark <james.clark@arm.com>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: John Garry <john.g.garry@oracle.com>
      Cc: Kajol Jain <kjain@linux.ibm.com>
      Cc: Kan Liang <kan.liang@linux.intel.com>
      Cc: Leo Yan <leo.yan@linaro.org>
      Cc: Madhavan Srinivasan <maddy@linux.ibm.com>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Masami Hiramatsu <mhiramat@kernel.org>
      Cc: Miaoqian Lin <linmq006@gmail.com>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Riccardo Mancini <rickyman7@gmail.com>
      Cc: Shunsuke Nakamura <nakamura.shun@fujitsu.com>
      Cc: Song Liu <song@kernel.org>
      Cc: Stephane Eranian <eranian@google.com>
      Cc: Stephen Brennan <stephen.s.brennan@oracle.com>
      Cc: Steven Rostedt (VMware) <rostedt@goodmis.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Thomas Richter <tmricht@linux.ibm.com>
      Cc: Yury Norov <yury.norov@gmail.com>
      Link: https://lore.kernel.org/r/20230320033810.980165-2-irogers@google.comSigned-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
      ec9640f7