1. 24 Apr, 2017 4 commits
  2. 11 Apr, 2017 2 commits
  3. 10 Apr, 2017 1 commit
  4. 07 Apr, 2017 7 commits
  5. 04 Apr, 2017 1 commit
  6. 30 Mar, 2017 3 commits
    • Geert Uytterhoeven's avatar
      pinctrl: sh-pfc: r8a7795: Add SCIF_CLK support · d14a39ed
      Geert Uytterhoeven authored
      Add pins, groups, and a function for SCIF_CLK on R-Car H3 ES2.0.
      SCIF_CLK is the external clock source for the Baud Rate Generator for
      External Clock (BRG) on (H)SCIF serial ports.
      
      Extracted from a big patch in the BSP by Takeshi Kihara.
      Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
      Cc: Takeshi Kihara <takeshi.kihara.df@renesas.com>
      d14a39ed
    • Geert Uytterhoeven's avatar
      pinctrl: sh-pfc: r8a7795: Add SCIF support · e7ad4d3c
      Geert Uytterhoeven authored
      Add pins, groups, and functions for all SCIF serial ports on R-Car H3
      ES2.0.
      
      Extracted from a big patch in the BSP by Takeshi Kihara.
      Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
      Cc: Takeshi Kihara <takeshi.kihara.df@renesas.com>
      e7ad4d3c
    • Geert Uytterhoeven's avatar
      pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0 · b205914c
      Geert Uytterhoeven authored
      The Pin Function Controller module in the R-Car H3 ES2.0 differs from
      ES1.x in many ways.
      
      The goal is twofold:
        1. Support both the ES1.x and ES2.0 SoC revisions in a single binary
           for now,
        2. Make it clear which code supports ES1.x, so it can easily be
           identified and removed later, when production SoCs are deemed
           ubiquitous.
      
      Hence this patch:
        1. Extracts the support for R-Car H3 ES1.x into a separate file, as
           the differences are quite large,
        2. Adds code for detecting the SoC revision at runtime using the new
           soc_device_match() API, and selecting pinctrl tables for the actual
           SoC revision,
        3. Replaces the core register and bitfield definitions by their
           counterparts for R-Car H3 ES2.0.
      
      The addition of pins, groups, and functions for the various on-chip
      devices is left to subsequent patches.
      
      The R-Car H3 ES2.0 register and bitfield definitions were extracted from
      a patch in the BSP by Takeshi Kihara.
      Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
      Cc: Takeshi Kihara <takeshi.kihara.df@renesas.com>
      b205914c
  7. 28 Mar, 2017 11 commits
  8. 24 Mar, 2017 1 commit
  9. 23 Mar, 2017 10 commits