- 24 Nov, 2023 1 commit
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Ville Syrjälä authored
Print the pipe name in ascii rather than hex. Signed-off-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231122093137.1509-3-ville.syrjala@linux.intel.comReviewed-by:
Jouni Högander <jouni.hogander@intel.com>
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- 23 Nov, 2023 20 commits
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Ville Syrjälä authored
The current implementation of change_lut_val_precision() is just a convoluted way of shifting by 8. Implement the proper rounding by just using drm_color_lut_extract() and intel_color_lut_pack() like everyone else does. And as the uapi can't handle >=1.0 values but the hardware can we need to clamp the results appropriately in the readout path. Signed-off-by:
Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Reviewed-by:
Jani Nikula <jani.nikula@intel.com>
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Ville Syrjälä authored
Use min() instead of clamp() since the color values involved are unsigned. No functional changes. Signed-off-by:
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Ville Syrjälä authored
drm_color_lut_extract() rounding was changed to follow the OpenGL int<->float conversion rules. Adjust intel_color_lut_pack() to match. Signed-off-by:
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Ville Syrjälä authored
The current implementation of drm_color_lut_extract() generates weird results. Eg. if we go through all the values for 16->8bpc conversion we see the following pattern: in out (count) 0 - 7f -> 0 (128) 80 - 17f -> 1 (256) 180 - 27f -> 2 (256) 280 - 37f -> 3 (256) ... fb80 - fc7f -> fc (256) fc80 - fd7f -> fd (256) fd80 - fe7f -> fe (256) fe80 - ffff -> ff (384) So less values map to 0 and more values map 0xff, which doesn't seem particularly great. To get just the same number of input values to map to the same output values we'd just need to drop the rounding entrirely. But perhaps a better idea would be to follow the OpenGL int<->float conversion rules, in which case we get the following results: in out (count) 0 - 80 -> 0 (129) 81 - 181 -> 1 (257) 182 - 282 -> 2 (257) 283 - 383 -> 3 (257) ... fc7c - fd7c -> fc (257) fd7d - fe7d -> fd (257) fe7e - ff7e -> fe (257) ff7f - ffff -> ff (129) Note that since the divisor is constant the compiler is able to optimize away the integer division in most cases. The only exception is the _ULL() case on 32bit architectures since that gets emitted as inline asm via do_div() and thus the compiler doesn't get to optimize it. Signed-off-by:
Maxime Ripard <mripard@kernel.org>
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Juha-Pekka Heikkila authored
We are preparing for Xe driver. I915 and Xe object implementation are differing. Use intel_bo_to_drm_bo instead of &obj->base. Signed-off-by:
Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> Reviewed-by:
Uma Shankar <uma.shankar@intel.com> Signed-off-by:
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Juha-Pekka Heikkila authored
touch dpt_vma->node only if dpt-vma is not NULL Signed-off-by:
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Juha-Pekka Heikkila authored
Here created intel_dpt_common.c to hold intel_dpt_configure which is needed for both xe and i915. Signed-off-by:
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Ville Syrjälä authored
There's no real reason why we'd need a full modeset for audio changes. So let's allow audio to be toggled during fastset. In case the ELD changes while has_audio isn't changing state we force both audio disable and enable so the new ELD gets propagated to the audio driver. Reviewed-by:
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Ville Syrjälä authored
Relocate the audio enable/disable from the full modeset hooks into the common pre/post plane update stage of the commit. Audio fastset is within easy reach now. Reviewed-by:
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Ville Syrjälä authored
Push the encoder->audio_{enable,disable}() calls out from the encoder->{enable,disable}() hooks. Moving towards audio fastset. Reviewed-by: -
Ville Syrjälä authored
Add encoder vfuncs for audio enable/disable. This will allow audio to be enabled/disabled during fastsets. An encoder hook is necessary as on pre-hsw platforms different encoder types implement audio in different ways. Reviewed-by:
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Ville Syrjälä authored
Follow the hsw+ approach toggle the audio presence detect when we set up the ELD, instead of doing it when turning the port on/off. This will facilitate audio enable/disable to happen during fastsets instead of requiring a full modeset. Reviewed-by:
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Ville Syrjälä authored
Follow the hsw+ approach toggle the audio presence detect when we set up the ELD, instead of doing it when turning the port on/off. This will facilitate audio enable/disable to happen during fastsets instead of requiring a full modeset. Reviewed-by:
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Ville Syrjälä authored
Put a wrapper around the intel_audio_codec_{enable,disable}() calls in the g4x+ DP/HDMI code. We shall move the presence detect enable/disable into the wrappers later. Reviewed-by: -
Ville Syrjälä authored
Push the audio enable/disable to be the last/first thing respectively that is done in the encoder enable/disable hooks. The goal is to move it further out of these encoder hooks entirely. Reviewed-by:
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Ville Syrjälä authored
Doing the if-else around RMWs is kinda silly. Just set/clear the apporiate bits with a single RMW. Also unify the coding style a bit icl_wa_cursorclkgating() while at it. Reviewed-by:
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Ville Syrjälä authored
We used to call intel_pre_plane_updates() for any pipe going through a modeset whether the pipe was previously enabled or not. This in fact needed to apply all the necessary clock gating workarounds/etc. Restore the correct behaviour. Fixes: 39919997 ("drm/i915: Disable all planes before modesetting any pipes") Reviewed-by:
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Ville Syrjälä authored
{planes,vrr}_{enabling,disabling}() are supposed to indicate whether the specific hardware feature is supposed to be enabling or disabling. That can only makes sense if the pipe is active overall. So check for that before we go poking at the hardware. I think we're semi-safe currently on due to: - intel_pre_plane_update() doesn't get called when the pipe was not-active prior to the commit, but this is actually a bug. This saves vrr_disabling(), and vrr_enabling() is called from deeper down where we have already checked hw.active. - active_planes mirrors the crtc's hw.active Reviewed-by: -
Jouni Högander authored
Do not continue to psr2 checks if psr or panel replay is not supported. Cc: Animesh Manna <animesh.manna@intel.com> Fixes: b8cf5b5d ("drm/i915/panelreplay: Initializaton and compute config for panel replay") Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9670Signed-off-by:
Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231120130214.3332726-1-jouni.hogander@intel.com
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Mika Kahola authored
entry_setup_frames variable is defined as u8. However, the function call intel_psr_entry_setup_frames() can return negative error code. There is a type mismatch here, so let's switch to use int here as well. Fixes: 2b981d57 ("drm/i915/display: Support PSR entry VSC packet to be transmitted one frame earlier") Signed-off-by:
Mika Kahola <mika.kahola@intel.com> Reviewed-by:
Vinod Govindapillai <vinod.govindapillai@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231116090512.480373-1-mika.kahola@intel.com
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- 22 Nov, 2023 16 commits
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Andy Shevchenko authored
Drop unused vlv_iosf_sb_read() and vlv_iosf_sb_write(). Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by:
Hans de Goede <hdegoede@redhat.com> Reviewed-by:
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Andy Shevchenko authored
For a couple of cases the branches call the same bxt_gpio_set_value(). As Ville suggested they can be combined by dropping the DISPLAY_VER() check from Gen 11 to Gen 9. Do it that way. Suggested-by:
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Andy Shevchenko authored
It's a dirty hack in the driver that pokes GPIO registers behind the driver's back. Moreoever it might be problematic as simultaneous I/O may hang the system, see the commit 0bd50d71 ("pinctrl: cherryview: prevent concurrent access to GPIO controllers") for the details. Taking all this into consideration replace the hack with proper GPIO APIs being used. Signed-off-by:
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Andy Shevchenko authored
Currently soc_gpio_set_value() supports only a single indexing for GPIO pin. For CHV case, for example, we will need to distinguish community based index from the one that VBT is using. Introduce an additional parameter to soc_gpio_set_value() and its callers. Signed-off-by:
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Andy Shevchenko authored
It's a dirty hack in the driver that pokes GPIO registers behind the driver's back. Moreoever it might be problematic as simultaneous I/O may hang the system, see the commit 40ecab55 ("pinctrl: baytrail: Really serialize all register accesses") for the details. Taking all this into consideration replace the hack with proper GPIO APIs being used. Signed-off-by:
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Andy Shevchenko authored
Extract a common soc_gpio_set_value() helper that may be used by a few SoCs. Signed-off-by:
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Hans de Goede authored
Fix wrong initial value for GPIOs in bxt_gpio_set_value(). Signed-off-by:
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Hans de Goede authored
To properly deal with GPIOs used in MIPI panel sequences a temporary GPIO lookup will be used. Since there can only be 1 GPIO lookup table for the "0000:00:02.0" device this will not work if the GPIO lookup table used by intel_dsi_vbt_gpio_init() is still registered. After getting the "backlight" and "panel" GPIOs the lookup table registered by intel_dsi_vbt_gpio_init() is no longer necessary, remove it so that another temporary lookup-table for the "0000:00:02.0" device can be added. Signed-off-by:
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Andy Shevchenko authored
Names of the MIPI sequence steps are sequential and defined, no need to check for the gaps. However in seq_name the MIPI_SEQ_END is missing. Add it there, and drop unneeded NULL check in sequence_name(). Reviewed-by:
Andi Shyti <andi.shyti@linux.intel.com> Signed-off-by:
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Andy Shevchenko authored
In the snippets like the following if (...) return / goto / break / continue ...; else ... the 'else' is redundant. Get rid of it. Reviewed-by:
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Andy Shevchenko authored
Move existing condition to while(), so it will be clear on what circumstances the loop is successfully finishing. Reviewed-by:
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Jani Nikula authored
Drop the unused parameter. Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Hans de Goede <hdegoede@redhat.com> Signed-off-by:
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Jani Nikula authored
The lowest level functions are about setting GPIO values, not about executing any sequences anymore. Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Hans de Goede <hdegoede@redhat.com> Signed-off-by:
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Jani Nikula authored
With the various sequence versions and pointer increments interleaved, it's a bit hard to decipher what's going on. Add separate paths for different sequence versions. Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Hans de Goede <hdegoede@redhat.com> Signed-off-by:
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Jani Nikula authored
Follow the contemporary conventions. Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Hans de Goede <hdegoede@redhat.com> Signed-off-by:
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Jani Nikula authored
Purely a guess. Drop the nop function. Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Hans de Goede <hdegoede@redhat.com> Signed-off-by:
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- 21 Nov, 2023 3 commits
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Imre Deak authored
Reuse intel_dp_max_data_rate() and intel_dp_effective_data_rate() in intel_link_compute_m_n(), instead of open-coding the equivalent. Note the kbit/sec -> kByte/sec unit change in the M/N values, but this not reducing the precision, as the link rate value is based anyway on a less precise 10 kbit/sec value. Suggested-by:
Jani Nikula <jani.nikula@linux.intel.com> Reviewed-by:
Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231116131841.1588781-12-imre.deak@intel.com
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Imre Deak authored
Simplify intel_dp_max_data_rate() using drm_dp_bw_channel_coding_efficiency() to calculate the max data rate for both DP1.4 and UHBR link rates. This trades a redundant multiply/divide for readability. Cc: Jani Nikula <jani.nikula@linux.intel.com> Reviewed-by:
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Imre Deak authored
Callers of intel_dp_max_data_rate() use the return value as an upper bound for the BW a given mode requires. As such the rounding shouldn't result in a bigger value than the actual upper bound. Use round-down instead of -closest accordingly. Cc: Jani Nikula <jani.nikula@linux.intel.com> Reviewed-by:
Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Signed-off-by:
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