- 28 Jun, 2022 2 commits
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Sai Krishna Potthuri authored
Add configuration values(enable/disable) for tri-state parameter. Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Link: https://lore.kernel.org/r/1655462819-28801-2-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Clément Léger authored
Set PINCTRL_OCELOT config option as a tristate and add MODULE_DEVICE_TABLE()/MODULE_LICENSE() to export appropriate information. Moreover, switch from builtin_platform_driver() to module_platform_driver(). Signed-off-by: Clément Léger <clement.leger@bootlin.com> Link: https://lore.kernel.org/r/20220617103548.490092-1-clement.leger@bootlin.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 27 Jun, 2022 1 commit
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Linus Walleij authored
The idea was right but the code was breaking in next. I assume some unstaged commit was involed. Fix it up. Cc: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Cc: Stephen Boyd <swboyd@chromium.org> Fixes: 36fe2684 ("pinctrl: qcom: sc7280: Add clock optional check for ADSP bypass targets") Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 26 Jun, 2022 2 commits
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Linus Walleij authored
Merge tag 'renesas-pinctrl-for-v5.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v5.20 - Fix reporting of input disabled pins on RZ/G2L.
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Linus Walleij authored
After applying patches I get these warnings: drivers/pinctrl/mediatek/pinctrl-mt8192.c:1302:56: warning: "/*" within comment [-Wcomment] drivers/pinctrl/mediatek/pinctrl-mt8192.c:1362:56: warning: "/*" within comment [-Wcomment] Something is wrong with the missing end-slashes. Add them. Cc: Guodong Liu <guodong.liu@mediatek.com> Cc: Nícolas F. R. A. Prado <nfraprado@collabora.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 25 Jun, 2022 11 commits
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Guodong Liu authored
Remove pin definitions that do not support the R0 & R1 pinconfig property. Signed-off-by: Guodong Liu <guodong.liu@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220624133700.15487-6-guodong.liu@mediatek.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Guodong Liu authored
Function bias_combo getter/setters already handle all cases advanced drive configuration, include drive for I2C related pins. Signed-off-by: Guodong Liu <guodong.liu@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220624133700.15487-5-guodong.liu@mediatek.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Guodong Liu authored
1. I2C pins's resistance value can be controlled by rsel register. This patch provides rsel (resistance selection) setting on mt8192. 2. Also add the missing pull type array for mt8192 to document the pull type of each pin and prevent invalid pull type settings. Signed-off-by: Guodong Liu <guodong.liu@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220624133700.15487-4-guodong.liu@mediatek.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Guodong Liu authored
This patch provides the advanced drive raw data setting version for I2C used pins on mt8192. Signed-off-by: Guodong Liu <guodong.liu@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220624133700.15487-3-guodong.liu@mediatek.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Guodong Liu authored
1. The dt-binding expects that drive-strength arguments be passed in mA, but the driver was expecting raw values. And that this commit changes the driver so that it is aligned with the binding. 2. This commit provides generic driving setup, which support 2/4/6/8/10/12/14/16mA driving, original driver just set raw data setup setting when use drive-strength property. Signed-off-by: Guodong Liu <guodong.liu@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220624133700.15487-2-guodong.liu@mediatek.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Stefan Wahren authored
Commit 6c846d02 ("gpio: Don't fiddle with irqchips marked as immutable") added a warning to indicate if the gpiolib is altering the internals of irqchips. The bcm2835 pinctrl is also affected by this warning. Fix this by making the irqchip in the bcm2835 pinctrl driver immutable. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220614202831.236341-3-stefan.wahren@i2se.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Stefan Wahren authored
The commit b8a19382 ("pinctrl: bcm2835: Fix support for threaded level triggered IRQs") assigned the irq_mask/unmask callbacks with the already existing functions for irq_enable/disable. The wasn't completely the right way (tm) to fix the issue, because these callbacks shouldn't be identical. So fix this by rename the functions to represent their intension and drop the unnecessary irq_enable/disable assigment. Suggested-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220614202831.236341-2-stefan.wahren@i2se.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lukas Bulwahn authored
Maintainers of the directory Documentation/devicetree/bindings/pinctrl are also the maintainers of the corresponding directory include/dt-bindings/pinctrl. Add the file entry for include/dt-bindings/pinctrl to the appropriate section in MAINTAINERS. Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Link: https://lore.kernel.org/r/20220613122955.20714-1-lukas.bulwahn@gmail.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Nikita Travkin authored
GPIO 31, 32 can be muxed to GCC_CAMSS_GP(1,2)_CLK respectively but the function was never assigned to the pingroup (even though the function exists already). Add this mode to the related pins. Fixes: 5373a2c5 ("pinctrl: qcom: Add msm8916 pinctrl driver") Signed-off-by: Nikita Travkin <nikita@trvn.ru> Link: https://lore.kernel.org/r/20220612145955.385787-4-nikita@trvn.ruSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Srinivasa Rao Mandadapu authored
Update lpass lpi pin control driver, with clock optional check for ADSP disabled platforms. This check required for distingushing ADSP based platforms and ADSP bypass platforms. In case of ADSP enabled platforms, where audio is routed through ADSP macro and decodec GDSC Switches are triggered as clocks by pinctrl driver and ADSP firmware controls them. So It's mandatory to enable them in ADSP based solutions. In case of ADSP bypass platforms clock voting is optional as these macro and dcodec GDSC switches are maintained as power domains and operated from lpass clock drivers. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1654921357-16400-3-git-send-email-quic_srivasam@quicinc.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Srinivasa Rao Mandadapu authored
Add boolean param qcom,adsp-bypass-mode to support adsp bypassed sc7280 platforms. Which is required to make clock voting as optional for ADSP bypass platforms. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1654921357-16400-2-git-send-email-quic_srivasam@quicinc.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 15 Jun, 2022 14 commits
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Krzysztof Kozlowski authored
Reference generic pin controller schema to enforce proper root node name. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220607121335.131497-1-krzysztof.kozlowski@linaro.orgSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Miaoqian Lin authored
of_parse_phandle() returns a node pointer with refcount incremented, we should use of_node_put() on it when not need anymore. Add missing of_node_put() to avoid refcount leak." Fixes: c2f6d059 ("pinctrl: nomadik: refactor DT parser to take two paths") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Link: https://lore.kernel.org/r/20220607111602.57355-1-linmq006@gmail.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
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Samuel Holland authored
None of the sunxi pin controllers have a module reset line. This is confirmed by documentation (A80) as well as experimentation (A33). Since the property is not applicable to any variant of the hardware, let's remove it from the binding. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220531053623.43851-4-samuel@sholland.orgSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Samuel Holland authored
None of the sunxi pin controllers have a module reset line. This is confirmed by documentation (A80) as well as experimentation (A33). Let's remove the inaccurate properties. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220531053623.43851-3-samuel@sholland.orgSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Samuel Holland authored
None of the sunxi pin controllers have a module reset line. All of the SoC documentation, where available, agrees. The bits that would be used for the PIO reset (i.e. matching the order of the clock gate bits) are always reserved, both in the CCU and in the PRCM. And experiments on several SoCs, including the A33, confirm that those reserved bits indeed have no effect. Let's remove this superfluous code and dependency, and also remove the include statement that was copied to the other r_pio drivers. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220531053623.43851-2-samuel@sholland.orgSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Nícolas F. R. A. Prado authored
Commit cafe19db ("pinctrl: mediatek: Backward compatible to previous Mediatek's bias-pull usage") allowed the bias-pull-up and bias-pull-down properties to be used for setting PUPD/R1/R0 type bias on mtk-paris based SoC's, which was previously only supported by the custom mediatek,pull-up-adv and mediatek,pull-down-adv properties. Since the bias-pull-{up,down} properties already have defines associated thus being more descriptive and is more universal on MediaTek platforms, and given that there are no mediatek,pull-{up,down}-adv users on mt8192 yet, remove the custom adv properties in favor of the generic ones. Note that only mediatek,pull-up-adv was merged in the binding, but not its down counterpart. Fixes: edbacb36 ("dt-bindings: pinctrl: mt8192: Add mediatek,pull-up-adv property") Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogiocchino.delregno@collabora.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220525155714.1837360-3-nfraprado@collabora.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Nícolas F. R. A. Prado authored
Commit e5fabbe4 ("pinctrl: mediatek: paris: Support generic PIN_CONFIG_DRIVE_STRENGTH_UA") added support for using drive-strength-microamp instead of mediatek,drive-strength-adv. Since there aren't any users of mediatek,drive-strength-adv on mt8192 yet, remove this property and add drive-strength-microamp in its place, which has a clearer meaning. Fixes: 4ac68333 ("dt-bindings: pinctrl: mt8192: Add mediatek,drive-strength-adv property") Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogiocchino.delregno@collabora.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220525155714.1837360-2-nfraprado@collabora.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Basavaraj Natikar authored
Provide pinmux functionality by implementing pinmux_ops. Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20220601152900.1012813-7-Basavaraj.Natikar@amd.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Basavaraj Natikar authored
Presently there is no way to change pinmux configuration run time. Hence add a function to get IOMUX resource which can be used to configure IOMUX GPIO pins run time. Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20220601152900.1012813-6-Basavaraj.Natikar@amd.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Basavaraj Natikar authored
AMD pingroup can be extended to support multi-function pins. Hence define and use a macro "AMD_PINS" to represent larger number of pins. Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20220601152900.1012813-5-Basavaraj.Natikar@amd.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Basavaraj Natikar authored
AMD pingroup can be extended to support multi-function pins. Hence use PINCTRL_PINGROUP to manage and represent larger number of pingroups inline. Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20220601152900.1012813-4-Basavaraj.Natikar@amd.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Basavaraj Natikar authored
Remove 'struct amd_pingroup' and instead use 'struct pingroup'. Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20220601152900.1012813-3-Basavaraj.Natikar@amd.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Basavaraj Natikar authored
Add 'struct pingroup' to represent pingroup and 'PINCTRL_PINGROUP' macro for inline use. Both are used to manage and represent larger number of pingroups. Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20220601152900.1012813-2-Basavaraj.Natikar@amd.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 06 Jun, 2022 4 commits
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Lad Prabhakar authored
Pin status reported by pinconf-pins file always reported pin status as "input enabled" even for pins which had input disabled. Fix this by returning -EINVAL for the pins which have input disabled. Fixes: c4c4637e ("pinctrl: renesas: Add RZ/G2L pin and gpio controller driver") Reported-by: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Phil Edworthy <phil.edworthy@renesas.com> Link: https://lore.kernel.org/r/20220511094057.3151-1-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfsLinus Torvalds authored
Pull file descriptor fix from Al Viro: "Fix for breakage in #work.fd this window" * tag 'pull-work.fd-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: fix the breakage in close_fd_get_file() calling conventions change
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git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mmLinus Torvalds authored
Pull mm hotfixes from Andrew Morton: "Fixups for various recently-added and longer-term issues and a few minor tweaks: - fixes for material merged during this merge window - cc:stable fixes for more longstanding issues - minor mailmap and MAINTAINERS updates" * tag 'mm-hotfixes-stable-2022-06-05' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm: mm/oom_kill.c: fix vm_oom_kill_table[] ifdeffery x86/kexec: fix memory leak of elf header buffer mm/memremap: fix missing call to untrack_pfn() in pagemap_range() mm: page_isolation: use compound_nr() correctly in isolate_single_pageblock() mm: hugetlb_vmemmap: fix CONFIG_HUGETLB_PAGE_FREE_VMEMMAP_DEFAULT_ON MAINTAINERS: add maintainer information for z3fold mailmap: update Josh Poimboeuf's email
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- 05 Jun, 2022 6 commits
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git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mmLinus Torvalds authored
Pull delay-accounting update from Andrew Morton: "A single featurette for delay accounting. Delayed a bit because, unusually, it had dependencies on both the mm-stable and mm-nonmm-stable queues" * tag 'mm-nonmm-stable-2022-06-05' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm: delayacct: track delays from write-protect copy
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Linus Torvalds authored
The bluetooth code uses our bitmap infrastructure for the two bits (!) of connection setup flags, and in the process causes odd problems when it converts between a bitmap and just the regular values of said bits. It's completely pointless to do things like bitmap_to_arr32() to convert a bitmap into a u32. It shoudln't have been a bitmap in the first place. The reason to use bitmaps is if you have arbitrary number of bits you want to manage (not two!), or if you rely on the atomicity guarantees of the bitmap setting and clearing. The code could use an "atomic_t" and use "atomic_or/andnot()" to set and clear the bit values, but considering that it then copies the bitmaps around with "bitmap_to_arr32()" and friends, there clearly cannot be a lot of atomicity requirements. So just use a regular integer. In the process, this avoids the warnings about erroneous use of bitmap_from_u64() which were triggered on 32-bit architectures when conversion from a u64 would access two words (and, surprise, surprise, only one word is needed - and indeed overkill - for a 2-bit bitmap). That was always problematic, but the compiler seems to notice it and warn about the invalid pattern only after commit 0a97953f ("lib: add bitmap_{from,to}_arr64") changed the exact implementation details of 'bitmap_from_u64()', as reported by Sudip Mukherjee and Stephen Rothwell. Fixes: fe92ee64 ("Bluetooth: hci_core: Rework hci_conn_params flags") Link: https://lore.kernel.org/all/YpyJ9qTNHJzz0FHY@debian/ Link: https://lore.kernel.org/all/20220606080631.0c3014f2@canb.auug.org.au/ Link: https://lore.kernel.org/all/20220605162537.1604762-1-yury.norov@gmail.com/Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Reported-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com> Reviewed-by: Yury Norov <yury.norov@gmail.com> Cc: Luiz Augusto von Dentz <luiz.von.dentz@intel.com> Cc: Marcel Holtmann <marcel@holtmann.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Al Viro authored
It used to grab an extra reference to struct file rather than just transferring to caller the one it had removed from descriptor table. New variant doesn't, and callers need to be adjusted. Reported-and-tested-by: syzbot+47dd250f527cb7bebf24@syzkaller.appspotmail.com Fixes: 6319194e ("Unify the primitives for file descriptor closing") Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull x86 SGX fix from Thomas Gleixner: "A single fix for x86/SGX to prevent that memory which is allocated for an SGX enclave is accounted to the wrong memory control group" * tag 'x86-urgent-2022-06-05' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/sgx: Set active memcg prior to shmem allocation
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull x86 mm cleanup from Thomas Gleixner: "Use PAGE_ALIGNED() instead of open coding it in the x86/mm code" * tag 'x86-mm-2022-06-05' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/mm: Use PAGE_ALIGNED(x) instead of IS_ALIGNED(x, PAGE_SIZE)
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull x86 microcode updates from Thomas Gleixner: - Disable late microcode loading by default. Unless the HW people get their act together and provide a required minimum version in the microcode header for making a halfways informed decision its just lottery and broken. - Warn and taint the kernel when microcode is loaded late - Remove the old unused microcode loader interface - Remove a redundant perf callback from the microcode loader * tag 'x86-microcode-2022-06-05' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/microcode: Remove unnecessary perf callback x86/microcode: Taint and warn on late loading x86/microcode: Default-disable late loading x86/microcode: Rip out the OLD_INTERFACE
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