- 08 Jun, 2021 40 commits
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Yang Yingliang authored
Use devm_platform_get_and_ioremap_resource() and devm_platform_ioremap_resource_byname to simplify code. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Vladimir Oltean authored
Instead of relying on the static initialization done by ocelot_init_port() which enables flow control unconditionally, set SYS_PAUSE_CFG_PAUSE_ENA according to the parameters negotiated by the PHY. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Wang Hai authored
Convert list_for_each() to list_for_each_entry() where applicable. This simplifies the code. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Wang Hai <wanghai38@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Wang Hai authored
Convert list_for_each() to list_for_each_entry() where applicable. This simplifies the code. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Wang Hai <wanghai38@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Vladimir Oltean authored
priv->plat->mdio_bus_data is optional, some platforms may not set it, however we proceed to look straight at priv->plat->mdio_bus_data->has_xpcs. Since the xpcs is instantiated based on the has_xpcs property, we can avoid looking at the priv->plat->mdio_bus_data structure altogether and just check for the presence of the xpcs pointer. Fixes: 11059740 ("net: pcs: xpcs: convert to phylink_pcs_ops") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Wang Hai authored
Convert list_for_each() to list_for_each_entry() where applicable. This simplifies the code. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Wang Hai <wanghai38@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Wang Hai authored
Convert list_for_each() to list_for_each_entry() where applicable. This simplifies the code. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Wang Hai <wanghai38@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Wang Hai authored
Convert list_for_each() to list_for_each_entry() where applicable. This simplifies the code. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Wang Hai <wanghai38@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Guangbin Huang says: ==================== net: hns3: add RAS compatibility adaptation solution This patchset adds RAS compatibility adaptation solution for new devices. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Jiaran Zhang authored
During initialization, the driver logs and clears the hw errors that already occurred. For device supports imp-handle ras capability, it needs handle different error status, otherwise it may cause wrong reset. So fix it by adding a new processing branch. Signed-off-by: Jiaran Zhang <zhangjiaran@huawei.com> Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jiaran Zhang authored
Update error recovery module and type for RoCE. The enumeration values of module names and error types are not sorted in sequence. If use the current printing mode, they cannot be correctly printed. Use the index mode, If mod_id and type_id match the enumerated value, display the corresponding information. Signed-off-by: Jiaran Zhang <zhangjiaran@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jiaran Zhang authored
IMP(Intelligent Management Processor) firmware add a new feature to handle and consolidate RAS information for new devices, NIC driver only needs to query the reported RAS information. NIC driver adds support for this feature. Driver queries device capability to check whether IMP support this feature, If yes, execute the new RAS processing branch. In order to add a method to check whether PF supports imp-handle RAS feature, add dumping this info in debugfs. Signed-off-by: Jiaran Zhang <zhangjiaran@huawei.com> Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jiaran Zhang authored
To adapt to hardware modification and ensure that the driver is compatible with the original error handling content, we need to add the RAS compatibility adaptation solution. Add a processing branch to the driver during error handling. In the new processing branch, NIC fault information is integrated by the IMP. An interaction command is added between the driver and IMP to query and clear the fault source and interrupt source. The IMP integrates error information and reports the highest reset level to the driver. Signed-off-by: Jiaran Zhang <zhangjiaran@huawei.com> Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Yufeng Mo authored
Currently, hardware errors can be reported through AER or MSI-X mode. However, the AER mode is intended to handle only bus errors, but not hardware errors. On the other hand, virtual machines cannot handle AER errors. When an AER error is reported, virtual machines will be suspended. So add support for handling all these hardware errors through MSI-X mode which depends on a newer version of firmware, and reserve the handler of the AER mode for compatibility. Signed-off-by: Yufeng Mo <moyufeng@huawei.com> Signed-off-by: Jiaran Zhang <zhangjiaran@huawei.com> Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Shay Agroskin says: ==================== se build_skb and reorganize some code in ENA this patchset introduces several changes: - Use build_skb() on RX side. This allows to ensure that the headers are in the linear part - Batch some code into functions and remove some of the code to make it more readable and less error prone - Fix RST format and outdated description in ENA documentation - Improve cache alignment in the code ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Shay Agroskin authored
Restructure some ethtool to a switch-case blocks to make it more uniform with other similar functions. Also restructure variable declaration to create reversed x-mas tree. Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com> Signed-off-by: Shay Agroskin <shayagr@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Shay Agroskin authored
Use dev_alloc() when allocating RX buffers instead of specifying the allocation flags explicitly. This result in same behaviour with less code. Also move the page allocation and its DMA mapping into a function. This creates a logical block, which may help understanding the code. Signed-off-by: Shay Agroskin <shayagr@amazon.com> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Shay Agroskin authored
The ena_ring_tx_doorbell() is introduced to call the doorbell and increase the driver's corresponding stat. Signed-off-by: Ido Segev <idose@amazon.com> Signed-off-by: Shay Agroskin <shayagr@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Shay Agroskin authored
The documentation file used to be written in markdown format but was converted to reStructuredText (rst). The converted file doesn't keep up with rst format requirements which results in hard-to-read text. This patch fixes the formatting of the file. The patch also * Highlights and emphasizes some lines to improve readability * Rephrases some hard-to-understand text * Updates outdated function descriptions. * Removes TSO description which falsely claims the driver supports it Signed-off-by: Shay Agroskin <shayagr@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Shay Agroskin authored
Remove the module param 'debug' which allows to specify the message level of the driver. This value can be specified using ethtool command. Also reduce the message level of LLQ support to be a warning since it is not an indication of an error. Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com> Signed-off-by: Shay Agroskin <shayagr@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Shay Agroskin authored
There are instances when we want to know when the last napi was called for debugging. On stuck / heavy loaded CPUs, the ena napi handler might not be called for a long period of time. This stat can help us to determine how much time passed since the last execution of napi. Signed-off-by: Sameeh Jubran <sameehj@amazon.com> Signed-off-by: Shay Agroskin <shayagr@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Shay Agroskin authored
This patch converts the RX path to use build_skb() for packets larger than copybreak (set to 256 by default). This function makes the first descriptor's page to be the linear part of the sk_buff struct buffer. Also remove the SKB description from the README since most of it no longer relevant and the parts that are left don't add information. Signed-off-by: Shay Agroskin <shayagr@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Shay Agroskin authored
Add prints to improve logging of driver's errors. Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com> Signed-off-by: Shay Agroskin <shayagr@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Shay Agroskin authored
The ENA_DEFAULT_MIN_RX_BUFF_ALLOC_SIZE macro, ena_xdp_queues_present() function and SUSPEND_RESUME enums aren't used in the driver, and so not needed. Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com> Signed-off-by: Gal Pressman <galpress@amazon.com> Signed-off-by: Sameeh Jubran <sameehj@amazon.com> Signed-off-by: Shay Agroskin <shayagr@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Shay Agroskin authored
This tweaks several small places to improve the data access in fast path: * Remove duplicates of first_interrupt flag and surround it with WRITE/READ_ONCE macros: The flag is used to detect HW disorders in its interrupt communication with the driver. The flag is set when an interrupt is received and used in the health check function (ena_timer_service()) to help it find irregularities. * Reorder some fields in ena_napi struct to take better advantage of cache access pattern. * Move XDP TX queue number to a variable to save its calculation for every packet. * Use likely in a condition to improve branch prediction The 'first_interrupt' and 'interrupt_masked' flags were moved to reside in the same cache line as the first fields of 'napi' struct. This placement ensures that all memory accessed during upper-half handler reside in the same cacheline (napi_schedule_irqoff() only accesses 'state' and 'poll_list' fields which are at the beginning of napi struct). Signed-off-by: Sameeh Jubran <sameehj@amazon.com> Signed-off-by: Shay Agroskin <shayagr@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Ido Schimmel says: ==================== mlxsw: Various updates This patchset contains various updates for mlxsw. The most significant change is the long overdue removal of the abort mechanism in the first two patches. Patches #1-#2 remove the route abort mechanism. This change is long overdue and explained in detail in the commit message. Patch #3 sets ports down in a few selftests that forgot to do so. Discovered using a BPF tool (WIP) that monitors ASIC resources. Patch #4 fixes an issue introduced by commit 557c4d2f ("selftests: devlink_lib: add check for devlink device existence"). Patches #5-#8 modify the driver to read transceiver module's temperature thresholds using MTMP register (when supported) instead of directly from the module's EEPROM using MCIA register. This is both more reliable and more efficient as now the module's temperature and thresholds are read using one transaction instead of three. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Mykola Kostenok authored
mlxsw_thermal_module_trips_update() is used to update the trip points of the module's thermal zone. Currently, this is done by querying the thresholds from the module's EEPROM via MCIA register. This data does not pass validation and in some cases can be unreliable. For example, due to some problem with transceiver module. Previous patch made it possible to read module's temperature and thresholds via MTMP register. Therefore, extend mlxsw_thermal_module_trips_update() to use the thresholds queried from MTMP, if valid. This is both more reliable and more efficient than current method, as temperature and thresholds are queried in one transaction instead of three. This is significant when working over a slow bus such as I2C. Signed-off-by: Mykola Kostenok <c_mykolak@nvidia.com> Acked-by: Vadim Pasternak <vadimp@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Mykola Kostenok authored
Provide new function mlxsw_thermal_module_temp_and_thresholds_get() for reading temperature and temperature thresholds by a single operation. The motivation is to reduce the number of transactions with the device which is important when operating over a slow bus such as I2C. Currently, the sole caller of the function is only using it to read the module's temperature. The next patch will also use it to query the module's temperature thresholds. Signed-off-by: Mykola Kostenok <c_mykolak@nvidia.com> Acked-by: Vadim Pasternak <vadimp@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Mykola Kostenok authored
Currently, module temperature thresholds are obtained from Management Cable Info Access (MCIA) register by specifying the thresholds offsets within module EEPROM layout. This data does not pass validation and in some cases can be unreliable. For example, due to some problem with the module. Add support for a new feature provided by Management Temperature (MTMP) register for sanitization of temperature thresholds values. Extend mlxsw_env_module_temp_thresholds_get() to get temperature thresholds through MTMP field 'max_operational_temperature' - if it is not zero, feature is supported. Otherwise fallback to old method and get the thresholds through MCIA. Signed-off-by: Mykola Kostenok <c_mykolak@nvidia.com> Acked-by: Vadim Pasternak <vadimp@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Mykola Kostenok authored
Extend Management Temperature (MTMP) register with new field specifying the maximum temperature threshold. Extend mlxsw_reg_mtmp_unpack() function with two extra arguments, providing high and maximum temperature thresholds. For modules, these thresholds correspond to critical and emergency thresholds that are read from the module's EEPROM. Signed-off-by: Mykola Kostenok <c_mykolak@nvidia.com> Acked-by: Vadim Pasternak <vadimp@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Petr Machata authored
In the commit referenced below, a check was added to devlink_lib that asserts the existence of a devlink device referenced by $DEVLINK_DEV. Unfortunately, several netdevsim tests point DEVLINK_DEV at a device that does not exist at the time that devlink_lib is sourced. Thus these tests spuriously fail. Fix this by introducing an override. By setting DEVLINK_DEV to an empty string, the user declares their intention to handle DEVLINK_DEV management on their own. In all netdevsim tests that use devlink_lib and set DEVLINK_DEV, set instead an empty DEVLINK_DEV just before sourcing devlink_lib, and set it to the correct value right afterwards. Fixes: 557c4d2f ("selftests: devlink_lib: add check for devlink device existence") Signed-off-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Amit Cohen authored
Several tests do not set some ports down as part of their cleanup(), resulting in IPv6 link-local addresses and associated routes not being deleted. These leaks were found using a BPF tool that monitors ASIC resources. Solve this by setting the ports down at the end of the tests. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Amit Cohen authored
To check how many routes are installed in hardware, the test runs "ip route" and greps for "offload", which includes routes with state "offload_failed". Till now, this wrong check was not found because after one failure in route insertion, the driver moved to "abort" mode, which means that user cannot try to add more routes. The previous patch removed the abort mechanism and now failed routes are counted as offloaded. Fix this by not considering routes with "offload_failed" flag as offloaded. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Amit Cohen authored
The abort mechanism was introduced in commit 8e05fd71 ("fib: hook IPv4 fib for hardware offload") with the purpose of falling back to software-based routing in case of a route programming error in hardware. The process is irreversible and requires users to reload the offloading driver or reboot the machine. While this approach might make sense in theory, it makes very little sense in practice. In the case of high speed ASICs such as the Spectrum ASIC, the abort mechanism effectively kills the machine upon a non-fatal error such as a route programming error. Such an extreme policy does not belong in the kernel, especially when user space can simply try to reprogram the route following the RTM_NEWROUTE failure notification. Therefore, remove the abort mechanism. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Vladimir Oltean says: ==================== Add NXP SJA1110 support to the sja1105 DSA driver The NXP SJA1110 is an automotive Ethernet switch with an embedded Arm Cortex-M7 microcontroller. The switch has 11 ports (10 external + one for the DSA-style connection to the microcontroller). The microcontroller can be disabled and the switch can be controlled over SPI, a la SJA1105 - this is how this driver handles things. There are some integrated NXP PHYs (100base-T1 and 100base-TX). Their initialization is handled by their own PHY drivers, the switch is only concerned with enabling register accesses to them, by registering two MDIO buses. Changes in v3: - Make sure the VLAN retagging port is enabled and functional - Dropped SGMII PCS from this series Changes in v2: - converted nxp,sja1105 DT bindings to YAML - registered the PCS MDIO bus and forced auto-probing off for all PHY addresses for this bus - changed the container node name for the 2 MDIO buses from "mdio" to "mdios" to avoid matching on the mdio.yaml schema (it's just a container node, not an MDIO bus) - fixed an uninitialized "offset" variable usage in sja1110_pcs_mdio_{read,write} - using the mdiobus_c45_addr macro instead of open-coding that operation ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Vladimir Oltean authored
The SJA1110 contains two types of integrated PHYs: one 100base-TX PHY and multiple 100base-T1 PHYs. The access procedure for the 100base-T1 PHYs is also different than it is for the 100base-TX one. So we register 2 MDIO buses, one for the base-TX and the other for the base-T1. Each bus has an OF node which is a child of the "mdio" subnode of the switch, and they are recognized by compatible string. Cc: Russell King <linux@armlinux.org.uk> Cc: Heiner Kallweit <hkallweit1@gmail.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Vladimir Oltean authored
The SJA1110 has an extra configuration in the General Parameters Table through which the user can select the buffer reservation config. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Vladimir Oltean authored
The SJA1110 is basically an SJA1105 with more ports, some integrated PHYs (100base-T1 and 100base-TX) and an embedded microcontroller which can be disabled, and the switch core can be controlled by a host running Linux, over SPI. This patch contains: - the static and dynamic config packing functions, for the tables that are common with SJA1105 - one more static config tables which is "unique" to the SJA1110 (actually it is a rehash of stuff that was placed somewhere else in SJA1105): the PCP Remapping Table - a reset and clock configuration procedure for the SJA1110 switch. This resets just the switch subsystem, and gates off the clock which powers on the embedded microcontroller. - an RGMII delay configuration procedure for SJA1110, which is very similar to SJA1105, but different enough for us to be unable to reuse it (this is a pattern that repeats itself) - some adaptations to dynamic config table entries which are no longer programmed in the same way. For example, to delete a VLAN, you used to write an entry through the dynamic reconfiguration interface with the desired VLAN ID, and with the VALIDENT bit set to false. Now, the VLAN table entries contain a TYPE_ENTRY field, which must be set to zero (in a backwards-incompatible way) in order for the entry to be deleted, or to some other entry for the VLAN to match "inner tagged" or "outer tagged" packets. - a similar thing for the static config: the xMII Mode Parameters Table encoding for SGMII and MII (the latter just when attached to a 100base-TX PHY) just isn't what it used to be in SJA1105. They are identical, except there is an extra "special" bit which needs to be set. Set it. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Vladimir Oltean authored
There are 4 variations of the SJA1110 switch which have a different set of MII protocols supported per port. Document the compatible strings. Also, the SJA1110 optionally supports 2 internal MDIO buses for 2 different types of Ethernet PHYs. Document a container node called "mdios" which has 2 subnodes "mdio@0" and "mdio@1", identifiable via compatible string, under which the driver finds the internal PHYs. Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Sergey Ryazanov says: ==================== net: WWAN subsystem improvements While working on WWAN netdev creation support, I notice a few things that could be done to make the wwan subsystem more developer and user friendly. This series implements them. The series begins with a WWAN HW simulator designed simplify testing and make the WWAN subsystem available for a wider audience. The next two patches are intended to make the code a bit more clearer. This is followed by a few patches to make the port device naming more user-friendly. The series is finishes with a set of changes that allow the WWAN AT port to be used with terminal emulation software. All changes were tested with the HW simulator that was introduced in this series, as well as with a Huawei E3372 LTE modem (a CDC-NCM device), which I finally found on my desk. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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