- 21 May, 2022 17 commits
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Miaoqian Lin authored
of_parse_phandle() returns a node pointer with refcount incremented, we should use of_node_put() on it when done. Add missing of_node_put() in some error paths. Fixes: bf900639 ("watchdog: ts4800: add driver for TS-4800 watchdog") Signed-off-by:
Miaoqian Lin <linmq006@gmail.com> Reviewed-by:
Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20220511114203.47420-1-linmq006@gmail.comSigned-off-by:
Wim Van Sebroeck <wim@linux-watchdog.org>
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Geert Uytterhoeven authored
Despite the name, R-Car V3U is the first member of the R-Car Gen4 family. Hence move its compatible value to the R-Car Gen4 section. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by:
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Phil Edworthy authored
This is a driver for the standard WDT on the RZ/N1 devices. This WDT has very limited timeout capabilities. However, it can reset the device. To do so, the corresponding bits in the SysCtrl RSTEN register need to be enabled. This is not done by this driver. Signed-off-by:
Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by:
Jean-Jacques Hiblot <jjhiblot@traphandler.com> Reviewed-by:
Tzung-Bi Shih <tzungbi@kernel.org> Reviewed-by:
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Jean-Jacques Hiblot authored
Describe the WDT hardware in the RZ/N1 series. Signed-off-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220427135531.708279-2-jjhiblot@traphandler.com [groeck: Rebased, fixed conflicts] Signed-off-by:
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Liu Xinpeng authored
Test shows that wachdog still reboots machine after the module is removed. Use watchdog_stop_on_unregister to stop the watchdog on removing. Signed-off-by:
Liu Xinpeng <liuxp11@chinatelecom.cn> eviewed-by:
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Liu Xinpeng authored
Executing reboot command several times on the machine "Dell PowerEdge R740", UEFI security detection stopped machine with the following prompt: UEFI0082: The system was reset due to a timeout from the watchdog timer. Check the System Event Log (SEL) or crash dumps from Operating Sysstem to identify the source that triggered the watchdog timer reset. Update the firmware or driver for the identified device. iDRAC has warning event: "The watchdog timer reset the system". This patch fixes this issue by adding the reboot notifier. Signed-off-by:
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Liu Xinpeng authored
If max_hw_heartbeat_ms is provided, the configured maximum timeout is not limited by it. The limit check in this driver therefore doesn't make much sense. Similar, the watchdog core ensures that minimum timeout limits are met if min_hw_heartbeat_ms is set. Using watchdog_timeout_invalid() makes more sense because it takes this into account. Signed-off-by:
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Andrej Picej authored
Document the watchdog timeout mode property. If this property is used the user can select what happens on watchdog timeout. Set this property to 1 to enable SHUTDOWN (the device resets), set it to 0 and the device will go to POWERDOWN on watchdog timeout. If this property is not set, don't touch the WATCHDOG_SD bit and leave the configuration to OTP. This way backward compatibility is not broken. Signed-off-by:
Andrej Picej <andrej.picej@norik.com> Reviewed-by:
Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Acked-by:
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Biju Das authored
Document RZ/G2UL WDT bindings. RZ/G2UL WDT is similar to one found on the RZ/G2L SoC. No driver changes are required as generic compatible string "renesas,rzg2l-wdt" will be used as a fallback. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Acked-by:
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Liu Xinpeng authored
For power management, SET_NOIRQ_SYSTEM_SLEEP_PM_OPS defined for CONFIG_PM_SLEEP, will point ->suspend_noirq, ->freeze_noirq and ->poweroff_noirq to the same function. Vice versa happens for ->resume_noirq, ->thaw_noirq and ->restore_noirq. Signed-off-by:
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Miaoqian Lin authored
If the device is already in a runtime PM enabled state pm_runtime_get_sync() will return 1, so a test for negative value should be used to check for errors. Fixes: 2d63908b ("watchdog: Add K3 RTI watchdog support") Signed-off-by:
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Bjorn Andersson authored
Add compatibles for the SC8180X and SC8280XP platforms to the Qualcomm watchdog binding. Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by:
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Jan Kiszka authored
This ensures that the same value is read back as was eventually programmed when using seconds as accuracy. Even then, comparing the more precise heartbeat_ms against heartbeat in seconds will almost never provide a match and will needlessly raise a warning. Fix by comparing apples to apples. Tested in combination with U-Boot as watchdog starter. Signed-off-by:
Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by:
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Kunihiko Hayashi authored
This refers common bindings, so this is preferred for unevaluatedProperties instead of additionalProperties. Signed-off-by:
Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Reviewed-by:
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Eliav Farber authored
Disable the watchdog if it is active while removing the module. It is necessary in order to prevent a reset in case watchdog hw was running before the removal. Signed-off-by:
Eliav Farber <farbere@amazon.com> Reviewed-by:
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Primoz Fiser authored
Optionally disable watchdog during suspend (if enabled) and re-enable it upon resume. This enables boards to sleep without being interrupted by the watchdog. This patch is based on commit f6c98b08 ("watchdog: da9062: add power management ops") and commit 8541673d ("watchdog: da9062: fix power management ops") and brings the same functionality to DA9063. Signed-off-by:
Primoz Fiser <primoz.fiser@norik.com> Reviewed-by:
Adam Thomson <DLG-Adam.Thomson.Opensource@dm.renesas.com> Reviewed-by:
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Primoz Fiser authored
Document the watchdog disable option which can be used if the hardware automatic suspend option is broken. Based on commit c514430c ("dt-bindings: watchdog: da9062: add suspend disable option"). Signed-off-by:
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- 08 May, 2022 21 commits
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Andre Przywara authored
Most Allwinner SoCs have just one input clock to drive the watchdog peripheral. So far this is the 24 MHz "HOSC" oscillator, divided down internally to 32 KHz. The F1C100 series watchdog however uses the unchanged 32 KHz "LOSC" as its only clock input, which has the same effect, but let's the binding description mismatch. Change the binding description to name the clocks more loosely, so both the LOSC and divided HOSC match the description. As the fixed clock names now make less sense, drop them from SoCs supporting just one clock input, they were not used by any DT anyway. For the newer SoCs, supporting a choice of two input clocks, we keep both the description and clock-names requirement. Signed-off-by:
Andre Przywara <andre.przywara@arm.com> Reviewed-by:
Samuel Holland <samuel@sholland.org> Reviewed-by:
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Andre Przywara authored
The F1C100 series actually features a newer generation watchdog IP, so the compatible string was wrong. Signed-off-by:
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Xiantao Hu authored
Sunplus SP7021 requires watchdog timer support. Add watchdog driver to enable this. Signed-off-by:
Xiantao Hu <xt.hu@cqplus1.com> Reviewed-by:
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Xiantao Hu authored
This adds the documentation for the devicetree bindings of the Sunplus SP7021 watchdog driver, found from SP7021 SoCs and newer. Signed-off-by:
Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by:
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Sam Shih authored
Add infracfg, toprgu, and ethsys reset-controller header file for MT7986 platform. Signed-off-by:
Sam Shih <sam.shih@mediatek.com> Acked-by:
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Lad Prabhakar authored
Document RZ/V2L WDT bindings. RZ/V2L WDT is identical to one found on the RZ/G2L SoC. No driver changes are required as generic compatible string "renesas,rzg2l-wdt" will be used as a fallback. While at it, drop the comment "# RZ/G2L" for "renesas,rzg2l-wdt" compatible string as this will avoid changing the line for every new SoC addition. Signed-off-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by:
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Biju Das authored
This patch adds support for set_timeout callback. Once WDT is started, the WDT cycle setting register(WDTSET) can be updated only after issuing a module reset. Otherwise, it will ignore the writes and will hold the previous value. This patch updates the WDTSET register if it is active. Signed-off-by:
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Biju Das authored
This patch uses the force reset(WDTRSTB) for triggering WDT reset for restart callback. This method(ie, Generate Reset (WDTRSTB) Signal on parity error)is faster compared to the overflow method for triggering watchdog reset. Overflow method: reboot: Restarting system Reboot failed -- System halted NOTICE: BL2: v2.5(release):v2.5/rzg2l-1.00-27-gf48f1440c Parity error method: reboot: Restarting system NOTICE: BL2: v2.5(release):v2.5/rzg2l-1.00-27-gf48f1440c Signed-off-by:
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Biju Das authored
If reset_control_deassert() fails, then we won't be able to access the device registers. Therefore check the return code of reset_control_deassert() and bailout in case of error. Signed-off-by:
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Biju Das authored
Both rzg2l_wdt_probe() and rzg2l_wdt_start() calls reset_control_ deassert() which results in a reset control imbalance. This patch fixes reset control imbalance by removing reset_control_ deassert() from rzg2l_wdt_start() and replaces reset_control_assert with reset_control_reset in rzg2l_wdt_stop() as watchdog module can be stopped only by a module reset. This change will allow us to restart WDT after stop() by configuring WDT timeout and enable registers. Fixes: 2cbc5cd0 ("watchdog: Add Watchdog Timer driver for RZ/G2L") Signed-off-by:
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Biju Das authored
This patch fixes the issue 'BUG: Invalid wait context' during restart() callback by using clk_prepare_enable() instead of pm_runtime_get_sync() for turning on the clocks during restart. This issue is noticed when testing with renesas_defconfig. [ 42.213802] reboot: Restarting system [ 42.217860] [ 42.219364] ============================= [ 42.223368] [ BUG: Invalid wait context ] [ 42.227372] 5.17.0-rc5-arm64-renesas-00002-g10393723e35e #522 Not tainted [ 42.234153] ----------------------------- [ 42.238155] systemd-shutdow/1 is trying to lock: [ 42.242766] ffff00000a650828 (&genpd->mlock){+.+.}-{3:3}, at: genpd_lock_mtx+0x14/0x20 [ 42.250709] other info that might help us debug this: [ 42.255753] context-{4:4} [ 42.258368] 2 locks held by systemd-shutdow/1: [ 42.262806] #0: ffff80000944e1c8 (system_transition_mutex#2){+.+.}-{3:3}, at: __do_sys_reboot+0xd0/0x250 [ 42.272388] #1: ffff8000094c4e40 (rcu_read_lock){....}-{1:2}, at: atomic_notifier_call_chain+0x0/0x150 [ 42.281795] stack backtrace: [ 42.284672] CPU: 0 PID: 1 Comm: systemd-shutdow Not tainted 5.17.0-rc5-arm64-renesas-00002-g10393723e35e #522 [ 42.294577] Hardware name: Renesas SMARC EVK based on r9a07g044c2 (DT) [ 42.301096] Call trace: [ 42.303538] dump_backtrace+0xcc/0xd8 [ 42.307203] show_stack+0x14/0x30 [ 42.310517] dump_stack_lvl+0x88/0xb0 [ 42.314180] dump_stack+0x14/0x2c [ 42.317492] __lock_acquire+0x1b24/0x1b50 [ 42.321502] lock_acquire+0x120/0x3a8 [ 42.325162] __mutex_lock+0x84/0x8f8 [ 42.328737] mutex_lock_nested+0x30/0x58 [ 42.332658] genpd_lock_mtx+0x14/0x20 [ 42.336319] genpd_runtime_resume+0xc4/0x228 [ 42.340587] __rpm_callback+0x44/0x170 [ 42.344337] rpm_callback+0x64/0x70 [ 42.347824] rpm_resume+0x4e0/0x6b8 [ 42.351310] __pm_runtime_resume+0x50/0x78 [ 42.355404] rzg2l_wdt_restart+0x28/0x68 [ 42.359329] watchdog_restart_notifier+0x1c/0x30 [ 42.363943] atomic_notifier_call_chain+0x94/0x150 [ 42.368732] do_kernel_restart+0x24/0x30 [ 42.372652] machine_restart+0x44/0x70 [ 42.376399] kernel_restart+0x3c/0x60 [ 42.380058] __do_sys_reboot+0x228/0x250 [ 42.383977] __arm64_sys_reboot+0x20/0x28 [ 42.387983] invoke_syscall+0x40/0xf8 Fixes: 2cbc5cd0 ("watchdog: Add Watchdog Timer driver for RZ/G2L") Signed-off-by: -
Biju Das authored
Both rzg2l_wdt_probe() and rzg2l_wdt_start() calls pm_runtime_get() which results in a usage counter imbalance. This patch fixes this issue by removing pm_runtime_get() call from probe. Fixes: 2cbc5cd0 ("watchdog: Add Watchdog Timer driver for RZ/G2L") Signed-off-by:
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Biju Das authored
The value of timer_cycle_us can be 0 due to 32bit overflow. For eg:- If we assign the counter value "0xfff" for computing maxval. This patch fixes this issue by appending ULL to 1024, so that it is promoted to 64bit. This patch also fixes the warning message, 'watchdog: Invalid min and max timeout values, resetting to 0!'. Fixes: 2cbc5cd0 ("watchdog: Add Watchdog Timer driver for RZ/G2L") Signed-off-by:
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Corentin Labbe authored
Converts watchdog/faraday,ftwdt010.txt to yaml. This permits to detect missing properties like clocks and resets or compatible like moxa,moxart-watchdog. Signed-off-by:
Corentin Labbe <clabbe@baylibre.com> Reviewed-by:
Linus Walleij <linus.walleij@linaro.org> Reviewed-by:
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David Heidelberg authored
Parse compatible as expected for modern QCOMs. Fixes warnings as: arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dt.yaml: watchdog@17980000: compatible: ['qcom,apss-wdt-sdm845', 'qcom,kpss-wdt'] is too long From schema: Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dt.yaml: watchdog@17980000: compatible: Additional items are not allowed ('qcom,kpss-wdt' was unexpected) From schema: Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml Signed-off-by:David Heidelberg <david@ixit.cz> Reviewed-by:
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Sam Shih authored
Besides watchdog, the mt7986 toprgu module also provides software reset functionality for various peripheral subsystems (eg, ethernet, pcie, and connectivity) Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by:
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Rafał Miłecki authored
A new "compatible" value has been added in the commit 17fffe91 ("dt-bindings: watchdog: Add BCM6345 compatible to BCM7038 binding"). It's meant to be used for BCM63xx SoCs family but hardware block can be programmed just like the 7038 one. Cc: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
Rafał Miłecki <rafal@milecki.pl> Acked-by:
Florian Fainelli <f.fainelli@gmail.com> Reviewed-by:
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Peng Fan authored
The wdog on i.MX93 is modified from i.MX8ULP with some changes, it uses one compatible string, so add i.MX93 support. Signed-off-by:
Peng Fan <peng.fan@nxp.com> Acked-by:
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Runyang Chen authored
Support MT8186 watchdog device. Signed-off-by:
Runyang Chen <runyang.chen@mediatek.com> Reviewed-by:
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Runyang Chen authored
1. Add toprgu reset-controller header file for MT8186. 2. Add DSI software reset bit which is controlled in MMSYS for MT8186. Signed-off-by:
Rex-BC Chen <rex-bc.chen@mediatek.com> Acked-by:
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Rex-BC Chen authored
Add dt-binding documentation of watchdog for MediaTek MT8186 SoC. Signed-off-by:
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- 01 May, 2022 2 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds authored
Pull kvm fixes from Paolo Bonzini: "ARM: - Take care of faults occuring between the PARange and IPA range by injecting an exception - Fix S2 faults taken from a host EL0 in protected mode - Work around Oops caused by a PMU access from a 32bit guest when PMU has been created. This is a temporary bodge until we fix it for good. x86: - Fix potential races when walking host page table - Fix shadow page table leak when KVM runs nested - Work around bug in userspace when KVM synthesizes leaf 0x80000021 on older (pre-EPYC) or Intel processors Generic (but affects only RISC-V): - Fix bad user ABI for KVM_EXIT_SYSTEM_EVENT" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: x86: work around QEMU issue with synthetic CPUID leaves Revert "x86/mm: Introduce lookup_address_in_mm()" KVM: x86/mmu: fix potential races when walking host page table KVM: fix bad user ABI for KVM_EXIT_SYSTEM_EVENT KVM: x86/mmu: Do not create SPTEs for GFNs that exceed host.MAXPHYADDR KVM: arm64: Inject exception on out-of-IPA-range translation fault KVM/arm64: Don't emulate a PMU for 32-bit guests if feature not set KVM: arm64: Handle host stage-2 faults from 32-bit EL0
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