- 06 May, 2019 11 commits
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Jerome Brunet authored
This remove all the code related to phase settings. Using the Rx phase for tuning has not been reliable. We had several issues over the past months, on both v2 and v3 mmc chips After discussing the issue matter with Amlogic, They suggested to set a phase shift of 180 between Core and Tx and use signal resampling for the tuning. Since we won't be playing with the phase anymore, let's remove all the clock code related to it and set the appropriate value on init. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Jerome Brunet authored
Activating DDR in the Amlogic mmc controller, among other things, will divide the output clock by 2. So by activating it with clock on, we are creating a glitch on the output. Instead, let's deal with DDR when the clock output is off, when setting the clock. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Jerome Brunet authored
At the moment, all our attempts to enable HS400 on Amlogic chipsets have been unsuccessful or unreliable. Until we can figure out how to enable this mode safely and reliably, let's force it off. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Jerome Brunet authored
There is no reason for another device to request the MMC irq. It should only be used the MMC device, so remove IRQ_SHARED and replace by IRQ_ONESHOT as we don't the irq to fire again until the irq thread is done Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Jerome Brunet authored
This is merely a clean up. It makes sense to only ack raised irqs instead of acking everything all the time. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Jerome Brunet authored
There is already a function available to poll a register until a condition is met. Let's use it instead of open coding it. Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Kefeng Wang authored
Using dev_get_drvdata directly. Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Daniel Drake authored
DMA on this hardware is limited to dealing with a 4096 bytes at a time. Previously, the driver was set up accordingly to request single-page DMA buffers, however that had the effect of generating a large number of small MMC requests for data I/O. Improve the driver to accept multi-entry scatter-gather lists. The size of each entry is already capped to 4096 bytes (AU6601_MAX_DMA_BLOCK_SIZE), matching the hardware requirements. Existing driver code already iterates through remaining sglist entries after each DMA transfer is complete. Also add some comments to help clarify the situation, and clear up some of the confusion I had regarding DMA vs PIO. Testing with dd, this increases write performance from 2mb/sec to 10mb/sec, and increases read performance from 4mb/sec to 14mb/sec. Signed-off-by: Daniel Drake <drake@endlessm.com> Link: http://lkml.kernel.org/r/CAD8Lp47JYdZzbV9F+asNwvSfLF_po_J7ir6R_Vb-Dab21_=Krw@mail.gmail.comSigned-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Daniel Drake authored
This reverts commit 57ebb96c293da9f0ec56aba13c5541269a5c10b1. Usage of the DMA page iterator was problematic here because we were not considering offset & length of entries in the scatterlist. Also, after further discussion, the suggested revised approach is much more similar to the driver implementation before this commit was applied, so revert it. Signed-off-by: Daniel Drake <drake@endlessm.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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YueHaibing authored
Fixes gcc '-Wunused-but-set-variable' warning: drivers/memstick/host/tifm_ms.c: In function 'tifm_ms_issue_cmd': drivers/memstick/host/tifm_ms.c:259:17: warning: variable 'data' set but not used [-Wunused-but-set-variable] It's not used any more since commit 92b22d93 ("tifm: fix the MemoryStick host fifo handling code") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Pan Bian authored
In the function mmc_alloc_host, the function put_device is called to release allocated resources when mmc_gpio_alloc fails. Finally, the function pointed by host->class_dev.class->dev_release (i.e., mmc_host_classdev_release) is used to release resources including the host structure. However, after put_device, host is used and released again. Resulting in a use-after-free bug. Fixes: 1ed21719 ("mmc: core: fix error path in mmc_host_alloc") Signed-off-by: Pan Bian <bianpan2016@163.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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- 29 Apr, 2019 2 commits
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Pavel Machek authored
!voltage_ranges is tested for too late, allowing warning and undefined behavior. Fix that. Signed-off-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Yoshihiro Shimoda authored
According to eMMC specification v5.1 section 6.4.3, we should issue CMD1 repeatedly in the idle state until the eMMC is ready even if the mmc_attach_mmc() calls this function with ocr = 0. Otherwise some eMMC devices seems to enter the inactive mode after mmc_init_card() issued CMD0 when the eMMC device is busy. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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- 15 Apr, 2019 27 commits
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Sowjanya Komatineni authored
This patch adds suspend and resume PM ops for tegra SDHCI. Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Adrian Hunter authored
Remove finish_tasklet. Requests that require DMA-unmapping or sdhci_reset are completed either in the IRQ thread or a workqueue if the completion is not initiated by the IRQ. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Adrian Hunter authored
In preparation for removing finish_tasklet, call mmc_request_done() from the IRQ handler if possible. That will alleviate the potential loss of performance from shifting away from finish_tasklet. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Adrian Hunter authored
In preparation for removing finish_tasklet, move some processing from sdhci_request_done() to __sdhci_finish_mrq(). Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Adrian Hunter authored
In preparation for removing finish_tasklet, move some functions. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Adrian Hunter authored
In preparation for removing finish_tasklet, reorganize sdhci_finish_mrq() and __sdhci_finish_mrq() to separate the tasklet scheduling from other processing. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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YueHaibing authored
Fixes gcc '-Wunused-but-set-variable' warning: drivers/memstick/host/jmb38x_ms.c: In function 'jmb38x_ms_issue_cmd': drivers/memstick/host/jmb38x_ms.c:371:17: warning: variable 'data' set but not used [-Wunused-but-set-variable] It's never used since introduction and can be removed. Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Ulf Hansson authored
Cc: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Chaotian Jing <chaotian.jing@mediatek.com>
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Adrian Hunter authored
Add PCI Ids for Intel CML. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Andrea Merello authored
pwrseq_emmc.c implements a HW reset procedure for eMMC chip by driving a GPIO line. It registers the .reset() cb on mmc_pwrseq_ops and it registers a system restart notification handler; both of them perform reset by unconditionally calling gpiod_set_value(). If the eMMC reset line is tied to a GPIO controller whose driver can sleep (i.e. I2C GPIO controller), then the kernel would spit warnings when trying to reset the eMMC chip by means of .reset() mmc_pwrseq_ops cb (that is exactly what I'm seeing during boot). Furthermore, on system reset we would gets to the system restart notification handler with disabled interrupts - local_irq_disable() is called in machine_restart() at least on ARM/ARM64 - and we would be in trouble when the GPIO driver tries to sleep (which indeed doesn't happen here, likely because in my case the machine specific code doesn't call do_kernel_restart(), I guess..). This patch fixes the .reset() cb to make use of gpiod_set_value_cansleep(), so that the eMMC gets reset on boot without complaints, while, since there isn't that much we can do, we avoid register the restart handler if the GPIO controller has a sleepy driver (and we spit a dev_notice() message to let people know).. This had been tested on a downstream 4.9 kernel with backported commit 83f37ee7ba33 ("mmc: pwrseq: Add reset callback to the struct mmc_pwrseq_ops") and commit ae60fb031cf2 ("mmc: core: Don't do eMMC HW reset when resuming the eMMC card"), because I couldn't boot my board otherwise. Maybe worth to RFT. Signed-off-by: Andrea Merello <andrea.merello@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Fabien Parent authored
'top_base' memory region is optional. Check that the resource is valid before using it. This avoid getting a "invalid resource" error message printed by the kernel. Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Daniel Drake authored
DMA on this hardware is limited to dealing with a single page at a time. Previously, the driver was set up accordingly to request single-page DMA buffers, however that had the effect of generating a large number of small MMC requests for data I/O. Improve the driver to accept scatter-gather DMA buffers of larger sizes. Iterate through those buffers a page at a time. Testing with dd, this increases write performance from 2mb/sec to 10mb/sec, and increases read performance from 4mb/sec to 14mb/sec. Signed-off-by: Daniel Drake <drake@endlessm.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Faiz Abbas authored
According to the AM654x Data Manual[1], the setup timing in lower speed modes can only be met if the controller uses a falling edge data launch. To ensure this, the HIGH_SPEED_ENA (HOST_CONTROL[2]) bit should be cleared in default speed, SD high speed, MMC high speed, SDR12 and SDR25 speed modes. Use the sdhci writeb callback to implement this condition. [1] http://www.ti.com/lit/gpn/am6546 Section 5.10.5.16.1 Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Ulf Hansson authored
The amount of changes to the memorystick subsystem are limited as of today. However, I have a couple of times been funneling changes through my MMC tree and it have turned out fine. So, I am here by volunteering to continue doing this, by adding myself and the link to the MMC tree to the MEMSTICK section. Cc: Alex Dubov <oakad@yahoo.com> Cc: Alex Dubov <alex.dubov@gmail.com> Cc: Maxim Levitsky <maximlevitsky@gmail.com> Cc: Kai-Heng Feng <kai.heng.feng@canonical.com> Cc: Rui Feng <rui_feng@realsil.com.cn> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Maxim Levitsky <maximlevitsky@gmail.com>
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Ulf Hansson authored
The current SONY MEMORYSTICK CARD SUPPORT section is pointing to the TI flash media memorystick driver, which is a bit confusing. Let's make this more clear by moving this part into TI FLASH MEDIA INTERFACE DRIVER section, but rename the section to TI FLASH MEDIA MEMORYSTICK/MMC DRIVERS, as to make it more clear. Finally, add Alex Dubov to the SONY MEMORYSTICK STANDARD SUPPORT, as I believe that has been the intention. Cc: Alex Dubov <oakad@yahoo.com> Cc: Alex Dubov <alex.dubov@gmail.com> Cc: Maxim Levitsky <maximlevitsky@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Andy Shevchenko authored
Reduce size of duplicated comments by switching to use SPDX identifier. No functional change. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Andy Shevchenko authored
- spaces surrounding arithmetic operators - utilize full line limit - drop extra spaces / TABs in variable definitions Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Andy Shevchenko authored
For easy grepping on debug purposes join string literals back in the messages. No functional change. While here, join list of module authors as well. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Andy Shevchenko authored
The mmc pointer can't be NULL at ->remove(), drop the useless check. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Andy Shevchenko authored
Driver core sets it to NULL upon probe failure or release. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Ludovic Barre authored
This patch allows to get datactrl configuration specific at variant. This introduce more flexibility on datactlr value. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Ludovic Barre authored
This patch defines get_dctrl_cfg callback for sdmmc variant. sdmmc variant has specific stm32 transfer modes. sdmmc data transfer mode selection could be: -Block data transfer ending on block count. -SDIO multibyte data transfer. -MMC Stream data transfer (not used). -Block data transfer ending with STOP_TRANSMISSION command. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Ludovic Barre authored
This patch defines get_dctrl_cfg callback for qcom variant. qcom variant has a specific block size definition. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Ludovic Barre authored
This patch defines get_dctrl_cfg callback for legacy variants whatever DMA_ENGINE configuration. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> [Ulf: Fixed a build error] Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Ludovic Barre authored
This patch adds get_datactrl_cfg callback in mmci_host_ops to allow to get datactrl configuration specific at variant. Common helper function is defined and could be call by variant. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Daniel Drake authored
Enable the DMA codepath for writes as well as reads. This improves write speed from 1mb/sec to 2mb/sec (tested with dd). The original ampe_stor vendor driver also uses DMA for writes. Signed-off-by: Daniel Drake <drake@endlessm.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Christoph Muellner authored
Direct commands (DCMDs) are an optional feature of eMMC 5.1's command queue engine (CQE). The Arasan eMMC 5.1 controller uses the CQHCI, which exposes a control register bit to enable the feature. The current implementation sets this bit unconditionally. This patch allows to suppress the feature activation, by specifying the property disable-cqe-dcmd. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Fixes: 84362d79 ("mmc: sdhci-of-arasan: Add CQHCI support for arasan,sdhci-5.1") Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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