1. 22 Oct, 2019 3 commits
    • Alexey Brodkin's avatar
      ARC: perf: Accommodate big-endian CPU · 5effc09c
      Alexey Brodkin authored
      8-letter strings representing ARC perf events are stores in two
      32-bit registers as ASCII characters like that: "IJMP", "IALL", "IJMPTAK" etc.
      
      And the same order of bytes in the word is used regardless CPU endianness.
      
      Which means in case of big-endian CPU core we need to swap bytes to get
      the same order as if it was on little-endian CPU.
      
      Otherwise we're seeing the following error message on boot:
      ------------------------->8----------------------
      ARC perf        : 8 counters (32 bits), 40 conditions, [overflow IRQ support]
      sysfs: cannot create duplicate filename '/devices/arc_pct/events/pmji'
      CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.2.18 #3
      Stack Trace:
        arc_unwind_core+0xd4/0xfc
        dump_stack+0x64/0x80
        sysfs_warn_dup+0x46/0x58
        sysfs_add_file_mode_ns+0xb2/0x168
        create_files+0x70/0x2a0
      ------------[ cut here ]------------
      WARNING: CPU: 0 PID: 1 at kernel/events/core.c:12144 perf_event_sysfs_init+0x70/0xa0
      Failed to register pmu: arc_pct, reason -17
      Modules linked in:
      CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.2.18 #3
      Stack Trace:
        arc_unwind_core+0xd4/0xfc
        dump_stack+0x64/0x80
        __warn+0x9c/0xd4
        warn_slowpath_fmt+0x22/0x2c
        perf_event_sysfs_init+0x70/0xa0
      ---[ end trace a75fb9a9837bd1ec ]---
      ------------------------->8----------------------
      
      What happens here we're trying to register more than one raw perf event
      with the same name "PMJI". Why? Because ARC perf events are 4 to 8 letters
      and encoded into two 32-bit words. In this particular case we deal with 2
      events:
       * "IJMP____" which counts all jump & branch instructions
       * "IJMPC___" which counts only conditional jumps & branches
      
      Those strings are split in two 32-bit words this way "IJMP" + "____" &
      "IJMP" + "C___" correspondingly. Now if we read them swapped due to CPU core
      being big-endian then we read "PMJI" + "____" & "PMJI" + "___C".
      
      And since we interpret read array of ASCII letters as a null-terminated string
      on big-endian CPU we end up with 2 events of the same name "PMJI".
      Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
      5effc09c
    • Eugeniy Paltsev's avatar
      ARC: [plat-hsdk]: Enable on-boardi SPI ADC IC · ab563bf5
      Eugeniy Paltsev authored
      HSDK board has adc108s102 SPI ADC IC installed, enable it.
      Acked-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
      Signed-off-by: default avatarEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
      Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
      ab563bf5
    • Eugeniy Paltsev's avatar
      ARC: [plat-hsdk]: Enable on-board SPI NOR flash IC · 8ca8fa7f
      Eugeniy Paltsev authored
      HSDK board has sst26wf016b SPI NOR flash IC installed, enable it.
      Acked-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
      Signed-off-by: default avatarEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
      Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
      8ca8fa7f
  2. 20 Oct, 2019 6 commits
  3. 19 Oct, 2019 31 commits