- 11 Feb, 2022 11 commits
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Evan Quan authored
Correct the UMD pstate profiling clocks for Dimgrey Cavefish and Beige Goby. Signed-off-by:
Evan Quan <evan.quan@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
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Darren Powell authored
(v4) Modifications to satisfy checkpatch --strict (v3) Rewrote patchset to order patches as (API, hw impl, usecase) - modified amdgpu_get_pp_od_clk_voltage to try amdgpu_dpm_emit_clock_levels and fallback to amdgpu_dpm_print_clock_levels if emit is not implemented. - modified amdgpu_get_pp_dpm_clock to try amdgpu_dpm_emit_clock_levels and fallback to amdgpu_dpm_print_clock_levels if emit is not implemented. - Newline is printed to buf if no output produced == Test == LOGFILE=pp_clk.test.log AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1` AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'` HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON} lspci -nn | grep "VGA\|Display" > $LOGFILE FILES="pp_od_clk_voltage pp_dpm_sclk pp_dpm_mclk pp_dpm_pcie pp_dpm_socclk pp_dpm_fclk pp_dpm_dcefclk pp_dpm_vclk pp_dpm_dclk " for f in $FILES do echo === $f === >> $LOGFILE cat $HWMON_DIR/device/$f >> $LOGFILE done cat $LOGFILE Signed-off-by:Darren Powell <darren.powell@amd.com> Reviewed-by:
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Darren Powell authored
(v4) Modifications to satisfy checkpatch --strict (v3) Rewrote patchset to order patches as (API, hw impl, usecase) - implement emit_clk_levels for navi10, based on print_clk_levels, but using sysfs_emit without smu_cmn_get_sysfs() workaround Signed-off-by: -
Tao Zhou authored
No need to check poison setting for each channel, check for umc0 channel0 is enough. Signed-off-by:
Tao Zhou <tao.zhou1@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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Lang Yu authored
Add basic support for GC 10.1.4, it uses same IP blocks with GC 10.1.3 Signed-off-by:
Lang Yu <Lang.Yu@amd.com> Reviewed-by:
Huang Rui <ray.huang@amd.com> Reviewed-by:
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Tom Rix authored
Clang static analysis reports this problem kfd_chardev.c:2594:16: warning: The expression is an uninitialized value. The computed value will also be garbage while (ret && i--) { ^~~ i is a loop variable and this block unwinds a problem in the loop. When the error happens before the loop, this value is garbage. Move the initialization of i to its decalaration. Fixes: be072b06 ("drm/amdkfd: CRIU export BOs as prime dmabuf objects") Signed-off-by:Tom Rix <trix@redhat.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
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Oliver Logush authored
Signed-off-by:
Oliver Logush <ollogush@amd.com> Signed-off-by:
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Tom Rix authored
clang static analysis reports this problem kfd_chardev.c:2092:2: warning: 1st function call argument is an uninitialized value kvfree(bo_privs); ^~~~~~~~~~~~~~~~ When bo_buckets alloc fails, it jumps to an error handler that frees the yet to be allocated bo_privs. Because bo_buckets is the first error, return directly. Fixes: 5ccbb057 ("drm/amdkfd: CRIU Implement KFD checkpoint ioctl") Signed-off-by: -
Dan Carpenter authored
If copy_to_user() fails, it returns the number of bytes remaining to be copied but we want to return a negative error code (-EFAULT) to the user. Fixes: 9d5dabfe ("drm/amdkfd: CRIU Save Shared Virtual Memory ranges") Signed-off-by:
Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by:
David Yat Sin <david.yatsin@amd.com> Reviewed-by:
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Dan Carpenter authored
The kfd_process_device_data_by_id() does not return error pointers, it returns NULL. Fixes: bef153b7 ("drm/amdkfd: CRIU implement gpu_id remapping") Signed-off-by:
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Evan Quan authored
For Cyan Skillfish and Renoir, there is no interface provided by PMFW to retrieve the enabled features. So, we assume all features are enabled. Fixes: 7ade3ca9 ("drm/amd/pm: correct the usage for 'supported' member of smu_feature structure") Signed-off-by:
Nathan Chancellor <nathan@kernel.org> Acked-by:
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- 09 Feb, 2022 11 commits
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Yang Wang authored
"adev->gfx.rlc.rlcg_reg_access_supported = true;" the above varible were set too late during driver initialization. it will cause the driver to fail to write/read register during GMC hw init in sriov mode. move gfx_xxx_init_rlcg_reg_access_ctrl() function to gfx early init stage to avoid this issue. Fixes: 5d447e29 ("drm/amdgpu: add helper for rlcg indirect reg access") Signed-off-by:
Yang Wang <KevinYang.Wang@amd.com> Reviewed-by:
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Yang Wang authored
only vangogh has 2 types of hwmon power node: "fastPPT" and "slowPPT", the other asic only has 1 type of hwmon power node: "PPT". Signed-off-by:
Guchun Chen <guchun.chen@amd.com> Signed-off-by:
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zhanglianjie authored
After the buffer object is successfully mapped, call amdgpu_bo_kunmap before the function returns. Signed-off-by:
zhanglianjie <zhanglianjie@uniontech.com> Signed-off-by:
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zhanglianjie authored
After the buffer object is successfully mapped, call radeon_bo_kunmap before the function returns. Signed-off-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Mukul Joshi authored
A few MQD manager functions are duplicated for all versions of MQD manager. Remove this duplication by moving the common functions into kfd_mqd_manager.c file. Signed-off-by:
Mukul Joshi <mukul.joshi@amd.com> Reviewed-by:
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Mukul Joshi authored
Cleanup the kfd code by removing the unused old debugger implementation. The address watch was only ever implemented in the upstream driver for GFXv7 (Kaveri). The user mode tools runtime using this API was never open-sourced. Work on the old debugger prototype that used this API has been discontinued years ago. Only a small piece of resetting wavefronts is kept and is moved to kfd_device_queue_manager.c. Signed-off-by:
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Mukul Joshi authored
With no HWS, TLB flushing will not work in SVM code. Fix this by calling kfd_flush_tlb() which works for both HWS and no HWS case. Signed-off-by:
Philip Yang <Philip.Yang@amd.com> Reviewed-by:
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Yang Wang authored
it will cause hwmon node of power1_label is not created. v2: the hwmon node of "power1_label" is always needed for all ASICs. and the patch will remove ASIC type check for "power1_label". Fixes: ae07970a ("drm/amd/pm: add support for hwmon control of slow and fast PPT limit on vangogh") Signed-off-by:
Kenneth Feng <kenneth.feng@amd.com> Signed-off-by:
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Yang Wang authored
PPT limit cannot be queried from VF Fixes: f3527a64 ("drm/amd/pm: Enable sysfs required by rocm-smi tool for One VF mode") Signed-off-by:
Lijo Lazar <lijo.lazar@amd.com> Reviewed-by:
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Tao Zhou authored
Replace reset queue for specific PASID with unmap all queues, reset queue could break CP scheduler. Signed-off-by:
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Tao Zhou authored
As the function is used in more different cases, use a more general name. Signed-off-by:
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- 07 Feb, 2022 18 commits
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Alex Deucher authored
To align with other headers. Reviewed-by:
Harry Wentland <harry.wentland@amd.com> Signed-off-by:
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Alex Deucher authored
To align with other headers. Reviewed-by:
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Alex Deucher authored
MIT. Reviewed-by:
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Alex Deucher authored
Fixes hangs on driver load with multiple displays on DCN 2.0 parts. Bug: https://bugzilla.kernel.org/show_bug.cgi?id=215511 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1877 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1886 Fixes: ee2698cf ("drm/amd/display: Changed pipe split policy to allow for multi-display pipe split") Reviewed-by:
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Alex Deucher authored
These have been at production level for a while. Drop the flag. Reviewed-by:
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Maíra Canal authored
Include the header with the prototype to silence the following clang warnings: drivers/gpu/drm/amd/amdgpu/../pm/amdgpu_dpm_internal.c:29:6: warning: no previous prototype for function 'amdgpu_dpm_get_active_displays' [-Wmissing-prototypes] void amdgpu_dpm_get_active_displays(struct amdgpu_device *adev) ^ drivers/gpu/drm/amd/amdgpu/../pm/amdgpu_dpm_internal.c:29:1: note: declare 'static' if the function is not intended to be used outside of this translation unit void amdgpu_dpm_get_active_displays(struct amdgpu_device *adev) ^ static drivers/gpu/drm/amd/amdgpu/../pm/amdgpu_dpm_internal.c:76:5: warning: no previous prototype for function 'amdgpu_dpm_get_vrefresh' [-Wmissing-prototypes] u32 amdgpu_dpm_get_vrefresh(struct amdgpu_device *adev) ^ drivers/gpu/drm/amd/amdgpu/../pm/amdgpu_dpm_internal.c:76:1: note: declare 'static' if the function is not intended to be used outside of this translation unit u32 amdgpu_dpm_get_vrefresh(struct amdgpu_device *adev) ^ static 2 warnings generated. Besides that, remove the duplicated prototype of the function amdgpu_dpm_get_vblank_time in order to keep the consistency of the headers. Fixes: 6ddbd37f ("drm/amd/pm: optimize the amdgpu_pm_compute_clocks() implementations") Reviewed-by:Maíra Canal <maira.canal@usp.br> Signed-off-by:
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Tom Rix authored
clang static analysis reports this error amdgpu_smu.c:2289:9: warning: Called function pointer is null (null dereference) return smu->ppt_funcs->emit_clk_levels( ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ There is a logic error in the earlier check of emit_clk_levels. The error value is set to the ret variable but ret is never used. Return directly and remove the unneeded ret variable. Fixes: 5d64f9bb ("amdgpu/pm: Implement new API function "emit" that accepts buffer base and write offset") Reviewed-by: -
Christian König authored
We want to have lockdep annotation here, so make sure that we reserve the PD while removing PRTs even if it isn't strictly necessary since the VM object is about to be destroyed anyway. Signed-off-by:
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Christian König authored
Since newly added BOs don't have any mappings it's ok to add them without holding the VM lock. Only when we add per VM BOs the lock is mandatory. Signed-off-by:
Bhardwaj, Rajneesh <Rajneesh.Bhardwaj@amd.com> Acked-by:
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Martin Tsai authored
[Why] The link encoder mapping could return a null one and causes system crash. [How] Let the mapping can get an available link encoder without endpoint identification check. Reviewed-by:
Wenjing Liu <Wenjing.Liu@amd.com> Acked-by:
Jasdeep Dhillon <jdhillon@amd.com> Signed-off-by:
Martin Tsai <martin.tsai@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
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Aric Cyr authored
This version brings along the following fixes: -fix for build failure uninitalized error -Bug fix for DP2 using uncertified cable -limit unbounded request to 5k -fix DP LT sequence on EQ fail -Bug fixes for S3/S4 Acked-by:
Aric Cyr <aric.cyr@amd.com> Tested-by:
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Anthony Koo authored
Reviewed-by:
Anthony Koo <Anthony.Koo@amd.com> Tested-by:
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Ilya authored
[Why] The number of lanes wasn't being reset to maximum when reducing link rate due to an EQ failure. This could result in having fewer lanes in the verified link capabilities, a lower maximum link bandwidth, and fewer modes being supported. [How] Reset the number of lanes to max when dropping link rate due to EQ failure during link training. Reviewed-by:
Ilya <Ilya.Bakoulin@amd.com> Tested-by:
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Zhan Liu authored
[Why] Even if can_apply_edp_fast_boot is set to 1 at boot, this flag will be cleared to 0 at S3 resume. [How] Keep eDP Vdd on when eDP stream is already enabled. Reviewed-by:
Charlene Liu <Charlene.Liu@amd.com> Acked-by:
Zhan Liu <Zhan.Liu@amd.com> Tested-by:
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Paul Hsieh authored
[Why] VBIOS light up eDP with 6bpc but driver use 8bpc without disable valid stream then re-enable valid stream. Some panels can't runtime change color depth. [How] Change fastboot timing validation function. Not only check LANE_COUNT, LINK_RATE...etc Reviewed-by:
Paul Hsieh <paul.hsieh@amd.com> Tested-by:
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Dmytro Laktyushkin authored
Fix clamping to match register field size Reviewed-by:
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Tested-by:
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Bing Guo authored
Why: When resume from sleep or hiberation, blocked MST Topology discovery might need to be used. How: Added "DETECT_REASON_RESUMEFROMS3S4" to enum dc_detect_reason; use it to require blocked MST Topology discovery. Reviewed-by:
Bing Guo <Bing.Guo@amd.com> Tested-by:
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Eric Bernstein authored
remove static from optc31_set_drr Reviewed-by:
Nevenko Stupar <Nevenko.Stupar@amd.com> Acked-by:
Eric Bernstein <eric.bernstein@amd.com> Tested-by:
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