- 30 Aug, 2016 4 commits
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Tom St Denis authored
Signed-off-by:
Tom St Denis <tom.stdenis@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
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Tom St Denis authored
Signed-off-by:
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Tom St Denis authored
Remove an errant return in the middle of the check function as well as check for success in the start function. (v2) Add return check to smu_load_fw() (v3) Don't return early if SMU load check fails (v4) No returns! :-) Signed-off-by:
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Marek Olšák authored
The old mechanism used a per-submission limit that didn't take previous submissions within the same time frame into account. It also filled VRAM slowly when VRAM usage dropped due to a big eviction or buffer deallocation. This new method establishes a configurable MBps limit that is obeyed when VRAM usage is very high. When VRAM usage is not very high, it gives the driver the freedom to fill it quickly. The result is more consistent performance. It can't keep the BO move rate low if lots of evictions are happening due to VRAM fragmentation, or if a big buffer is being migrated. The amdgpu.moverate parameter can be used to set a non-default limit. Measurements can be done to find out which amdgpu.moverate setting gives the best results. Mainly APUs and cards with small VRAM will benefit from this. For F1 2015, anything with 2 GB VRAM or less will benefit. Some benchmark results - F1 2015 (Tonga 2GB): Limit MinFPS AvgFPS Old code: 14 32.6 128 MB/s: 28 41 64 MB/s: 15.5 43 32 MB/s: 28.7 43.4 8 MB/s: 27.8 44.4 8 MB/s: 21.9 42.8 (different run) Random drops in Min FPS can still occur (due to fragmented VRAM?), but the average FPS is much better. 8 MB/s is probably a good limit for this game & the current VRAM management. The random FPS drops are still to be tackled. v2: use a spinlock Signed-off-by:
Marek Olšák <marek.olsak@amd.com> Acked-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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- 25 Aug, 2016 13 commits
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Tom St Denis authored
Various minor formatting changes. Signed-off-by:
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Tom St Denis authored
If init fails free up any allocated memory. Signed-off-by:
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Tom St Denis authored
If one of the entries fails to be allocated then free all of the previous entries before freeing the array which holds their pointers. Signed-off-by:
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Rex Zhu authored
uvd dpm will be controlled by uvd. dpm just disable uvd dpm in case of suspend when play video. due to the new logic of uvd_begin_use/end_use, if disable uvd dpm in late init, will have no chance to enable uvd dpm after resume until play video again. Change-Id: I70e3d7efe63edad37f26e6c5ea089da1135c0ab5 Signed-off-by:
Rex Zhu <Rex.Zhu@amd.com> Reviewed-by:
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Rex Zhu authored
delete the members not needed when amd_powerplay_init. Signed-off-by:
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Rex Zhu authored
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Rex Zhu authored
sub_vendor_id in cgs interface. Signed-off-by:
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Rex Zhu authored
fix issue that encode test failed on the second time when vce dpm enabled on tonga. Signed-off-by:
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Rex Zhu authored
fix issue after vce encode, the eclk stay high. Signed-off-by:
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Rex Zhu authored
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Alex Deucher authored
Not of much use at the moment (we don't really use the second ring either), but may be useful later. Reviewed-by:
JimQu <Jim.Qu@amd.com> Reviewed-by:
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Alex Deucher authored
Rather than using a hardcoded value. This allows different versions to expose more or less rings. No functional change. Reviewed-by:
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Alex Deucher authored
The old names were dragged over from radeon. The new ones better match the naming conventions used in the driver. No functional change. Signed-off-by:
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- 24 Aug, 2016 9 commits
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Christian König authored
Try to be clean here, even when it's a noop on x86. Signed-off-by:
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Christian König authored
Also use the firmware size from the header instead of calculating it. Signed-off-by:
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Rex Zhu authored
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Alex Deucher authored
Replace packet2's with packet0 writes to UVD_NO_OP. The value written to UVD_NO_OP does not matter. Reviewed-by:
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Alex Deucher authored
Replace packet2's with packet0 writes to UVD_NO_OP. The value written to UVD_NO_OP does not matter. Reviewed-by:
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Alex Deucher authored
Writes to this register are the preferred way to do NOPs. Bump the driver version as well. Reviewed-by:
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Alex Deucher authored
Writes to this register are the preferred way to do NOPs. Bump the driver version as well. Reviewed-by:
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Alex Deucher authored
The VCE rings only require single dword alignment. Signed-off-by: -
Alex Deucher authored
According to the hw team, it should be 16, not 8. Cc: Peter Fang <peter.fang@amd.com> Signed-off-by:
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- 23 Aug, 2016 8 commits
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Tom St Denis authored
If the ring isn't ready lets print out which ring name to help debugging. Signed-off-by:
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Heinrich Schuchardt authored
In an if block for (running == 0) running cannot be non-zero. v2: agd: remove unused variable Reviewed-by:
Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by:
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Heinrich Schuchardt authored
In an if block for (running == 0) running cannot be non-zero. v2: agd: remove unused variable Reviewed-by:
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Heinrich Schuchardt authored
if (a == NULL || a->b == NULL) leads to a NULL pointer dereference if a == NULL. Reviewed-by:
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Heinrich Schuchardt authored
if (a == NULL || a->b == NULL) leads to a NULL pointer dereference if a == NULL. Reviewed-by:
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Heinrich Schuchardt authored
In an if block for (running == 0) running cannot be non-zero. v2: agd: remove unused variable Reviewed-by:
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Heinrich Schuchardt authored
In an if block for (running == 0) running cannot be non-zero. v2: agd: remove unused variable Reviewed-by:
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Alexandre Demers authored
Fixed indentation for readability. Reviewed-by:
Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by:
Alexandre Demers <alexandre.f.demers@gmail.com> Signed-off-by:
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- 22 Aug, 2016 6 commits
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Alexandre Demers authored
We were using the same mask twice. Looking at radeon, it seems we should be using HDMI_AVI_INFO_CONT instead as the second mask. Being there, fix typos in comments and improved readability. I haven't looked at other DCEs, the mask may also be wrong for them. Reviewed-by:
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Christian König authored
Make it more obvious what we are doing here. Signed-off-by:
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Christian König authored
AMDGPU_GEM_CREATE_NO_CPU_ACCESS and AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED are obviously mutual exclusive. So stop adding a dummy entry without effect when both are specified. Signed-off-by:
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Christian König authored
Make it more clear what this function does. No intendet functional change. Signed-off-by:
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Christian König authored
Adding a BO can make it the insertion point for larger sizes as well. v2: add a comment about the guard structure. Signed-off-by:
Felix Kuehling <felix.kuehling@amd.com> Signed-off-by:
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Tom St Denis authored
Clean up whitespace and formatting. Signed-off-by:
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