- 29 Dec, 2015 1 commit
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tom.leiming@gmail.com authored
Preparing for removing global per-hashtable lock, so the counter need to be defined as aotmic_t first. Acked-by: Daniel Borkmann <daniel@iogearbox.net> Signed-off-by: Ming Lei <tom.leiming@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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- 28 Dec, 2015 25 commits
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David S. Miller authored
Michael Chan says: ==================== bnxt_en: Patches for net-next. Mainly clean-ups, optimizations, and updating to the latest firmware interface spec. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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David Christensen authored
Added the PCI IDs for the BCM57301 and BCM57402 controllers. Signed-off-by: David Christensen <davidch@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Michael Chan authored
This interface will be forward compatible with future changes. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Michael Chan authored
Newer firmware will return the ring group resource when we call hwrm_func_qcaps(). To be compatible with older firmware, use the number of tx rings as the number of ring groups if the older firmware returns 0. When determining how many rx rings we can support, take the ring group resource in account as well in _bnxt_get_max_rings(). Divide and assign the ring groups to VFs. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Michael Chan authored
We need to keep track of all resources, such as rx rings, tx rings, cmpl rings, rss contexts, stats contexts, vnics, after we have divided them for the VFs. Otherwise, subsequent ring changes on the PF may not work correctly. We adjust all max resources in struct bnxt_pf_info after they have been assigned to the VFs. There is no need to keep the separate max_pf_tx_rings and max_pf_rx_rings. When SR-IOV is disabled, we call bnxt_hwrm_func_qcaps() to restore the max resources for the PF. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Michael Chan authored
1. Use local variable pf for repeated access to this pointer. 2. The 2nd argument num_vfs was unnecessarily declared as pointer to int. This function doesn't change num_vfs so change the argument to int. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Michael Chan authored
The hardware resources required to enable NTUPLE varies depending on how many rx channels are configured. We need to make sure we have the resources before we enable NTUPLE. Add bnxt_rfs_capable() to do the checking. In addition, we need to do the same checking in ndo_fix_features(). As the rx channels are changed using ethtool -L, we call netdev_update_features() to make the necessary adjustment for NTUPLE. Calling netdev_update_features() in netif_running() state but before calling bnxt_open_nic() would be a problem. To make this work, bnxt_set_features() has to be modified to test for BNXT_STATE_OPEN for the true hardware state instead of checking netif_running(). Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Michael Chan authored
If hardware completes single segment rx frames, don't bother setting up all the GRO related fields. Pass the SKB up as a normal frame. Reviewed-by: vasundhara volam <vvolam@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Michael Chan authored
Also, no need to check for bp->rx_nr_rings as it is always >= 1. If the allocation fails, it is not a fatal error and we can still proceed. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Satish Baddipadige authored
rx_l4_csum_error is now incremented only when offload is enabled Signed-off-by: Satish Baddipadige <sbaddipa@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Rob Swindell authored
NC-SI firmware of type apeFW (10) is now supported. Signed-off-by: Rob Swindell <swindell@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Michael Chan authored
Remove the unnecessary "if" statement before the "for" statement: if (x) { for (i = 0; i < x; i++) ... } Also, change the ring free function to return void as it only returns 0. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jeffrey Huang authored
During remove_one, the driver should issue hwrm_func_drv_unrgtr command to inform firmware that this function has been unloaded. This is to let firmware keep track of driver present/absent state when driver is gracefully unloaded. A keep alive timer is needed later to keep track of driver state during abnormal shutdown. Signed-off-by: Jeffrey Huang <huangjw@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Julia Lawall authored
The qlcnic_dcb_ops structures are never modified, so declare them as const. Done with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Chunhao Lin says: ==================== r8169: Update RTL8168H PHY parameters Fix typo in setting PHY parameter and update the way of reading PHY register "rg_saw_cnt". ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Chun-Hao Lin authored
The vlaue of RTL8168H PHY register "rg_saw_cnt" only valid from bit0 to bit13. When read this register, add bitwise-anding its value with 0x3fff. Signed-off-by: Chunhao Lin <hau@realtek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Chun-Hao Lin authored
In function "rtl8168h_2_hw_phy_config", there is a typo in setting RTL8168H PHY parameter. Signed-off-by: Chunhao Lin <hau@realtek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Thomas Falcon authored
This is a new device driver for a high performance SR-IOV assisted virtual network for IBM System p and IBM System i systems. The SR-IOV VF will be attached to the VIOS partition and mapped to the Linux client via the hypervisor's VNIC protocol that this driver implements. This driver is able to perform basic tx and rx, new features and improvements will be added as they are being developed and tested. Signed-off-by: Thomas Falcon <tlfalcon@linux.vnet.ibm.com> Signed-off-by: John Allen <jallen@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Igal Liberman says: ==================== Freescale DPAA FMan The Freescale Data Path Acceleration Architecture (DPAA) is a set of hardware components on specific QorIQ multicore processors. This architecture provides the infrastructure to support simplified sharing of networking interfaces and accelerators by multiple CPU cores and the accelerators. One of the DPAA accelerators is the Frame Manager (FMan) which contains a series of hardware blocks: ports, Ethernet MACs, a multi user RAM (MURAM) and Storage Profile (SP). This patch set introduce the FMan drivers. Each driver configures and initializes the corresponding FMan hardware module (described above). The MAC driver offers support for three different types of MACs (eTSEC, TGEC, MEMAC). v9 --> v10: - Addressed feedback from David Miller Remove private CRC implementation - Addressed feedback from Kenneth Klette Jonassen: - Use Kernel PHY API to configure dTSEC TBI - Use Kernel PHY API to configure mEMAC PCS This patchset requires device tree update: https://patchwork.ozlabs.org/patch/559501/ - Addressed feedback from Andy Fleming v8 --> v9: No changes v7 --> v8: - Addressed feedback from David Miller - Support for ARM: - Device tree parsing - IO Accessors - Addressed compilation issue on non-PPC targets v6 --> v7: - Addressed compilation issue on non-PPC targets - Removed B4860 rev 1 support v5 --> v6: - Addressed feedback from Scott: - Moved kernel doc to source files - Removed a series of configurable settings - Miscellaneous code updates v4 --> v5: - Addressed feedback from David Miller: - Removed driver layering - Reduce namespace pollution - Reduce code complexity and size v3 --> v4: - Remove device_initcall call in driver registration (redundant) - Remove hot/cold labels - Minor update in FMan Clock read from device-tree - Update fixed-link support - Addressed feedback from Stephen Hemminger - Remove bogus blank line v2 --> v3: - Addressed feedback from Scott: - Remove typedefs - Remove unnecessary memory barriers - Remove unnecessary casting - Remove KConfig options - Remove early_params - Remove Hungarian notation - Remove __packed__ attribute and padding from structures - Remove unlikely attribute (where it's not needed) - Use proper error codes and remove unnecessary prints - Use proper values for sleep routines - Replace complex Macros with functions - Improve device tree processing code - Use symbolic defines - Add time-out in busy-wait loops - Removed exit code (loadable module support will be added later) - Fixed "fixed-link" issue raised by Joakim Tjernlund v1 --> v2: - Addressed feedback from Paul Bolle: - General feedback of FMan Driver layer - Remove Errata defines - Aligned comments to Kernel Doc - Remove Loadable Module support (not yet supported) - Removed not needed KConfig dependencies - Addressed feedback from Scott Wood - Use Kernel ioread/iowrite services - Squash FLIB source and header patches together This submission is based on the prior Freescale DPAA FMan V3,RFC submission. Several issues addresses in this submission: - Reduced MAC layering and complexity - Reduced code base - T1024/T2080 10G best effort support ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Igal Liberman authored
This patch adds the Ethernet MAC driver supporting the three different types of MACs: dTSEC, tGEC and mEMAC. Signed-off-by: Igal Liberman <igal.liberman@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Igal Liberman authored
Add the Data Path Acceleration Architecture Frame Manger Port Driver. The FMan driver uses a module called "Port" to represent the physical TX and RX ports. Each FMan version has different number of physical ports. This patch adds The FMan Port configuration, initialization and runtime control routines for both TX and RX. Signed-off-by: Igal Liberman <igal.liberman@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Igal Liberman authored
The Storage Profiles contain parameters that are used by the FMan for frame reception and transmission. Signed-off-by: Igal Liberman <igal.liberman@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Igal Liberman authored
Add the Data Path Acceleration Architecture Frame Manger MAC support. This patch adds The FMan MAC configuration, initialization and runtime control routines. This patch contains support for these types of MACs: - dTSEC: Three speed Ethernet controller (10/100/1000 Mbps) - tGEC: 10G Ethernet controller (10 Gbps) - mEMAC: Multi-rate Ethernet MAC (10/100/1000/10000 Mbps) Different FMan revisions have different type and number of MACs. Signed-off-by: Igal Liberman <igal.liberman@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Igal Liberman authored
Add the Data Path Acceleration Architecture Frame Manger Driver. The FMan embeds a series of hardware blocks that implement a group of Ethernet interfaces. This patch adds The FMan configuration, initialization and runtime control routines. The FMan driver supports several hardware versions differentiated by things like: - Different type of MACs - Number of MAC and ports - Available resources - Different hardware errata Signed-off-by: Igal Liberman <igal.liberman@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Igal Liberman authored
Add Frame Manager Multi-User RAM support. This internal FMan memory block is used by the FMan hardware modules, the management being made through the generic allocator. The FMan Internal memory, for example, is used for allocating transmit and receive FIFOs. Signed-off-by: Igal Liberman <Igal.Liberman@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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- 26 Dec, 2015 1 commit
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Pravin B Shelar authored
By moving stats update into iptunnel_xmit(), we can simplify iptunnel_xmit() usage. With this change there is no need to call another function (iptunnel_xmit_stats()) to update stats in tunnel xmit code path. Signed-off-by: Pravin B Shelar <pshelar@nicira.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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- 24 Dec, 2015 13 commits
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Hariprasad Shenai authored
Remove deprecated module parameters, and mark one parameter as deprecated. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Hariprasad Shenai authored
CLIP is always enabled and hardware uses 2 TID entries instead of 4 for IPv6 in CLIP mode. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Hariprasad Shenai says: ==================== Update support for T6 adapters This patch changes updates the various code changes related to register, stats and hardware related changes for T6 family of adapters. This patch series has been created against net-next tree and includes patches on cxgb4 and cxgb4vf driver. We have included all the maintainers of respective drivers. Kindly review the change and let us know in case of any review comments. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Hariprasad Shenai authored
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Hariprasad Shenai authored
SGE context congestion map changed from 4 to 8 priority per port in T6 as there are only 2 channels. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Hariprasad Shenai authored
In T6, MPS classification has a 512 deep TCAM to do the match lookup. Each entry has 80x2b sets containing 48 bit MAC address, port number, VLAN Valid/ID, VNI, lookup type (outer or inner packet header). [71:48] bit locations are overloaded for outer vs. inner lookup types. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Hariprasad Shenai authored
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Hariprasad Shenai authored
Updating Congestion Channel/Priority Map in Congestion Manager Context for T6. In T6 port 0 is mapped to channel 0 and port 1 is mapped to channel 1. For 2 port T4/T5 adapter, port 0 is mapped to channel 0,1 and port 1 is mapped to channel 2,3 Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Hariprasad Shenai authored
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Hariprasad Shenai authored
Ingress padding boundary values got changed for T6. T5: 0=32B 1=64B 2=128B 3=256B 4=512B 5=1024B 6=2048B 7=4096B T6: 0=8B 1=16B 2=32B 3=64B 4=128B 5=128B 6=256B 7=512B Updating the driver to set the correct boundary values in SGE_CONTROL to 32B. Also, need to take care of this fl alignment change when calculating the next packet offset. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Hariprasad Shenai authored
Updated pm_stats code to display input FIFO wait (index 5) and read latency (index 7) counters for T6 adapters Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Hariprasad Shenai authored
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Geliang Tang authored
kobj_to_dev has been defined in linux/device.h, so I replace to_dev with it. Signed-off-by: Geliang Tang <geliangtang@163.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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